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authorSukumar Ghorai <s-ghorai@ti.com>2010-07-09 05:14:46 -0400
committerTony Lindgren <tony@atomide.com>2010-08-02 08:41:17 -0400
commitf450d86790ebf72ac93c7ea5addd6fa278aae64c (patch)
tree9ac542aca70b6845edad0ca026afc358e76bd97c /arch/arm/mach-omap2/board-overo.c
parent2c01946c6b9ebaa5a89710bc42ca224a7f52f227 (diff)
omap3 nand: fix issue in board file to detect nand
Board file modified for not to provide gpmc phys_base address to nand driver. The gpmc_nand_init funciton is now used to detect the nand and required to adopt _prob function as in nand/omap2.c Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/board-overo.c')
-rw-r--r--arch/arm/mach-omap2/board-overo.c24
1 files changed, 1 insertions, 23 deletions
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 4ceeb56c414c..7fe3296faa25 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -58,8 +58,6 @@
58#define OVERO_GPIO_USBH_NRESET 183 58#define OVERO_GPIO_USBH_NRESET 183
59 59
60#define NAND_BLOCK_SIZE SZ_128K 60#define NAND_BLOCK_SIZE SZ_128K
61#define GPMC_CS0_BASE 0x60
62#define GPMC_CS_SIZE 0x30
63 61
64#define OVERO_SMSC911X_CS 5 62#define OVERO_SMSC911X_CS 5
65#define OVERO_SMSC911X_GPIO 176 63#define OVERO_SMSC911X_GPIO 176
@@ -269,28 +267,11 @@ static struct omap_nand_platform_data overo_nand_data = {
269 .dma_channel = -1, /* disable DMA in OMAP NAND driver */ 267 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
270}; 268};
271 269
272static struct resource overo_nand_resource = {
273 .flags = IORESOURCE_MEM,
274};
275
276static struct platform_device overo_nand_device = {
277 .name = "omap2-nand",
278 .id = -1,
279 .dev = {
280 .platform_data = &overo_nand_data,
281 },
282 .num_resources = 1,
283 .resource = &overo_nand_resource,
284};
285
286
287static void __init overo_flash_init(void) 270static void __init overo_flash_init(void)
288{ 271{
289 u8 cs = 0; 272 u8 cs = 0;
290 u8 nandcs = GPMC_CS_NUM + 1; 273 u8 nandcs = GPMC_CS_NUM + 1;
291 274
292 u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
293
294 /* find out the chip-select on which NAND exists */ 275 /* find out the chip-select on which NAND exists */
295 while (cs < GPMC_CS_NUM) { 276 while (cs < GPMC_CS_NUM) {
296 u32 ret = 0; 277 u32 ret = 0;
@@ -312,12 +293,9 @@ static void __init overo_flash_init(void)
312 293
313 if (nandcs < GPMC_CS_NUM) { 294 if (nandcs < GPMC_CS_NUM) {
314 overo_nand_data.cs = nandcs; 295 overo_nand_data.cs = nandcs;
315 overo_nand_data.gpmc_cs_baseaddr = (void *)
316 (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
317 overo_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
318 296
319 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); 297 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
320 if (platform_device_register(&overo_nand_device) < 0) 298 if (gpmc_nand_init(&overo_nand_data) < 0)
321 printk(KERN_ERR "Unable to register NAND device\n"); 299 printk(KERN_ERR "Unable to register NAND device\n");
322 } 300 }
323} 301}