ARM: OMAP5: Add minimal support for OMAP5430 SOC

OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP
architecture. It's a dual core SOC with GIC used for interrupt
handling and with an integrated L2 cache controller.

OMAP5432 is another variant of OMAP5430, with a
memory controller supporting DDR3 and SATA.

Patch includes:
 - The machine specific headers and sources updates.
 - Platform header updates.
 - Minimum initialisation support for serial.
 - IO table init

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

1 files changed, 18 insertions, 5 deletions

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 240f1969f2ad..085e17175efa 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
 obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
 obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
 obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
+obj-$(CONFIG_SOC_OMAP5)  += prm44xx.o $(hwmod-common) $(secure-common)
 
 ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
 obj-y += mcbsp.o
@@ -29,8 +30,10 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC)	+= sdrc.o
 
 obj-$(CONFIG_SMP)                       += omap-smp.o omap-headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)               += omap-hotplug.o
-obj-$(CONFIG_ARCH_OMAP4)                += omap4-common.o omap-wakeupgen.o
-obj-$(CONFIG_ARCH_OMAP4)                += sleep44xx.o
+omap-4-5-common                         =  omap4-common.o omap-wakeupgen.o \
+                                           sleep44xx.o
+obj-$(CONFIG_ARCH_OMAP4)                += $(omap-4-5-common)
+obj-$(CONFIG_SOC_OMAP5)                 += $(omap-4-5-common)
 
 plus_sec := $(call as-instr,.arch_extension sec,+sec)
 AFLAGS_omap-headsmp.o                   :=-Wa,-march=armv7-a$(plus_sec)
@@ -70,6 +73,7 @@ obj-$(CONFIG_ARCH_OMAP2)		+= sleep24xx.o
 obj-$(CONFIG_ARCH_OMAP3)                += pm34xx.o sleep34xx.o
 obj-$(CONFIG_ARCH_OMAP3)                += cpuidle34xx.o
 obj-$(CONFIG_ARCH_OMAP4)                += pm44xx.o omap-mpuss-lowpower.o
+obj-$(CONFIG_SOC_OMAP5)                 += omap-mpuss-lowpower.o
 obj-$(CONFIG_ARCH_OMAP4)                += cpuidle44xx.o
 obj-$(CONFIG_PM_DEBUG)                  += pm-debug.o
 obj-$(CONFIG_OMAP_SMARTREFLEX)          += sr_device.o smartreflex.o
@@ -85,14 +89,16 @@ endif
 endif
 
 # PRCM
+omap-prcm-4-5-common                    =  prcm.o cminst44xx.o cm44xx.o \
+                                           prcm_mpu44xx.o prminst44xx.o \
+                                           vc44xx_data.o vp44xx_data.o
 obj-y                                   += prm_common.o
 obj-$(CONFIG_ARCH_OMAP2)                += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)                += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)                += vc3xxx_data.o vp3xxx_data.o
-obj-$(CONFIG_ARCH_OMAP4)                += prcm.o cminst44xx.o cm44xx.o
-obj-$(CONFIG_ARCH_OMAP4)                += prcm_mpu44xx.o prminst44xx.o
-obj-$(CONFIG_ARCH_OMAP4)                += vc44xx_data.o vp44xx_data.o prm44xx.o
 obj-$(CONFIG_SOC_AM33XX)                += prcm.o prm33xx.o cm33xx.o
+obj-$(CONFIG_ARCH_OMAP4)                += $(omap-prcm-4-5-common) prm44xx.o
+obj-$(CONFIG_SOC_OMAP5)                 += $(omap-prcm-4-5-common)
 
 # OMAP voltage domains
 voltagedomain-common                    := voltage.o vc.o vp.o
@@ -104,6 +110,7 @@ obj-$(CONFIG_ARCH_OMAP4)		+= $(voltagedomain-common)
 obj-$(CONFIG_ARCH_OMAP4)                += voltagedomains44xx_data.o
 obj-$(CONFIG_SOC_AM33XX)                += $(voltagedomain-common)
 obj-$(CONFIG_SOC_AM33XX)                += voltagedomains33xx_data.o
+obj-$(CONFIG_SOC_OMAP5)                 += $(voltagedomain-common)
 
 # OMAP powerdomain framework
 powerdomain-common                      += powerdomain.o powerdomain-common.o
@@ -121,6 +128,8 @@ obj-$(CONFIG_ARCH_OMAP4)		+= powerdomains44xx_data.o
 obj-$(CONFIG_SOC_AM33XX)                += $(powerdomain-common)
 obj-$(CONFIG_SOC_AM33XX)                += powerdomain33xx.o
 obj-$(CONFIG_SOC_AM33XX)                += powerdomains33xx_data.o
+obj-$(CONFIG_SOC_OMAP5)                 += $(powerdomain-common)
+obj-$(CONFIG_SOC_OMAP5)                 += powerdomain44xx.o
 
 # PRCM clockdomain control
 clockdomain-common                      += clockdomain.o
@@ -139,6 +148,8 @@ obj-$(CONFIG_ARCH_OMAP4)		+= clockdomains44xx_data.o
 obj-$(CONFIG_SOC_AM33XX)                += $(clockdomain-common)
 obj-$(CONFIG_SOC_AM33XX)                += clockdomain33xx.o
 obj-$(CONFIG_SOC_AM33XX)                += clockdomains33xx_data.o
+obj-$(CONFIG_SOC_OMAP5)                 += $(clockdomain-common)
+obj-$(CONFIG_SOC_OMAP5)                 += clockdomain44xx.o
 
 # Clock framework
 obj-$(CONFIG_ARCH_OMAP2)                += $(clock-common) clock2xxx.o
@@ -157,6 +168,8 @@ obj-$(CONFIG_ARCH_OMAP3)		+= clkt_iclk.o
 obj-$(CONFIG_ARCH_OMAP4)                += $(clock-common) clock44xx_data.o
 obj-$(CONFIG_ARCH_OMAP4)                += dpll3xxx.o dpll44xx.o
 obj-$(CONFIG_SOC_AM33XX)                += $(clock-common) dpll3xxx.o
+obj-$(CONFIG_SOC_OMAP5)                 += $(clock-common)
+obj-$(CONFIG_SOC_OMAP5)                 += dpll3xxx.o dpll44xx.o
 
 # OMAP2 clock rate set data (old "OPP" data)
 obj-$(CONFIG_SOC_OMAP2420)              += opp2420_data.o