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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2012-08-13 04:54:24 -0400
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2012-09-19 03:30:36 -0400
commitfa6d79d27614223d82418023b7f5300f1a1530d3 (patch)
tree5675ffd08a08f8c15353c05c75c0d66c9c64a573 /arch/arm/mach-omap2/Kconfig
parent5698bd757d55b1bb87edd1a9744ab09c142abfc2 (diff)
ARM: OMAP: Add initialisation for the real-time counter.
The real time counter also called master counter, is a free-running counter. It produces the count used by the CPU local timer peripherals in the MPU cluster. The timer counts at a rate of 6.144 MHz. The ratio registers needs to be configured based on system clock only onetime. After initialisation, hardware takes care of adjusting the clock in different low power modes to keep counter rate constant. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/Kconfig')
-rw-r--r--arch/arm/mach-omap2/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 346fd26f3aa6..4b773fd56978 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -24,6 +24,9 @@ config ARCH_OMAP2PLUS_TYPICAL
24config SOC_HAS_OMAP2_SDRC 24config SOC_HAS_OMAP2_SDRC
25 bool "OMAP2 SDRAM Controller support" 25 bool "OMAP2 SDRAM Controller support"
26 26
27config SOC_HAS_REALTIME_COUNTER
28 bool "Real time free running counter"
29
27config ARCH_OMAP2 30config ARCH_OMAP2
28 bool "TI OMAP2" 31 bool "TI OMAP2"
29 depends on ARCH_OMAP2PLUS 32 depends on ARCH_OMAP2PLUS
@@ -70,6 +73,7 @@ config SOC_OMAP5
70 select ARM_GIC 73 select ARM_GIC
71 select HAVE_SMP 74 select HAVE_SMP
72 select ARM_CPU_SUSPEND if PM 75 select ARM_CPU_SUSPEND if PM
76 select SOC_HAS_REALTIME_COUNTER
73 77
74comment "OMAP Core Type" 78comment "OMAP Core Type"
75 depends on ARCH_OMAP2 79 depends on ARCH_OMAP2