diff options
author | Tarun Kanti DebBarma <tarun.kanti@ti.com> | 2011-09-13 05:32:14 -0400 |
---|---|---|
committer | Tarun Kanti DebBarma <tarun.kanti@ti.com> | 2012-02-06 03:43:42 -0500 |
commit | 5e571f38f6a44ef541fac0821631509d787ef0cd (patch) | |
tree | eb19a3db74cae81d503ec8689fcc03bde8c27dfb /arch/arm/mach-omap1 | |
parent | ae10f2336b9c0c8da73da2878eba684ab876eb8f (diff) |
gpio/omap: cleanup set_gpio_triggering function
Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
Also, use wkup_status register consistently instead of referring to wakeup
clear and wakeup set register offsets. Get rid of cpu_is_xxxx checks in
set_gpio_trigger() using irqctrl.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r-- | arch/arm/mach-omap1/gpio15xx.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap1/gpio16xx.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap1/gpio7xx.c | 2 |
3 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c index f8c15eabf06e..2adfece30ce6 100644 --- a/arch/arm/mach-omap1/gpio15xx.c +++ b/arch/arm/mach-omap1/gpio15xx.c | |||
@@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = { | |||
42 | .irqstatus = OMAP_MPUIO_GPIO_INT, | 42 | .irqstatus = OMAP_MPUIO_GPIO_INT, |
43 | .irqenable = OMAP_MPUIO_GPIO_MASKIT, | 43 | .irqenable = OMAP_MPUIO_GPIO_MASKIT, |
44 | .irqenable_inv = true, | 44 | .irqenable_inv = true, |
45 | .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE, | ||
45 | }; | 46 | }; |
46 | 47 | ||
47 | static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = { | 48 | static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = { |
@@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = { | |||
83 | .irqstatus = OMAP1510_GPIO_INT_STATUS, | 84 | .irqstatus = OMAP1510_GPIO_INT_STATUS, |
84 | .irqenable = OMAP1510_GPIO_INT_MASK, | 85 | .irqenable = OMAP1510_GPIO_INT_MASK, |
85 | .irqenable_inv = true, | 86 | .irqenable_inv = true, |
87 | .irqctrl = OMAP1510_GPIO_INT_CONTROL, | ||
86 | }; | 88 | }; |
87 | 89 | ||
88 | static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = { | 90 | static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = { |
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 1eb47e2760d8..46bb57a8cb7d 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c | |||
@@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = { | |||
45 | .irqstatus = OMAP_MPUIO_GPIO_INT, | 45 | .irqstatus = OMAP_MPUIO_GPIO_INT, |
46 | .irqenable = OMAP_MPUIO_GPIO_MASKIT, | 46 | .irqenable = OMAP_MPUIO_GPIO_MASKIT, |
47 | .irqenable_inv = true, | 47 | .irqenable_inv = true, |
48 | .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE, | ||
48 | }; | 49 | }; |
49 | 50 | ||
50 | static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { | 51 | static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { |
@@ -90,6 +91,8 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = { | |||
90 | .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1, | 91 | .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1, |
91 | .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1, | 92 | .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1, |
92 | .wkup_en = OMAP1610_GPIO_WAKEUPENABLE, | 93 | .wkup_en = OMAP1610_GPIO_WAKEUPENABLE, |
94 | .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1, | ||
95 | .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2, | ||
93 | }; | 96 | }; |
94 | 97 | ||
95 | static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = { | 98 | static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = { |
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c index 923eaa1df955..207a23cfa1a0 100644 --- a/arch/arm/mach-omap1/gpio7xx.c +++ b/arch/arm/mach-omap1/gpio7xx.c | |||
@@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = { | |||
47 | .irqstatus = OMAP_MPUIO_GPIO_INT / 2, | 47 | .irqstatus = OMAP_MPUIO_GPIO_INT / 2, |
48 | .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2, | 48 | .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2, |
49 | .irqenable_inv = true, | 49 | .irqenable_inv = true, |
50 | .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE >> 1, | ||
50 | }; | 51 | }; |
51 | 52 | ||
52 | static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { | 53 | static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { |
@@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = { | |||
88 | .irqstatus = OMAP7XX_GPIO_INT_STATUS, | 89 | .irqstatus = OMAP7XX_GPIO_INT_STATUS, |
89 | .irqenable = OMAP7XX_GPIO_INT_MASK, | 90 | .irqenable = OMAP7XX_GPIO_INT_MASK, |
90 | .irqenable_inv = true, | 91 | .irqenable_inv = true, |
92 | .irqctrl = OMAP7XX_GPIO_INT_CONTROL, | ||
91 | }; | 93 | }; |
92 | 94 | ||
93 | static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = { | 95 | static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = { |