ARM: OMAP: Sync clocks with linux-omap tree

Mostly clean up CONFIG_OMAP_RESET_CLOCKS. Also includes a
patch from Imre Deak to make McSPI clocks use id.

Signed-off-by: Tony Lindgren <tony@atomide.com>

2 files changed, 62 insertions, 59 deletions

diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index f1958e882e86..638490e62d5f 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -20,6 +20,7 @@
 #include <linux/clk.h>
 
 #include <asm/io.h>
+#include <asm/mach-types.h>
 
 #include <asm/arch/cpu.h>
 #include <asm/arch/usb.h>
@@ -586,77 +587,53 @@ static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
  *-------------------------------------------------------------------------*/
 
 #ifdef CONFIG_OMAP_RESET_CLOCKS
-/*
- * Resets some clocks that may be left on from bootloader,
- * but leaves serial clocks on. See also omap_late_clk_reset().
- */
-static inline void omap1_early_clk_reset(void)
-{
-        //omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
-}
 
-static int __init omap1_late_clk_reset(void)
+static void __init omap1_clk_disable_unused(struct clk *clk)
 {
-        /* Turn off all unused clocks */
-        struct clk *p;
         __u32 regval32;
 
-        /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
-        regval32 = omap_readw(SOFT_REQ_REG) & (1 << 4);
-        omap_writew(regval32, SOFT_REQ_REG);
-        omap_writew(0, SOFT_REQ_REG2);
-
-        list_for_each_entry(p, &clocks, node) {
-                if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) ||
-                        p->enable_reg == 0)
-                        continue;
-
-                /* Clocks in the DSP domain need api_ck. Just assume bootloader
-                 * has not enabled any DSP clocks */
-                if ((u32)p->enable_reg == DSP_IDLECT2) {
-                        printk(KERN_INFO "Skipping reset check for DSP domain "
-                               "clock \"%s\"\n", p->name);
-                        continue;
-                }
+        /* Clocks in the DSP domain need api_ck. Just assume bootloader
+         * has not enabled any DSP clocks */
+        if ((u32)clk->enable_reg == DSP_IDLECT2) {
+                printk(KERN_INFO "Skipping reset check for DSP domain "
+                       "clock \"%s\"\n", clk->name);
+                return;
+        }
 
-                /* Is the clock already disabled? */
-                if (p->flags & ENABLE_REG_32BIT) {
-                        if (p->flags & VIRTUAL_IO_ADDRESS)
-                                regval32 = __raw_readl(p->enable_reg);
-                        else
-                                regval32 = omap_readl(p->enable_reg);
-                } else {
-                        if (p->flags & VIRTUAL_IO_ADDRESS)
-                                regval32 = __raw_readw(p->enable_reg);
+        /* Is the clock already disabled? */
+        if (clk->flags & ENABLE_REG_32BIT) {
+                if (clk->flags & VIRTUAL_IO_ADDRESS)
+                        regval32 = __raw_readl(clk->enable_reg);
                         else
-                                regval32 = omap_readw(p->enable_reg);
-                }
-
-                if ((regval32 & (1 << p->enable_bit)) == 0)
-                        continue;
+                                regval32 = omap_readl(clk->enable_reg);
+        } else {
+                if (clk->flags & VIRTUAL_IO_ADDRESS)
+                        regval32 = __raw_readw(clk->enable_reg);
+                else
+                        regval32 = omap_readw(clk->enable_reg);
+        }
 
-                /* FIXME: This clock seems to be necessary but no-one
-                 * has asked for its activation. */
-                if (p == &tc2_ck         // FIX: pm.c (SRAM), CCP, Camera
-                    || p == &ck_dpll1out.clk // FIX: SoSSI, SSR
-                    || p == &arm_gpio_ck // FIX: GPIO code for 1510
-                    ) {
-                        printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
-                               p->name);
-                        continue;
-                }
+        if ((regval32 & (1 << clk->enable_bit)) == 0)
+                return;
 
-                printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name);
-                p->disable(p);
-                printk(" done\n");
+        /* FIXME: This clock seems to be necessary but no-one
+         * has asked for its activation. */
+        if (clk == &tc2_ck              // FIX: pm.c (SRAM), CCP, Camera
+            || clk == &ck_dpll1out.clk  // FIX: SoSSI, SSR
+            || clk == &arm_gpio_ck      // FIX: GPIO code for 1510
+                ) {
+                printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
+                       clk->name);
+                return;
         }
 
-        return 0;
+        printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name);
+        clk->disable(clk);
+        printk(" done\n");
 }
-late_initcall(omap1_late_clk_reset);
 
 #else
-#define omap1_early_clk_reset() {}
+#define omap1_clk_disable_unused        NULL
 #endif
 
 static struct clk_functions omap1_clk_functions = {
@@ -664,6 +641,7 @@ static struct clk_functions omap1_clk_functions = {
         .clk_disable            = omap1_clk_disable,
         .clk_round_rate         = omap1_clk_round_rate,
         .clk_set_rate           = omap1_clk_set_rate,
+        .clk_disable_unused     = omap1_clk_disable_unused,
 };
 
 int __init omap1_clk_init(void)
@@ -671,8 +649,13 @@ int __init omap1_clk_init(void)
         struct clk ** clkp;
         const struct omap_clock_config *info;
         int crystal_type = 0; /* Default 12 MHz */
+        u32 reg;
+
+        /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
+        reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
+        omap_writew(reg, SOFT_REQ_REG);
+        omap_writew(0, SOFT_REQ_REG2);
 
-        omap1_early_clk_reset();
         clk_init(&omap1_clk_functions);
 
         /* By default all idlect1 clocks are allowed to idle */
@@ -772,6 +755,12 @@ int __init omap1_clk_init(void)
         omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
 #endif
 
+        /* Amstrad Delta wants BCLK high when inactive */
+        if (machine_is_ams_delta())
+                omap_writel(omap_readl(ULPD_CLOCK_CTRL) |
+                                (1 << SDW_MCLK_INV_BIT),
+                                ULPD_CLOCK_CTRL);
+
         /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
         /* (on 730, bit 13 must not be cleared) */
         if (cpu_is_omap730())
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index b7c68819c4e7..f7df00205c4a 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -89,6 +89,7 @@ struct arm_idlect1_clk {
 #define EN_DSPTIMCK     5
 
 /* Various register defines for clock controls scattered around OMAP chip */
+#define SDW_MCLK_INV_BIT        2       /* In ULPD_CLKC_CTRL */
 #define USB_MCLK_EN_BIT         4       /* In ULPD_CLKC_CTRL */
 #define USB_HOST_HHC_UHOST_EN   9       /* In MOD_CONF_CTRL_0 */
 #define SWD_ULPD_PLL_CLK_REQ    1       /* In SWD_CLK_DIV_CTRL_SEL */
@@ -741,6 +742,18 @@ static struct clk i2c_fck = {
         .disable        = &omap1_clk_disable_generic,
 };
 
+static struct clk i2c_ick = {
+        .name           = "i2c_ick",
+        .id             = 1,
+        .flags          = CLOCK_IN_OMAP16XX |
+                          VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT |
+                          ALWAYS_ENABLED,
+        .parent         = &armper_ck.clk,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable_generic,
+        .disable        = &omap1_clk_disable_generic,
+};
+
 static struct clk * onchip_clks[] = {
         /* non-ULPD clocks */
         &ck_ref,
@@ -790,6 +803,7 @@ static struct clk * onchip_clks[] = {
         /* Virtual clocks */
         &virtual_ck_mpu,
         &i2c_fck,
+        &i2c_ick,
 };
 
 #endif