diff options
author | Tony Lindgren <tony@atomide.com> | 2006-04-02 12:46:20 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-04-02 12:46:20 -0400 |
commit | b824efae120b656fef562b2e81e1ed6aa88f8d24 (patch) | |
tree | 427d55c6e13fe3b19d2387769145c01933c630d0 /arch/arm/mach-omap1 | |
parent | 3267c077e589bc146a0b45e220fcefafbf83fb80 (diff) |
[ARM] 3426/1: ARM: OMAP: 1/8 Update clock framework
Patch from Tony Lindgren
Update OMAP clock framework from linux-omap tree.
The highlights of the patch are:
- Add support for omap730 clocks by Andrzej Zaborowski
- Fix compile warnings by Dirk Behme
- Add support for using dev id by Tony Lindgren and Komal Shah
- Move memory timings and PRCM into separate files by Tony Lindgren
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r-- | arch/arm/mach-omap1/clock.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-omap1/clock.h | 91 |
2 files changed, 66 insertions, 34 deletions
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 75110ba10424..619db18144ea 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -345,7 +345,7 @@ static unsigned calc_ext_dsor(unsigned long rate) | |||
345 | */ | 345 | */ |
346 | for (dsor = 2; dsor < 96; ++dsor) { | 346 | for (dsor = 2; dsor < 96; ++dsor) { |
347 | if ((dsor & 1) && dsor > 8) | 347 | if ((dsor & 1) && dsor > 8) |
348 | continue; | 348 | continue; |
349 | if (rate >= 96000000 / dsor) | 349 | if (rate >= 96000000 / dsor) |
350 | break; | 350 | break; |
351 | } | 351 | } |
@@ -687,6 +687,11 @@ int __init omap1_clk_init(void) | |||
687 | clk_register(*clkp); | 687 | clk_register(*clkp); |
688 | continue; | 688 | continue; |
689 | } | 689 | } |
690 | |||
691 | if (((*clkp)->flags &CLOCK_IN_OMAP310) && cpu_is_omap310()) { | ||
692 | clk_register(*clkp); | ||
693 | continue; | ||
694 | } | ||
690 | } | 695 | } |
691 | 696 | ||
692 | info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); | 697 | info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); |
@@ -784,7 +789,7 @@ int __init omap1_clk_init(void) | |||
784 | clk_enable(&armxor_ck.clk); | 789 | clk_enable(&armxor_ck.clk); |
785 | clk_enable(&armtim_ck.clk); /* This should be done by timer code */ | 790 | clk_enable(&armtim_ck.clk); /* This should be done by timer code */ |
786 | 791 | ||
787 | if (cpu_is_omap1510()) | 792 | if (cpu_is_omap15xx()) |
788 | clk_enable(&arm_gpio_ck); | 793 | clk_enable(&arm_gpio_ck); |
789 | 794 | ||
790 | return 0; | 795 | return 0; |
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 4f18d1b94449..b7c68819c4e7 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h | |||
@@ -151,7 +151,7 @@ static struct clk ck_ref = { | |||
151 | .name = "ck_ref", | 151 | .name = "ck_ref", |
152 | .rate = 12000000, | 152 | .rate = 12000000, |
153 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 153 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
154 | ALWAYS_ENABLED, | 154 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED, |
155 | .enable = &omap1_clk_enable_generic, | 155 | .enable = &omap1_clk_enable_generic, |
156 | .disable = &omap1_clk_disable_generic, | 156 | .disable = &omap1_clk_disable_generic, |
157 | }; | 157 | }; |
@@ -160,7 +160,7 @@ static struct clk ck_dpll1 = { | |||
160 | .name = "ck_dpll1", | 160 | .name = "ck_dpll1", |
161 | .parent = &ck_ref, | 161 | .parent = &ck_ref, |
162 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 162 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
163 | RATE_PROPAGATES | ALWAYS_ENABLED, | 163 | CLOCK_IN_OMAP310 | RATE_PROPAGATES | ALWAYS_ENABLED, |
164 | .enable = &omap1_clk_enable_generic, | 164 | .enable = &omap1_clk_enable_generic, |
165 | .disable = &omap1_clk_disable_generic, | 165 | .disable = &omap1_clk_disable_generic, |
166 | }; | 166 | }; |
@@ -183,7 +183,8 @@ static struct clk arm_ck = { | |||
183 | .name = "arm_ck", | 183 | .name = "arm_ck", |
184 | .parent = &ck_dpll1, | 184 | .parent = &ck_dpll1, |
185 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 185 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
186 | RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED, | 186 | CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES | |
187 | ALWAYS_ENABLED, | ||
187 | .rate_offset = CKCTL_ARMDIV_OFFSET, | 188 | .rate_offset = CKCTL_ARMDIV_OFFSET, |
188 | .recalc = &omap1_ckctl_recalc, | 189 | .recalc = &omap1_ckctl_recalc, |
189 | .enable = &omap1_clk_enable_generic, | 190 | .enable = &omap1_clk_enable_generic, |
@@ -195,7 +196,8 @@ static struct arm_idlect1_clk armper_ck = { | |||
195 | .name = "armper_ck", | 196 | .name = "armper_ck", |
196 | .parent = &ck_dpll1, | 197 | .parent = &ck_dpll1, |
197 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 198 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
198 | RATE_CKCTL | CLOCK_IDLE_CONTROL, | 199 | CLOCK_IN_OMAP310 | RATE_CKCTL | |
200 | CLOCK_IDLE_CONTROL, | ||
199 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 201 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
200 | .enable_bit = EN_PERCK, | 202 | .enable_bit = EN_PERCK, |
201 | .rate_offset = CKCTL_PERDIV_OFFSET, | 203 | .rate_offset = CKCTL_PERDIV_OFFSET, |
@@ -209,7 +211,7 @@ static struct arm_idlect1_clk armper_ck = { | |||
209 | static struct clk arm_gpio_ck = { | 211 | static struct clk arm_gpio_ck = { |
210 | .name = "arm_gpio_ck", | 212 | .name = "arm_gpio_ck", |
211 | .parent = &ck_dpll1, | 213 | .parent = &ck_dpll1, |
212 | .flags = CLOCK_IN_OMAP1510, | 214 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, |
213 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 215 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
214 | .enable_bit = EN_GPIOCK, | 216 | .enable_bit = EN_GPIOCK, |
215 | .recalc = &followparent_recalc, | 217 | .recalc = &followparent_recalc, |
@@ -222,7 +224,7 @@ static struct arm_idlect1_clk armxor_ck = { | |||
222 | .name = "armxor_ck", | 224 | .name = "armxor_ck", |
223 | .parent = &ck_ref, | 225 | .parent = &ck_ref, |
224 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 226 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
225 | CLOCK_IDLE_CONTROL, | 227 | CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, |
226 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 228 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
227 | .enable_bit = EN_XORPCK, | 229 | .enable_bit = EN_XORPCK, |
228 | .recalc = &followparent_recalc, | 230 | .recalc = &followparent_recalc, |
@@ -237,7 +239,7 @@ static struct arm_idlect1_clk armtim_ck = { | |||
237 | .name = "armtim_ck", | 239 | .name = "armtim_ck", |
238 | .parent = &ck_ref, | 240 | .parent = &ck_ref, |
239 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 241 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
240 | CLOCK_IDLE_CONTROL, | 242 | CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, |
241 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 243 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
242 | .enable_bit = EN_TIMCK, | 244 | .enable_bit = EN_TIMCK, |
243 | .recalc = &followparent_recalc, | 245 | .recalc = &followparent_recalc, |
@@ -252,7 +254,7 @@ static struct arm_idlect1_clk armwdt_ck = { | |||
252 | .name = "armwdt_ck", | 254 | .name = "armwdt_ck", |
253 | .parent = &ck_ref, | 255 | .parent = &ck_ref, |
254 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 256 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
255 | CLOCK_IDLE_CONTROL, | 257 | CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, |
256 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 258 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
257 | .enable_bit = EN_WDTCK, | 259 | .enable_bit = EN_WDTCK, |
258 | .recalc = &omap1_watchdog_recalc, | 260 | .recalc = &omap1_watchdog_recalc, |
@@ -344,9 +346,9 @@ static struct arm_idlect1_clk tc_ck = { | |||
344 | .name = "tc_ck", | 346 | .name = "tc_ck", |
345 | .parent = &ck_dpll1, | 347 | .parent = &ck_dpll1, |
346 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 348 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
347 | CLOCK_IN_OMAP730 | RATE_CKCTL | | 349 | CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 | |
348 | RATE_PROPAGATES | ALWAYS_ENABLED | | 350 | RATE_CKCTL | RATE_PROPAGATES | |
349 | CLOCK_IDLE_CONTROL, | 351 | ALWAYS_ENABLED | CLOCK_IDLE_CONTROL, |
350 | .rate_offset = CKCTL_TCDIV_OFFSET, | 352 | .rate_offset = CKCTL_TCDIV_OFFSET, |
351 | .recalc = &omap1_ckctl_recalc, | 353 | .recalc = &omap1_ckctl_recalc, |
352 | .enable = &omap1_clk_enable_generic, | 354 | .enable = &omap1_clk_enable_generic, |
@@ -358,7 +360,8 @@ static struct arm_idlect1_clk tc_ck = { | |||
358 | static struct clk arminth_ck1510 = { | 360 | static struct clk arminth_ck1510 = { |
359 | .name = "arminth_ck", | 361 | .name = "arminth_ck", |
360 | .parent = &tc_ck.clk, | 362 | .parent = &tc_ck.clk, |
361 | .flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED, | 363 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | |
364 | ALWAYS_ENABLED, | ||
362 | .recalc = &followparent_recalc, | 365 | .recalc = &followparent_recalc, |
363 | /* Note: On 1510 the frequency follows TC_CK | 366 | /* Note: On 1510 the frequency follows TC_CK |
364 | * | 367 | * |
@@ -372,7 +375,8 @@ static struct clk tipb_ck = { | |||
372 | /* No-idle controlled by "tc_ck" */ | 375 | /* No-idle controlled by "tc_ck" */ |
373 | .name = "tibp_ck", | 376 | .name = "tibp_ck", |
374 | .parent = &tc_ck.clk, | 377 | .parent = &tc_ck.clk, |
375 | .flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED, | 378 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | |
379 | ALWAYS_ENABLED, | ||
376 | .recalc = &followparent_recalc, | 380 | .recalc = &followparent_recalc, |
377 | .enable = &omap1_clk_enable_generic, | 381 | .enable = &omap1_clk_enable_generic, |
378 | .disable = &omap1_clk_disable_generic, | 382 | .disable = &omap1_clk_disable_generic, |
@@ -417,7 +421,7 @@ static struct clk dma_ck = { | |||
417 | .name = "dma_ck", | 421 | .name = "dma_ck", |
418 | .parent = &tc_ck.clk, | 422 | .parent = &tc_ck.clk, |
419 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 423 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
420 | ALWAYS_ENABLED, | 424 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED, |
421 | .recalc = &followparent_recalc, | 425 | .recalc = &followparent_recalc, |
422 | .enable = &omap1_clk_enable_generic, | 426 | .enable = &omap1_clk_enable_generic, |
423 | .disable = &omap1_clk_disable_generic, | 427 | .disable = &omap1_clk_disable_generic, |
@@ -437,7 +441,7 @@ static struct arm_idlect1_clk api_ck = { | |||
437 | .name = "api_ck", | 441 | .name = "api_ck", |
438 | .parent = &tc_ck.clk, | 442 | .parent = &tc_ck.clk, |
439 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 443 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
440 | CLOCK_IDLE_CONTROL, | 444 | CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, |
441 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 445 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
442 | .enable_bit = EN_APICK, | 446 | .enable_bit = EN_APICK, |
443 | .recalc = &followparent_recalc, | 447 | .recalc = &followparent_recalc, |
@@ -451,7 +455,8 @@ static struct arm_idlect1_clk lb_ck = { | |||
451 | .clk = { | 455 | .clk = { |
452 | .name = "lb_ck", | 456 | .name = "lb_ck", |
453 | .parent = &tc_ck.clk, | 457 | .parent = &tc_ck.clk, |
454 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IDLE_CONTROL, | 458 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | |
459 | CLOCK_IDLE_CONTROL, | ||
455 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 460 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
456 | .enable_bit = EN_LBCK, | 461 | .enable_bit = EN_LBCK, |
457 | .recalc = &followparent_recalc, | 462 | .recalc = &followparent_recalc, |
@@ -495,8 +500,8 @@ static struct arm_idlect1_clk lcd_ck_1510 = { | |||
495 | .clk = { | 500 | .clk = { |
496 | .name = "lcd_ck", | 501 | .name = "lcd_ck", |
497 | .parent = &ck_dpll1, | 502 | .parent = &ck_dpll1, |
498 | .flags = CLOCK_IN_OMAP1510 | RATE_CKCTL | | 503 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | |
499 | CLOCK_IDLE_CONTROL, | 504 | RATE_CKCTL | CLOCK_IDLE_CONTROL, |
500 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 505 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
501 | .enable_bit = EN_LCDCK, | 506 | .enable_bit = EN_LCDCK, |
502 | .rate_offset = CKCTL_LCDDIV_OFFSET, | 507 | .rate_offset = CKCTL_LCDDIV_OFFSET, |
@@ -512,8 +517,9 @@ static struct clk uart1_1510 = { | |||
512 | /* Direct from ULPD, no real parent */ | 517 | /* Direct from ULPD, no real parent */ |
513 | .parent = &armper_ck.clk, | 518 | .parent = &armper_ck.clk, |
514 | .rate = 12000000, | 519 | .rate = 12000000, |
515 | .flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | | 520 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | |
516 | ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT, | 521 | ENABLE_REG_32BIT | ALWAYS_ENABLED | |
522 | CLOCK_NO_IDLE_PARENT, | ||
517 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, | 523 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, |
518 | .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ | 524 | .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ |
519 | .set_rate = &omap1_set_uart_rate, | 525 | .set_rate = &omap1_set_uart_rate, |
@@ -544,8 +550,8 @@ static struct clk uart2_ck = { | |||
544 | .parent = &armper_ck.clk, | 550 | .parent = &armper_ck.clk, |
545 | .rate = 12000000, | 551 | .rate = 12000000, |
546 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 552 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
547 | ENABLE_REG_32BIT | ALWAYS_ENABLED | | 553 | CLOCK_IN_OMAP310 | ENABLE_REG_32BIT | |
548 | CLOCK_NO_IDLE_PARENT, | 554 | ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT, |
549 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, | 555 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, |
550 | .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ | 556 | .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ |
551 | .set_rate = &omap1_set_uart_rate, | 557 | .set_rate = &omap1_set_uart_rate, |
@@ -559,8 +565,9 @@ static struct clk uart3_1510 = { | |||
559 | /* Direct from ULPD, no real parent */ | 565 | /* Direct from ULPD, no real parent */ |
560 | .parent = &armper_ck.clk, | 566 | .parent = &armper_ck.clk, |
561 | .rate = 12000000, | 567 | .rate = 12000000, |
562 | .flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | | 568 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | |
563 | ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT, | 569 | ENABLE_REG_32BIT | ALWAYS_ENABLED | |
570 | CLOCK_NO_IDLE_PARENT, | ||
564 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, | 571 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, |
565 | .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ | 572 | .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ |
566 | .set_rate = &omap1_set_uart_rate, | 573 | .set_rate = &omap1_set_uart_rate, |
@@ -590,7 +597,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ | |||
590 | /* Direct from ULPD, no parent */ | 597 | /* Direct from ULPD, no parent */ |
591 | .rate = 6000000, | 598 | .rate = 6000000, |
592 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 599 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
593 | RATE_FIXED | ENABLE_REG_32BIT, | 600 | CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT, |
594 | .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL, | 601 | .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL, |
595 | .enable_bit = USB_MCLK_EN_BIT, | 602 | .enable_bit = USB_MCLK_EN_BIT, |
596 | .enable = &omap1_clk_enable_generic, | 603 | .enable = &omap1_clk_enable_generic, |
@@ -601,7 +608,7 @@ static struct clk usb_hhc_ck1510 = { | |||
601 | .name = "usb_hhc_ck", | 608 | .name = "usb_hhc_ck", |
602 | /* Direct from ULPD, no parent */ | 609 | /* Direct from ULPD, no parent */ |
603 | .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ | 610 | .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ |
604 | .flags = CLOCK_IN_OMAP1510 | | 611 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | |
605 | RATE_FIXED | ENABLE_REG_32BIT, | 612 | RATE_FIXED | ENABLE_REG_32BIT, |
606 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, | 613 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, |
607 | .enable_bit = USB_HOST_HHC_UHOST_EN, | 614 | .enable_bit = USB_HOST_HHC_UHOST_EN, |
@@ -637,7 +644,9 @@ static struct clk mclk_1510 = { | |||
637 | .name = "mclk", | 644 | .name = "mclk", |
638 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ | 645 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ |
639 | .rate = 12000000, | 646 | .rate = 12000000, |
640 | .flags = CLOCK_IN_OMAP1510 | RATE_FIXED, | 647 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, |
648 | .enable_reg = (void __iomem *)SOFT_REQ_REG, | ||
649 | .enable_bit = 6, | ||
641 | .enable = &omap1_clk_enable_generic, | 650 | .enable = &omap1_clk_enable_generic, |
642 | .disable = &omap1_clk_disable_generic, | 651 | .disable = &omap1_clk_disable_generic, |
643 | }; | 652 | }; |
@@ -659,7 +668,7 @@ static struct clk bclk_1510 = { | |||
659 | .name = "bclk", | 668 | .name = "bclk", |
660 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ | 669 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ |
661 | .rate = 12000000, | 670 | .rate = 12000000, |
662 | .flags = CLOCK_IN_OMAP1510 | RATE_FIXED, | 671 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, |
663 | .enable = &omap1_clk_enable_generic, | 672 | .enable = &omap1_clk_enable_generic, |
664 | .disable = &omap1_clk_disable_generic, | 673 | .disable = &omap1_clk_disable_generic, |
665 | }; | 674 | }; |
@@ -678,12 +687,14 @@ static struct clk bclk_16xx = { | |||
678 | }; | 687 | }; |
679 | 688 | ||
680 | static struct clk mmc1_ck = { | 689 | static struct clk mmc1_ck = { |
681 | .name = "mmc1_ck", | 690 | .name = "mmc_ck", |
691 | .id = 1, | ||
682 | /* Functional clock is direct from ULPD, interface clock is ARMPER */ | 692 | /* Functional clock is direct from ULPD, interface clock is ARMPER */ |
683 | .parent = &armper_ck.clk, | 693 | .parent = &armper_ck.clk, |
684 | .rate = 48000000, | 694 | .rate = 48000000, |
685 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 695 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
686 | RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 696 | CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT | |
697 | CLOCK_NO_IDLE_PARENT, | ||
687 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, | 698 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, |
688 | .enable_bit = 23, | 699 | .enable_bit = 23, |
689 | .enable = &omap1_clk_enable_generic, | 700 | .enable = &omap1_clk_enable_generic, |
@@ -691,7 +702,8 @@ static struct clk mmc1_ck = { | |||
691 | }; | 702 | }; |
692 | 703 | ||
693 | static struct clk mmc2_ck = { | 704 | static struct clk mmc2_ck = { |
694 | .name = "mmc2_ck", | 705 | .name = "mmc_ck", |
706 | .id = 2, | ||
695 | /* Functional clock is direct from ULPD, interface clock is ARMPER */ | 707 | /* Functional clock is direct from ULPD, interface clock is ARMPER */ |
696 | .parent = &armper_ck.clk, | 708 | .parent = &armper_ck.clk, |
697 | .rate = 48000000, | 709 | .rate = 48000000, |
@@ -706,7 +718,7 @@ static struct clk mmc2_ck = { | |||
706 | static struct clk virtual_ck_mpu = { | 718 | static struct clk virtual_ck_mpu = { |
707 | .name = "mpu", | 719 | .name = "mpu", |
708 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 720 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
709 | VIRTUAL_CLOCK | ALWAYS_ENABLED, | 721 | CLOCK_IN_OMAP310 | VIRTUAL_CLOCK | ALWAYS_ENABLED, |
710 | .parent = &arm_ck, /* Is smarter alias for */ | 722 | .parent = &arm_ck, /* Is smarter alias for */ |
711 | .recalc = &followparent_recalc, | 723 | .recalc = &followparent_recalc, |
712 | .set_rate = &omap1_select_table_rate, | 724 | .set_rate = &omap1_select_table_rate, |
@@ -715,6 +727,20 @@ static struct clk virtual_ck_mpu = { | |||
715 | .disable = &omap1_clk_disable_generic, | 727 | .disable = &omap1_clk_disable_generic, |
716 | }; | 728 | }; |
717 | 729 | ||
730 | /* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK | ||
731 | remains active during MPU idle whenever this is enabled */ | ||
732 | static struct clk i2c_fck = { | ||
733 | .name = "i2c_fck", | ||
734 | .id = 1, | ||
735 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | ||
736 | VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | | ||
737 | ALWAYS_ENABLED, | ||
738 | .parent = &armxor_ck.clk, | ||
739 | .recalc = &followparent_recalc, | ||
740 | .enable = &omap1_clk_enable_generic, | ||
741 | .disable = &omap1_clk_disable_generic, | ||
742 | }; | ||
743 | |||
718 | static struct clk * onchip_clks[] = { | 744 | static struct clk * onchip_clks[] = { |
719 | /* non-ULPD clocks */ | 745 | /* non-ULPD clocks */ |
720 | &ck_ref, | 746 | &ck_ref, |
@@ -763,6 +789,7 @@ static struct clk * onchip_clks[] = { | |||
763 | &mmc2_ck, | 789 | &mmc2_ck, |
764 | /* Virtual clocks */ | 790 | /* Virtual clocks */ |
765 | &virtual_ck_mpu, | 791 | &virtual_ck_mpu, |
792 | &i2c_fck, | ||
766 | }; | 793 | }; |
767 | 794 | ||
768 | #endif | 795 | #endif |