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author | Chris Zankel <chris@zankel.net> | 2008-02-12 16:17:07 -0500 |
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committer | Chris Zankel <chris@zankel.net> | 2008-02-13 20:41:43 -0500 |
commit | c658eac628aa8df040dfe614556d95e6da3a9ffb (patch) | |
tree | e2211e1d5c894c29e92d4c744f504b38410efe41 /arch/arm/mach-omap1 | |
parent | 71d28e6c285548106f551fde13ca6d589433d843 (diff) |
[XTENSA] Add support for configurable registers and coprocessors
The Xtensa architecture allows to define custom instructions and
registers. Registers that are bound to a coprocessor are only
accessible if the corresponding enable bit is set, which allows
to implement a 'lazy' context switch mechanism. Other registers
needs to be saved and restore at the time of the context switch
or during interrupt handling.
This patch adds support for these additional states:
- save and restore registers that are used by the compiler upon
interrupt entry and exit.
- context switch additional registers unbound to any coprocessor
- 'lazy' context switch of registers bound to a coprocessor
- ptrace interface to provide access to additional registers
- update configuration files in include/asm-xtensa/variant-fsf
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/arm/mach-omap1')
0 files changed, 0 insertions, 0 deletions