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authorTony Lindgren <tony@atomide.com>2011-01-18 16:25:39 -0500
committerTony Lindgren <tony@atomide.com>2011-01-18 16:26:09 -0500
commitf376ea1780085196fcfff6bc27e8f6ddb324ae57 (patch)
tree4f4b8d75890b74ec7f57634ae0babe4c2045273f /arch/arm/mach-omap1
parent75d0c9e18c93428e0832c6552d0cbf395c5ebf1b (diff)
omap1: Fix sched_clock for the MPU timer
Otherwise systems using the MPU timer will hang. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r--arch/arm/mach-omap1/time.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 6ec65e599997..a39a15e4f3f9 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,11 +44,14 @@
44#include <linux/clocksource.h> 44#include <linux/clocksource.h>
45#include <linux/clockchips.h> 45#include <linux/clockchips.h>
46#include <linux/io.h> 46#include <linux/io.h>
47#include <linux/sched.h>
47 48
48#include <asm/system.h> 49#include <asm/system.h>
49#include <mach/hardware.h> 50#include <mach/hardware.h>
50#include <asm/leds.h> 51#include <asm/leds.h>
51#include <asm/irq.h> 52#include <asm/irq.h>
53#include <asm/sched_clock.h>
54
52#include <asm/mach/irq.h> 55#include <asm/mach/irq.h>
53#include <asm/mach/time.h> 56#include <asm/mach/time.h>
54 57
@@ -67,7 +70,7 @@ typedef struct {
67((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ 70((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
68 (n)*OMAP_MPU_TIMER_OFFSET)) 71 (n)*OMAP_MPU_TIMER_OFFSET))
69 72
70static inline unsigned long omap_mpu_timer_read(int nr) 73static inline unsigned long notrace omap_mpu_timer_read(int nr)
71{ 74{
72 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); 75 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
73 return timer->read_tim; 76 return timer->read_tim;
@@ -212,6 +215,14 @@ static struct clocksource clocksource_mpu = {
212 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 215 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
213}; 216};
214 217
218static DEFINE_CLOCK_DATA(cd);
219
220static void notrace mpu_update_sched_clock(void)
221{
222 u32 cyc = mpu_read(&clocksource_mpu);
223 update_sched_clock(&cd, cyc, (u32)~0);
224}
225
215static void __init omap_init_clocksource(unsigned long rate) 226static void __init omap_init_clocksource(unsigned long rate)
216{ 227{
217 static char err[] __initdata = KERN_ERR 228 static char err[] __initdata = KERN_ERR
@@ -219,6 +230,7 @@ static void __init omap_init_clocksource(unsigned long rate)
219 230
220 setup_irq(INT_TIMER2, &omap_mpu_timer2_irq); 231 setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
221 omap_mpu_timer_start(1, ~0, 1); 232 omap_mpu_timer_start(1, ~0, 1);
233 init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
222 234
223 if (clocksource_register_hz(&clocksource_mpu, rate)) 235 if (clocksource_register_hz(&clocksource_mpu, rate))
224 printk(err, clocksource_mpu.name); 236 printk(err, clocksource_mpu.name);