diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-08-16 13:42:58 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-08-16 13:42:58 -0400 |
commit | e4862f2f6f5653dfb67f3ba2b6f0bc74516ed51a (patch) | |
tree | 1db5a0540a4eecfad9b7daee476b985e82ddc810 /arch/arm/mach-omap1 | |
parent | ec62dbd7eb8e3dddb221da89ecbcea0fc3dee8c1 (diff) | |
parent | b2c1e07b81a126e5846dfc3d36f559d861df59f4 (diff) |
Merge branch 'for-2.6.36' into for-2.6.37
Fairly simple conflicts, the most serious ones are the i.MX ones which I
suspect now need another rename.
Conflicts:
arch/arm/mach-mx2/clock_imx27.c
arch/arm/mach-mx2/devices.c
arch/arm/mach-omap2/board-rx51-peripherals.c
arch/arm/mach-omap2/board-zoom2.c
sound/soc/fsl/mpc5200_dma.c
sound/soc/fsl/mpc5200_dma.h
sound/soc/fsl/mpc8610_hpcd.c
sound/soc/pxa/spitz.c
Diffstat (limited to 'arch/arm/mach-omap1')
28 files changed, 809 insertions, 409 deletions
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index b18d7c28ab7a..3b02d3b944af 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig | |||
@@ -1,3 +1,7 @@ | |||
1 | if ARCH_OMAP1 | ||
2 | |||
3 | menu "TI OMAP1 specific features" | ||
4 | |||
1 | comment "OMAP Core Type" | 5 | comment "OMAP Core Type" |
2 | depends on ARCH_OMAP1 | 6 | depends on ARCH_OMAP1 |
3 | 7 | ||
@@ -224,6 +228,12 @@ config OMAP_ARM_120MHZ | |||
224 | help | 228 | help |
225 | Enable 120MHz clock for OMAP CPU. If unsure, say N. | 229 | Enable 120MHz clock for OMAP CPU. If unsure, say N. |
226 | 230 | ||
231 | config OMAP_ARM_96MHZ | ||
232 | bool "OMAP ARM 96 MHz CPU" | ||
233 | depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) | ||
234 | help | ||
235 | Enable 96MHz clock for OMAP CPU. If unsure, say N. | ||
236 | |||
227 | config OMAP_ARM_60MHZ | 237 | config OMAP_ARM_60MHZ |
228 | bool "OMAP ARM 60 MHz CPU" | 238 | bool "OMAP ARM 60 MHz CPU" |
229 | depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) | 239 | depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) |
@@ -237,3 +247,6 @@ config OMAP_ARM_30MHZ | |||
237 | help | 247 | help |
238 | Enable 30MHz clock for OMAP CPU. If unsure, say N. | 248 | Enable 30MHz clock for OMAP CPU. If unsure, say N. |
239 | 249 | ||
250 | endmenu | ||
251 | |||
252 | endif | ||
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index ea231c7a550a..facfaeb1ae5c 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile | |||
@@ -23,6 +23,9 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y) | |||
23 | 23 | ||
24 | led-y := leds.o | 24 | led-y := leds.o |
25 | 25 | ||
26 | usb-fs-$(CONFIG_USB) := usb.o | ||
27 | obj-y += $(usb-fs-m) $(usb-fs-y) | ||
28 | |||
26 | # Specific board support | 29 | # Specific board support |
27 | obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o board-h2-mmc.o | 30 | obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o board-h2-mmc.o |
28 | obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o | 31 | obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o |
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index fdd1dd53fa9c..41992ab71961 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
@@ -235,7 +235,7 @@ static void __init ams_delta_init(void) | |||
235 | /* Clear latch2 (NAND, LCD, modem enable) */ | 235 | /* Clear latch2 (NAND, LCD, modem enable) */ |
236 | ams_delta_latch2_write(~0, 0); | 236 | ams_delta_latch2_write(~0, 0); |
237 | 237 | ||
238 | omap_usb_init(&ams_delta_usb_config); | 238 | omap1_usb_init(&ams_delta_usb_config); |
239 | platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); | 239 | platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); |
240 | 240 | ||
241 | #ifdef CONFIG_AMS_DELTA_FIQ | 241 | #ifdef CONFIG_AMS_DELTA_FIQ |
@@ -301,6 +301,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") | |||
301 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 301 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
302 | .boot_params = 0x10000100, | 302 | .boot_params = 0x10000100, |
303 | .map_io = ams_delta_map_io, | 303 | .map_io = ams_delta_map_io, |
304 | .reserve = omap_reserve, | ||
304 | .init_irq = ams_delta_init_irq, | 305 | .init_irq = ams_delta_init_irq, |
305 | .init_machine = ams_delta_init, | 306 | .init_machine = ams_delta_init, |
306 | .timer = &omap_timer, | 307 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 096f2ed102cb..180ce79e5eac 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c | |||
@@ -292,6 +292,18 @@ static void __init omap_fsample_init(void) | |||
292 | omap_cfg_reg(L3_1610_FLASH_CS2B_OE); | 292 | omap_cfg_reg(L3_1610_FLASH_CS2B_OE); |
293 | omap_cfg_reg(M8_1610_FLASH_CS2B_WE); | 293 | omap_cfg_reg(M8_1610_FLASH_CS2B_WE); |
294 | 294 | ||
295 | /* Mux pins for keypad */ | ||
296 | omap_cfg_reg(E2_7XX_KBR0); | ||
297 | omap_cfg_reg(J7_7XX_KBR1); | ||
298 | omap_cfg_reg(E1_7XX_KBR2); | ||
299 | omap_cfg_reg(F3_7XX_KBR3); | ||
300 | omap_cfg_reg(D2_7XX_KBR4); | ||
301 | omap_cfg_reg(C2_7XX_KBC0); | ||
302 | omap_cfg_reg(D3_7XX_KBC1); | ||
303 | omap_cfg_reg(E4_7XX_KBC2); | ||
304 | omap_cfg_reg(F4_7XX_KBC3); | ||
305 | omap_cfg_reg(E3_7XX_KBC4); | ||
306 | |||
295 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 307 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
296 | 308 | ||
297 | omap_board_config = fsample_config; | 309 | omap_board_config = fsample_config; |
@@ -378,6 +390,7 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") | |||
378 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 390 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
379 | .boot_params = 0x10000100, | 391 | .boot_params = 0x10000100, |
380 | .map_io = omap_fsample_map_io, | 392 | .map_io = omap_fsample_map_io, |
393 | .reserve = omap_reserve, | ||
381 | .init_irq = omap_fsample_init_irq, | 394 | .init_irq = omap_fsample_init_irq, |
382 | .init_machine = omap_fsample_init, | 395 | .init_machine = omap_fsample_init, |
383 | .timer = &omap_timer, | 396 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index e1195a3467b8..93b9ab8fc3be 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c | |||
@@ -72,12 +72,12 @@ static void __init omap_generic_init(void) | |||
72 | omap_cfg_reg(UART3_TX); | 72 | omap_cfg_reg(UART3_TX); |
73 | omap_cfg_reg(UART3_RX); | 73 | omap_cfg_reg(UART3_RX); |
74 | 74 | ||
75 | omap_usb_init(&generic1510_usb_config); | 75 | omap1_usb_init(&generic1510_usb_config); |
76 | } | 76 | } |
77 | #endif | 77 | #endif |
78 | #if defined(CONFIG_ARCH_OMAP16XX) | 78 | #if defined(CONFIG_ARCH_OMAP16XX) |
79 | if (!cpu_is_omap1510()) { | 79 | if (!cpu_is_omap1510()) { |
80 | omap_usb_init(&generic1610_usb_config); | 80 | omap1_usb_init(&generic1610_usb_config); |
81 | } | 81 | } |
82 | #endif | 82 | #endif |
83 | 83 | ||
@@ -98,6 +98,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") | |||
98 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 98 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
99 | .boot_params = 0x10000100, | 99 | .boot_params = 0x10000100, |
100 | .map_io = omap_generic_map_io, | 100 | .map_io = omap_generic_map_io, |
101 | .reserve = omap_reserve, | ||
101 | .init_irq = omap_generic_init_irq, | 102 | .init_irq = omap_generic_init_irq, |
102 | .init_machine = omap_generic_init, | 103 | .init_machine = omap_generic_init, |
103 | .timer = &omap_timer, | 104 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index d1100e4f65ac..d2cda58bcc48 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
@@ -292,15 +292,6 @@ static struct platform_device h2_kp_device = { | |||
292 | 292 | ||
293 | #define H2_IRDA_FIRSEL_GPIO_PIN 17 | 293 | #define H2_IRDA_FIRSEL_GPIO_PIN 17 |
294 | 294 | ||
295 | #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) | ||
296 | static int h2_transceiver_mode(struct device *dev, int state) | ||
297 | { | ||
298 | /* SIR when low, else MIR/FIR when HIGH */ | ||
299 | gpio_set_value(H2_IRDA_FIRSEL_GPIO_PIN, !(state & IR_SIRMODE)); | ||
300 | return 0; | ||
301 | } | ||
302 | #endif | ||
303 | |||
304 | static struct omap_irda_config h2_irda_data = { | 295 | static struct omap_irda_config h2_irda_data = { |
305 | .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE, | 296 | .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE, |
306 | .rx_channel = OMAP_DMA_UART3_RX, | 297 | .rx_channel = OMAP_DMA_UART3_RX, |
@@ -437,14 +428,18 @@ static void __init h2_init(void) | |||
437 | /* omap_cfg_reg(U19_ARMIO1); */ /* CD */ | 428 | /* omap_cfg_reg(U19_ARMIO1); */ /* CD */ |
438 | omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ | 429 | omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ |
439 | 430 | ||
440 | /* Irda */ | 431 | /* Mux pins for keypad */ |
441 | #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) | 432 | omap_cfg_reg(F18_1610_KBC0); |
442 | omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A); | 433 | omap_cfg_reg(D20_1610_KBC1); |
443 | if (gpio_request(H2_IRDA_FIRSEL_GPIO_PIN, "IRDA mode") < 0) | 434 | omap_cfg_reg(D19_1610_KBC2); |
444 | BUG(); | 435 | omap_cfg_reg(E18_1610_KBC3); |
445 | gpio_direction_output(H2_IRDA_FIRSEL_GPIO_PIN, 0); | 436 | omap_cfg_reg(C21_1610_KBC4); |
446 | h2_irda_data.transceiver_mode = h2_transceiver_mode; | 437 | omap_cfg_reg(G18_1610_KBR0); |
447 | #endif | 438 | omap_cfg_reg(F19_1610_KBR1); |
439 | omap_cfg_reg(H14_1610_KBR2); | ||
440 | omap_cfg_reg(E20_1610_KBR3); | ||
441 | omap_cfg_reg(E19_1610_KBR4); | ||
442 | omap_cfg_reg(N19_1610_KBR5); | ||
448 | 443 | ||
449 | platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); | 444 | platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); |
450 | omap_board_config = h2_config; | 445 | omap_board_config = h2_config; |
@@ -452,7 +447,7 @@ static void __init h2_init(void) | |||
452 | omap_serial_init(); | 447 | omap_serial_init(); |
453 | omap_register_i2c_bus(1, 100, h2_i2c_board_info, | 448 | omap_register_i2c_bus(1, 100, h2_i2c_board_info, |
454 | ARRAY_SIZE(h2_i2c_board_info)); | 449 | ARRAY_SIZE(h2_i2c_board_info)); |
455 | omap_usb_init(&h2_usb_config); | 450 | omap1_usb_init(&h2_usb_config); |
456 | h2_mmc_init(); | 451 | h2_mmc_init(); |
457 | } | 452 | } |
458 | 453 | ||
@@ -467,6 +462,7 @@ MACHINE_START(OMAP_H2, "TI-H2") | |||
467 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 462 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
468 | .boot_params = 0x10000100, | 463 | .boot_params = 0x10000100, |
469 | .map_io = h2_map_io, | 464 | .map_io = h2_map_io, |
465 | .reserve = omap_reserve, | ||
470 | .init_irq = h2_init_irq, | 466 | .init_irq = h2_init_irq, |
471 | .init_machine = h2_init, | 467 | .init_machine = h2_init, |
472 | .timer = &omap_timer, | 468 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index a53ab8297d25..c2ef4ff846c7 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
@@ -397,6 +397,19 @@ static void __init h3_init(void) | |||
397 | /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ | 397 | /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ |
398 | omap_cfg_reg(V2_1710_GPIO10); | 398 | omap_cfg_reg(V2_1710_GPIO10); |
399 | 399 | ||
400 | /* Mux pins for keypad */ | ||
401 | omap_cfg_reg(F18_1610_KBC0); | ||
402 | omap_cfg_reg(D20_1610_KBC1); | ||
403 | omap_cfg_reg(D19_1610_KBC2); | ||
404 | omap_cfg_reg(E18_1610_KBC3); | ||
405 | omap_cfg_reg(C21_1610_KBC4); | ||
406 | omap_cfg_reg(G18_1610_KBR0); | ||
407 | omap_cfg_reg(F19_1610_KBR1); | ||
408 | omap_cfg_reg(H14_1610_KBR2); | ||
409 | omap_cfg_reg(E20_1610_KBR3); | ||
410 | omap_cfg_reg(E19_1610_KBR4); | ||
411 | omap_cfg_reg(N19_1610_KBR5); | ||
412 | |||
400 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 413 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
401 | spi_register_board_info(h3_spi_board_info, | 414 | spi_register_board_info(h3_spi_board_info, |
402 | ARRAY_SIZE(h3_spi_board_info)); | 415 | ARRAY_SIZE(h3_spi_board_info)); |
@@ -405,7 +418,7 @@ static void __init h3_init(void) | |||
405 | omap_serial_init(); | 418 | omap_serial_init(); |
406 | omap_register_i2c_bus(1, 100, h3_i2c_board_info, | 419 | omap_register_i2c_bus(1, 100, h3_i2c_board_info, |
407 | ARRAY_SIZE(h3_i2c_board_info)); | 420 | ARRAY_SIZE(h3_i2c_board_info)); |
408 | omap_usb_init(&h3_usb_config); | 421 | omap1_usb_init(&h3_usb_config); |
409 | h3_mmc_init(); | 422 | h3_mmc_init(); |
410 | } | 423 | } |
411 | 424 | ||
@@ -437,6 +450,7 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") | |||
437 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 450 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
438 | .boot_params = 0x10000100, | 451 | .boot_params = 0x10000100, |
439 | .map_io = h3_map_io, | 452 | .map_io = h3_map_io, |
453 | .reserve = omap_reserve, | ||
440 | .init_irq = h3_init_irq, | 454 | .init_irq = h3_init_irq, |
441 | .init_machine = h3_init, | 455 | .init_machine = h3_init, |
442 | .timer = &omap_timer, | 456 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 8e313b4b99a9..311899ff5ffc 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c | |||
@@ -287,7 +287,7 @@ static void __init htcherald_init(void) | |||
287 | htcherald_disable_watchdog(); | 287 | htcherald_disable_watchdog(); |
288 | 288 | ||
289 | htcherald_usb_enable(); | 289 | htcherald_usb_enable(); |
290 | omap_usb_init(&htcherald_usb_config); | 290 | omap1_usb_init(&htcherald_usb_config); |
291 | } | 291 | } |
292 | 292 | ||
293 | static void __init htcherald_init_irq(void) | 293 | static void __init htcherald_init_irq(void) |
@@ -304,6 +304,7 @@ MACHINE_START(HERALD, "HTC Herald") | |||
304 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 304 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
305 | .boot_params = 0x10000100, | 305 | .boot_params = 0x10000100, |
306 | .map_io = htcherald_map_io, | 306 | .map_io = htcherald_map_io, |
307 | .reserve = omap_reserve, | ||
307 | .init_irq = htcherald_init_irq, | 308 | .init_irq = htcherald_init_irq, |
308 | .init_machine = htcherald_init, | 309 | .init_machine = htcherald_init, |
309 | .timer = &omap_timer, | 310 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 5d12fd35681b..3daf87ad2576 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
@@ -422,13 +422,13 @@ static void __init innovator_init(void) | |||
422 | 422 | ||
423 | #ifdef CONFIG_ARCH_OMAP15XX | 423 | #ifdef CONFIG_ARCH_OMAP15XX |
424 | if (cpu_is_omap1510()) { | 424 | if (cpu_is_omap1510()) { |
425 | omap_usb_init(&innovator1510_usb_config); | 425 | omap1_usb_init(&innovator1510_usb_config); |
426 | innovator_config[1].data = &innovator1510_lcd_config; | 426 | innovator_config[1].data = &innovator1510_lcd_config; |
427 | } | 427 | } |
428 | #endif | 428 | #endif |
429 | #ifdef CONFIG_ARCH_OMAP16XX | 429 | #ifdef CONFIG_ARCH_OMAP16XX |
430 | if (cpu_is_omap1610()) { | 430 | if (cpu_is_omap1610()) { |
431 | omap_usb_init(&h2_usb_config); | 431 | omap1_usb_init(&h2_usb_config); |
432 | innovator_config[1].data = &innovator1610_lcd_config; | 432 | innovator_config[1].data = &innovator1610_lcd_config; |
433 | } | 433 | } |
434 | #endif | 434 | #endif |
@@ -463,6 +463,7 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") | |||
463 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 463 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
464 | .boot_params = 0x10000100, | 464 | .boot_params = 0x10000100, |
465 | .map_io = innovator_map_io, | 465 | .map_io = innovator_map_io, |
466 | .reserve = omap_reserve, | ||
466 | .init_irq = innovator_init_irq, | 467 | .init_irq = innovator_init_irq, |
467 | .init_machine = innovator_init, | 468 | .init_machine = innovator_init, |
468 | .timer = &omap_timer, | 469 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 71e1a3fad0ea..51a4539aecf5 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <plat/board.h> | 32 | #include <plat/board.h> |
33 | #include <plat/keypad.h> | 33 | #include <plat/keypad.h> |
34 | #include <plat/common.h> | 34 | #include <plat/common.h> |
35 | #include <plat/dsp_common.h> | ||
36 | #include <plat/hwa742.h> | 35 | #include <plat/hwa742.h> |
37 | #include <plat/lcd_mipid.h> | 36 | #include <plat/lcd_mipid.h> |
38 | #include <plat/mmc.h> | 37 | #include <plat/mmc.h> |
@@ -242,138 +241,6 @@ static inline void nokia770_mmc_init(void) | |||
242 | } | 241 | } |
243 | #endif | 242 | #endif |
244 | 243 | ||
245 | #if defined(CONFIG_OMAP_DSP) | ||
246 | /* | ||
247 | * audio power control | ||
248 | */ | ||
249 | #define HEADPHONE_GPIO 14 | ||
250 | #define AMPLIFIER_CTRL_GPIO 58 | ||
251 | |||
252 | static struct clk *dspxor_ck; | ||
253 | static DEFINE_MUTEX(audio_pwr_lock); | ||
254 | /* | ||
255 | * audio_pwr_state | ||
256 | * +--+-------------------------+---------------------------------------+ | ||
257 | * |-1|down |power-up request -> 0 | | ||
258 | * +--+-------------------------+---------------------------------------+ | ||
259 | * | 0|up |power-down(1) request -> 1 | | ||
260 | * | | |power-down(2) request -> (ignore) | | ||
261 | * +--+-------------------------+---------------------------------------+ | ||
262 | * | 1|up, |power-up request -> 0 | | ||
263 | * | |received down(1) request |power-down(2) request -> -1 | | ||
264 | * +--+-------------------------+---------------------------------------+ | ||
265 | */ | ||
266 | static int audio_pwr_state = -1; | ||
267 | |||
268 | static inline void aic23_power_up(void) | ||
269 | { | ||
270 | } | ||
271 | static inline void aic23_power_down(void) | ||
272 | { | ||
273 | } | ||
274 | |||
275 | /* | ||
276 | * audio_pwr_up / down should be called under audio_pwr_lock | ||
277 | */ | ||
278 | static void nokia770_audio_pwr_up(void) | ||
279 | { | ||
280 | clk_enable(dspxor_ck); | ||
281 | |||
282 | /* Turn on codec */ | ||
283 | aic23_power_up(); | ||
284 | |||
285 | if (gpio_get_value(HEADPHONE_GPIO)) | ||
286 | /* HP not connected, turn on amplifier */ | ||
287 | gpio_set_value(AMPLIFIER_CTRL_GPIO, 1); | ||
288 | else | ||
289 | /* HP connected, do not turn on amplifier */ | ||
290 | printk("HP connected\n"); | ||
291 | } | ||
292 | |||
293 | static void codec_delayed_power_down(struct work_struct *work) | ||
294 | { | ||
295 | mutex_lock(&audio_pwr_lock); | ||
296 | if (audio_pwr_state == -1) | ||
297 | aic23_power_down(); | ||
298 | clk_disable(dspxor_ck); | ||
299 | mutex_unlock(&audio_pwr_lock); | ||
300 | } | ||
301 | |||
302 | static DECLARE_DELAYED_WORK(codec_power_down_work, codec_delayed_power_down); | ||
303 | |||
304 | static void nokia770_audio_pwr_down(void) | ||
305 | { | ||
306 | /* Turn off amplifier */ | ||
307 | gpio_set_value(AMPLIFIER_CTRL_GPIO, 0); | ||
308 | |||
309 | /* Turn off codec: schedule delayed work */ | ||
310 | schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */ | ||
311 | } | ||
312 | |||
313 | static int | ||
314 | nokia770_audio_pwr_up_request(struct dsp_kfunc_device *kdev, int stage) | ||
315 | { | ||
316 | mutex_lock(&audio_pwr_lock); | ||
317 | if (audio_pwr_state == -1) | ||
318 | nokia770_audio_pwr_up(); | ||
319 | /* force audio_pwr_state = 0, even if it was 1. */ | ||
320 | audio_pwr_state = 0; | ||
321 | mutex_unlock(&audio_pwr_lock); | ||
322 | return 0; | ||
323 | } | ||
324 | |||
325 | static int | ||
326 | nokia770_audio_pwr_down_request(struct dsp_kfunc_device *kdev, int stage) | ||
327 | { | ||
328 | mutex_lock(&audio_pwr_lock); | ||
329 | switch (stage) { | ||
330 | case 1: | ||
331 | if (audio_pwr_state == 0) | ||
332 | audio_pwr_state = 1; | ||
333 | break; | ||
334 | case 2: | ||
335 | if (audio_pwr_state == 1) { | ||
336 | nokia770_audio_pwr_down(); | ||
337 | audio_pwr_state = -1; | ||
338 | } | ||
339 | break; | ||
340 | } | ||
341 | mutex_unlock(&audio_pwr_lock); | ||
342 | return 0; | ||
343 | } | ||
344 | |||
345 | static struct dsp_kfunc_device nokia770_audio_device = { | ||
346 | .name = "audio", | ||
347 | .type = DSP_KFUNC_DEV_TYPE_AUDIO, | ||
348 | .enable = nokia770_audio_pwr_up_request, | ||
349 | .disable = nokia770_audio_pwr_down_request, | ||
350 | }; | ||
351 | |||
352 | static __init int omap_dsp_init(void) | ||
353 | { | ||
354 | int ret; | ||
355 | |||
356 | dspxor_ck = clk_get(0, "dspxor_ck"); | ||
357 | if (IS_ERR(dspxor_ck)) { | ||
358 | printk(KERN_ERR "couldn't acquire dspxor_ck\n"); | ||
359 | return PTR_ERR(dspxor_ck); | ||
360 | } | ||
361 | |||
362 | ret = dsp_kfunc_device_register(&nokia770_audio_device); | ||
363 | if (ret) { | ||
364 | printk(KERN_ERR | ||
365 | "KFUNC device registration faild: %s\n", | ||
366 | nokia770_audio_device.name); | ||
367 | goto out; | ||
368 | } | ||
369 | return 0; | ||
370 | out: | ||
371 | return ret; | ||
372 | } | ||
373 | #else | ||
374 | #define omap_dsp_init() do {} while (0) | ||
375 | #endif /* CONFIG_OMAP_DSP */ | ||
376 | |||
377 | static void __init omap_nokia770_init(void) | 244 | static void __init omap_nokia770_init(void) |
378 | { | 245 | { |
379 | platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); | 246 | platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); |
@@ -382,11 +249,10 @@ static void __init omap_nokia770_init(void) | |||
382 | omap_gpio_init(); | 249 | omap_gpio_init(); |
383 | omap_serial_init(); | 250 | omap_serial_init(); |
384 | omap_register_i2c_bus(1, 100, NULL, 0); | 251 | omap_register_i2c_bus(1, 100, NULL, 0); |
385 | omap_dsp_init(); | ||
386 | hwa742_dev_init(); | 252 | hwa742_dev_init(); |
387 | ads7846_dev_init(); | 253 | ads7846_dev_init(); |
388 | mipid_dev_init(); | 254 | mipid_dev_init(); |
389 | omap_usb_init(&nokia770_usb_config); | 255 | omap1_usb_init(&nokia770_usb_config); |
390 | nokia770_mmc_init(); | 256 | nokia770_mmc_init(); |
391 | } | 257 | } |
392 | 258 | ||
@@ -400,6 +266,7 @@ MACHINE_START(NOKIA770, "Nokia 770") | |||
400 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 266 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
401 | .boot_params = 0x10000100, | 267 | .boot_params = 0x10000100, |
402 | .map_io = omap_nokia770_map_io, | 268 | .map_io = omap_nokia770_map_io, |
269 | .reserve = omap_reserve, | ||
403 | .init_irq = omap_nokia770_init_irq, | 270 | .init_irq = omap_nokia770_init_irq, |
404 | .init_machine = omap_nokia770_init, | 271 | .init_machine = omap_nokia770_init, |
405 | .timer = &omap_timer, | 272 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 80d862001def..679740cc1e90 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
@@ -560,7 +560,7 @@ static void __init osk_init(void) | |||
560 | l |= (3 << 1); | 560 | l |= (3 << 1); |
561 | omap_writel(l, USB_TRANSCEIVER_CTRL); | 561 | omap_writel(l, USB_TRANSCEIVER_CTRL); |
562 | 562 | ||
563 | omap_usb_init(&osk_usb_config); | 563 | omap1_usb_init(&osk_usb_config); |
564 | 564 | ||
565 | /* irq for tps65010 chip */ | 565 | /* irq for tps65010 chip */ |
566 | /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */ | 566 | /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */ |
@@ -584,6 +584,7 @@ MACHINE_START(OMAP_OSK, "TI-OSK") | |||
584 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 584 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
585 | .boot_params = 0x10000100, | 585 | .boot_params = 0x10000100, |
586 | .map_io = osk_map_io, | 586 | .map_io = osk_map_io, |
587 | .reserve = omap_reserve, | ||
587 | .init_irq = osk_init_irq, | 588 | .init_irq = osk_init_irq, |
588 | .init_machine = osk_init, | 589 | .init_machine = osk_init, |
589 | .timer = &omap_timer, | 590 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 569b4c9085cd..782bb257a85d 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
@@ -213,90 +213,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = { | |||
213 | .ctrl_name = "internal", | 213 | .ctrl_name = "internal", |
214 | }; | 214 | }; |
215 | 215 | ||
216 | #ifdef CONFIG_APM | ||
217 | /* | ||
218 | * Values measured in 10 minute intervals averaged over 10 samples. | ||
219 | * May differ slightly from device to device but should be accurate | ||
220 | * enough to give basic idea of battery life left and trigger | ||
221 | * potential alerts. | ||
222 | */ | ||
223 | static const int palmte_battery_sample[] = { | ||
224 | 2194, 2157, 2138, 2120, | ||
225 | 2104, 2089, 2075, 2061, | ||
226 | 2048, 2038, 2026, 2016, | ||
227 | 2008, 1998, 1989, 1980, | ||
228 | 1970, 1958, 1945, 1928, | ||
229 | 1910, 1888, 1860, 1827, | ||
230 | 1791, 1751, 1709, 1656, | ||
231 | }; | ||
232 | |||
233 | #define INTERVAL 10 | ||
234 | #define BATTERY_HIGH_TRESHOLD 66 | ||
235 | #define BATTERY_LOW_TRESHOLD 33 | ||
236 | |||
237 | static void palmte_get_power_status(struct apm_power_info *info, int *battery) | ||
238 | { | ||
239 | int charging, batt, hi, lo, mid; | ||
240 | |||
241 | charging = !gpio_get_value(PALMTE_DC_GPIO); | ||
242 | batt = battery[0]; | ||
243 | if (charging) | ||
244 | batt -= 60; | ||
245 | |||
246 | hi = ARRAY_SIZE(palmte_battery_sample); | ||
247 | lo = 0; | ||
248 | |||
249 | info->battery_flag = 0; | ||
250 | info->units = APM_UNITS_MINS; | ||
251 | |||
252 | if (batt > palmte_battery_sample[lo]) { | ||
253 | info->battery_life = 100; | ||
254 | info->time = INTERVAL * ARRAY_SIZE(palmte_battery_sample); | ||
255 | } else if (batt <= palmte_battery_sample[hi - 1]) { | ||
256 | info->battery_life = 0; | ||
257 | info->time = 0; | ||
258 | } else { | ||
259 | while (hi > lo + 1) { | ||
260 | mid = (hi + lo) >> 1; | ||
261 | if (batt <= palmte_battery_sample[mid]) | ||
262 | lo = mid; | ||
263 | else | ||
264 | hi = mid; | ||
265 | } | ||
266 | |||
267 | mid = palmte_battery_sample[lo] - palmte_battery_sample[hi]; | ||
268 | hi = palmte_battery_sample[lo] - batt; | ||
269 | info->battery_life = 100 - (100 * lo + 100 * hi / mid) / | ||
270 | ARRAY_SIZE(palmte_battery_sample); | ||
271 | info->time = INTERVAL * (ARRAY_SIZE(palmte_battery_sample) - | ||
272 | lo) - INTERVAL * hi / mid; | ||
273 | } | ||
274 | |||
275 | if (charging) { | ||
276 | info->ac_line_status = APM_AC_ONLINE; | ||
277 | info->battery_status = APM_BATTERY_STATUS_CHARGING; | ||
278 | info->battery_flag |= APM_BATTERY_FLAG_CHARGING; | ||
279 | } else { | ||
280 | info->ac_line_status = APM_AC_OFFLINE; | ||
281 | if (info->battery_life > BATTERY_HIGH_TRESHOLD) | ||
282 | info->battery_status = APM_BATTERY_STATUS_HIGH; | ||
283 | else if (info->battery_life > BATTERY_LOW_TRESHOLD) | ||
284 | info->battery_status = APM_BATTERY_STATUS_LOW; | ||
285 | else | ||
286 | info->battery_status = APM_BATTERY_STATUS_CRITICAL; | ||
287 | } | ||
288 | |||
289 | if (info->battery_life > BATTERY_HIGH_TRESHOLD) | ||
290 | info->battery_flag |= APM_BATTERY_FLAG_HIGH; | ||
291 | else if (info->battery_life > BATTERY_LOW_TRESHOLD) | ||
292 | info->battery_flag |= APM_BATTERY_FLAG_LOW; | ||
293 | else | ||
294 | info->battery_flag |= APM_BATTERY_FLAG_CRITICAL; | ||
295 | } | ||
296 | #else | ||
297 | #define palmte_get_power_status NULL | ||
298 | #endif | ||
299 | |||
300 | static struct omap_board_config_kernel palmte_config[] __initdata = { | 216 | static struct omap_board_config_kernel palmte_config[] __initdata = { |
301 | { OMAP_TAG_LCD, &palmte_lcd_config }, | 217 | { OMAP_TAG_LCD, &palmte_lcd_config }, |
302 | }; | 218 | }; |
@@ -359,7 +275,7 @@ static void __init omap_palmte_init(void) | |||
359 | spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); | 275 | spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); |
360 | palmte_misc_gpio_setup(); | 276 | palmte_misc_gpio_setup(); |
361 | omap_serial_init(); | 277 | omap_serial_init(); |
362 | omap_usb_init(&palmte_usb_config); | 278 | omap1_usb_init(&palmte_usb_config); |
363 | omap_register_i2c_bus(1, 100, NULL, 0); | 279 | omap_register_i2c_bus(1, 100, NULL, 0); |
364 | } | 280 | } |
365 | 281 | ||
@@ -373,6 +289,7 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") | |||
373 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 289 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
374 | .boot_params = 0x10000100, | 290 | .boot_params = 0x10000100, |
375 | .map_io = omap_palmte_map_io, | 291 | .map_io = omap_palmte_map_io, |
292 | .reserve = omap_reserve, | ||
376 | .init_irq = omap_palmte_init_irq, | 293 | .init_irq = omap_palmte_init_irq, |
377 | .init_machine = omap_palmte_init, | 294 | .init_machine = omap_palmte_init, |
378 | .timer = &omap_timer, | 295 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 6ad49a2cc1a0..0b35ef54a64f 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
@@ -307,7 +307,7 @@ static void __init omap_palmtt_init(void) | |||
307 | 307 | ||
308 | spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); | 308 | spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); |
309 | omap_serial_init(); | 309 | omap_serial_init(); |
310 | omap_usb_init(&palmtt_usb_config); | 310 | omap1_usb_init(&palmtt_usb_config); |
311 | omap_register_i2c_bus(1, 100, NULL, 0); | 311 | omap_register_i2c_bus(1, 100, NULL, 0); |
312 | } | 312 | } |
313 | 313 | ||
@@ -321,6 +321,7 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") | |||
321 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 321 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
322 | .boot_params = 0x10000100, | 322 | .boot_params = 0x10000100, |
323 | .map_io = omap_palmtt_map_io, | 323 | .map_io = omap_palmtt_map_io, |
324 | .reserve = omap_reserve, | ||
324 | .init_irq = omap_palmtt_init_irq, | 325 | .init_irq = omap_palmtt_init_irq, |
325 | .init_machine = omap_palmtt_init, | 326 | .init_machine = omap_palmtt_init, |
326 | .timer = &omap_timer, | 327 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 6641de9257ef..66362903b6e2 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
@@ -325,7 +325,7 @@ omap_palmz71_init(void) | |||
325 | 325 | ||
326 | spi_register_board_info(palmz71_boardinfo, | 326 | spi_register_board_info(palmz71_boardinfo, |
327 | ARRAY_SIZE(palmz71_boardinfo)); | 327 | ARRAY_SIZE(palmz71_boardinfo)); |
328 | omap_usb_init(&palmz71_usb_config); | 328 | omap1_usb_init(&palmz71_usb_config); |
329 | omap_serial_init(); | 329 | omap_serial_init(); |
330 | omap_register_i2c_bus(1, 100, NULL, 0); | 330 | omap_register_i2c_bus(1, 100, NULL, 0); |
331 | palmz71_gpio_setup(0); | 331 | palmz71_gpio_setup(0); |
@@ -338,10 +338,12 @@ omap_palmz71_map_io(void) | |||
338 | } | 338 | } |
339 | 339 | ||
340 | MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") | 340 | MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") |
341 | .phys_io = 0xfff00000, | 341 | .phys_io = 0xfff00000, |
342 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 342 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
343 | .boot_params = 0x10000100,.map_io = omap_palmz71_map_io, | 343 | .boot_params = 0x10000100, |
344 | .init_irq = omap_palmz71_init_irq, | 344 | .map_io = omap_palmz71_map_io, |
345 | .init_machine = omap_palmz71_init, | 345 | .reserve = omap_reserve, |
346 | .timer = &omap_timer, | 346 | .init_irq = omap_palmz71_init_irq, |
347 | .init_machine = omap_palmz71_init, | ||
348 | .timer = &omap_timer, | ||
347 | MACHINE_END | 349 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index e854d5741c88..34ab354758b0 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
@@ -260,6 +260,18 @@ static void __init omap_perseus2_init(void) | |||
260 | omap_cfg_reg(L3_1610_FLASH_CS2B_OE); | 260 | omap_cfg_reg(L3_1610_FLASH_CS2B_OE); |
261 | omap_cfg_reg(M8_1610_FLASH_CS2B_WE); | 261 | omap_cfg_reg(M8_1610_FLASH_CS2B_WE); |
262 | 262 | ||
263 | /* Mux pins for keypad */ | ||
264 | omap_cfg_reg(E2_7XX_KBR0); | ||
265 | omap_cfg_reg(J7_7XX_KBR1); | ||
266 | omap_cfg_reg(E1_7XX_KBR2); | ||
267 | omap_cfg_reg(F3_7XX_KBR3); | ||
268 | omap_cfg_reg(D2_7XX_KBR4); | ||
269 | omap_cfg_reg(C2_7XX_KBC0); | ||
270 | omap_cfg_reg(D3_7XX_KBC1); | ||
271 | omap_cfg_reg(E4_7XX_KBC2); | ||
272 | omap_cfg_reg(F4_7XX_KBC3); | ||
273 | omap_cfg_reg(E3_7XX_KBC4); | ||
274 | |||
263 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 275 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
264 | 276 | ||
265 | omap_board_config = perseus2_config; | 277 | omap_board_config = perseus2_config; |
@@ -339,6 +351,7 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") | |||
339 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 351 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
340 | .boot_params = 0x10000100, | 352 | .boot_params = 0x10000100, |
341 | .map_io = omap_perseus2_map_io, | 353 | .map_io = omap_perseus2_map_io, |
354 | .reserve = omap_reserve, | ||
342 | .init_irq = omap_perseus2_init_irq, | 355 | .init_irq = omap_perseus2_init_irq, |
343 | .init_machine = omap_perseus2_init, | 356 | .init_machine = omap_perseus2_init, |
344 | .timer = &omap_timer, | 357 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 2fb1e5f8e2ec..2eb148b8de93 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
@@ -392,7 +392,7 @@ static void __init omap_sx1_init(void) | |||
392 | omap_board_config_size = ARRAY_SIZE(sx1_config); | 392 | omap_board_config_size = ARRAY_SIZE(sx1_config); |
393 | omap_serial_init(); | 393 | omap_serial_init(); |
394 | omap_register_i2c_bus(1, 100, NULL, 0); | 394 | omap_register_i2c_bus(1, 100, NULL, 0); |
395 | omap_usb_init(&sx1_usb_config); | 395 | omap1_usb_init(&sx1_usb_config); |
396 | sx1_mmc_init(); | 396 | sx1_mmc_init(); |
397 | 397 | ||
398 | /* turn on USB power */ | 398 | /* turn on USB power */ |
@@ -423,7 +423,8 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1") | |||
423 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 423 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
424 | .boot_params = 0x10000100, | 424 | .boot_params = 0x10000100, |
425 | .map_io = omap_sx1_map_io, | 425 | .map_io = omap_sx1_map_io, |
426 | .init_irq = omap_sx1_init_irq, | 426 | .reserve = omap_reserve, |
427 | .init_irq = omap_sx1_init_irq, | ||
427 | .init_machine = omap_sx1_init, | 428 | .init_machine = omap_sx1_init, |
428 | .timer = &omap_timer, | 429 | .timer = &omap_timer, |
429 | MACHINE_END | 430 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 87b9436fe7c0..6b3cf14bc757 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
@@ -198,7 +198,7 @@ static void __init voiceblue_init(void) | |||
198 | omap_board_config = voiceblue_config; | 198 | omap_board_config = voiceblue_config; |
199 | omap_board_config_size = ARRAY_SIZE(voiceblue_config); | 199 | omap_board_config_size = ARRAY_SIZE(voiceblue_config); |
200 | omap_serial_init(); | 200 | omap_serial_init(); |
201 | omap_usb_init(&voiceblue_usb_config); | 201 | omap1_usb_init(&voiceblue_usb_config); |
202 | omap_register_i2c_bus(1, 100, NULL, 0); | 202 | omap_register_i2c_bus(1, 100, NULL, 0); |
203 | 203 | ||
204 | /* There is a good chance board is going up, so enable power LED | 204 | /* There is a good chance board is going up, so enable power LED |
@@ -287,6 +287,7 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") | |||
287 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 287 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
288 | .boot_params = 0x10000100, | 288 | .boot_params = 0x10000100, |
289 | .map_io = voiceblue_map_io, | 289 | .map_io = voiceblue_map_io, |
290 | .reserve = omap_reserve, | ||
290 | .init_irq = voiceblue_init_irq, | 291 | .init_irq = voiceblue_init_irq, |
291 | .init_machine = voiceblue_init, | 292 | .init_machine = voiceblue_init, |
292 | .timer = &omap_timer, | 293 | .timer = &omap_timer, |
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 6bbb1b8b8294..b8c7fb9d7921 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -11,7 +11,6 @@ | |||
11 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
16 | #include <linux/list.h> | 15 | #include <linux/list.h> |
17 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
@@ -34,9 +33,9 @@ | |||
34 | __u32 arm_idlect1_mask; | 33 | __u32 arm_idlect1_mask; |
35 | struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; | 34 | struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; |
36 | 35 | ||
37 | /*------------------------------------------------------------------------- | 36 | /* |
38 | * Omap1 specific clock functions | 37 | * Omap1 specific clock functions |
39 | *-------------------------------------------------------------------------*/ | 38 | */ |
40 | 39 | ||
41 | unsigned long omap1_uart_recalc(struct clk *clk) | 40 | unsigned long omap1_uart_recalc(struct clk *clk) |
42 | { | 41 | { |
@@ -523,7 +522,8 @@ const struct clkops clkops_dspck = { | |||
523 | .disable = omap1_clk_disable_dsp_domain, | 522 | .disable = omap1_clk_disable_dsp_domain, |
524 | }; | 523 | }; |
525 | 524 | ||
526 | static int omap1_clk_enable_uart_functional(struct clk *clk) | 525 | /* XXX SYSC register handling does not belong in the clock framework */ |
526 | static int omap1_clk_enable_uart_functional_16xx(struct clk *clk) | ||
527 | { | 527 | { |
528 | int ret; | 528 | int ret; |
529 | struct uart_clk *uclk; | 529 | struct uart_clk *uclk; |
@@ -539,7 +539,8 @@ static int omap1_clk_enable_uart_functional(struct clk *clk) | |||
539 | return ret; | 539 | return ret; |
540 | } | 540 | } |
541 | 541 | ||
542 | static void omap1_clk_disable_uart_functional(struct clk *clk) | 542 | /* XXX SYSC register handling does not belong in the clock framework */ |
543 | static void omap1_clk_disable_uart_functional_16xx(struct clk *clk) | ||
543 | { | 544 | { |
544 | struct uart_clk *uclk; | 545 | struct uart_clk *uclk; |
545 | 546 | ||
@@ -550,9 +551,10 @@ static void omap1_clk_disable_uart_functional(struct clk *clk) | |||
550 | omap1_clk_disable_generic(clk); | 551 | omap1_clk_disable_generic(clk); |
551 | } | 552 | } |
552 | 553 | ||
553 | const struct clkops clkops_uart = { | 554 | /* XXX SYSC register handling does not belong in the clock framework */ |
554 | .enable = omap1_clk_enable_uart_functional, | 555 | const struct clkops clkops_uart_16xx = { |
555 | .disable = omap1_clk_disable_uart_functional, | 556 | .enable = omap1_clk_enable_uart_functional_16xx, |
557 | .disable = omap1_clk_disable_uart_functional_16xx, | ||
556 | }; | 558 | }; |
557 | 559 | ||
558 | long omap1_clk_round_rate(struct clk *clk, unsigned long rate) | 560 | long omap1_clk_round_rate(struct clk *clk, unsigned long rate) |
@@ -572,9 +574,9 @@ int omap1_clk_set_rate(struct clk *clk, unsigned long rate) | |||
572 | return ret; | 574 | return ret; |
573 | } | 575 | } |
574 | 576 | ||
575 | /*------------------------------------------------------------------------- | 577 | /* |
576 | * Omap1 clock reset and init functions | 578 | * Omap1 clock reset and init functions |
577 | *-------------------------------------------------------------------------*/ | 579 | */ |
578 | 580 | ||
579 | #ifdef CONFIG_OMAP_RESET_CLOCKS | 581 | #ifdef CONFIG_OMAP_RESET_CLOCKS |
580 | 582 | ||
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 75d0d7d90bff..eaf09efb91ca 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h | |||
@@ -107,7 +107,7 @@ extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; | |||
107 | 107 | ||
108 | extern const struct clkops clkops_dspck; | 108 | extern const struct clkops clkops_dspck; |
109 | extern const struct clkops clkops_dummy; | 109 | extern const struct clkops clkops_dummy; |
110 | extern const struct clkops clkops_uart; | 110 | extern const struct clkops clkops_uart_16xx; |
111 | extern const struct clkops clkops_generic; | 111 | extern const struct clkops clkops_generic; |
112 | 112 | ||
113 | #endif | 113 | #endif |
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index aa8558adbf1c..af54114b8f08 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c | |||
@@ -8,6 +8,10 @@ | |||
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | * | ||
12 | * To do: | ||
13 | * - Clocks that are only available on some chips should be marked with the | ||
14 | * chips that they are present on. | ||
11 | */ | 15 | */ |
12 | 16 | ||
13 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
@@ -23,9 +27,49 @@ | |||
23 | 27 | ||
24 | #include "clock.h" | 28 | #include "clock.h" |
25 | 29 | ||
26 | /*------------------------------------------------------------------------ | 30 | /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ |
31 | #define IDL_CLKOUT_ARM_SHIFT 12 | ||
32 | #define IDLTIM_ARM_SHIFT 9 | ||
33 | #define IDLAPI_ARM_SHIFT 8 | ||
34 | #define IDLIF_ARM_SHIFT 6 | ||
35 | #define IDLLB_ARM_SHIFT 4 /* undocumented? */ | ||
36 | #define OMAP1510_IDLLCD_ARM_SHIFT 3 /* undocumented? */ | ||
37 | #define IDLPER_ARM_SHIFT 2 | ||
38 | #define IDLXORP_ARM_SHIFT 1 | ||
39 | #define IDLWDT_ARM_SHIFT 0 | ||
40 | |||
41 | /* Some MOD_CONF_CTRL_0 bit shifts - used in struct clk.enable_bit */ | ||
42 | #define CONF_MOD_UART3_CLK_MODE_R 31 | ||
43 | #define CONF_MOD_UART2_CLK_MODE_R 30 | ||
44 | #define CONF_MOD_UART1_CLK_MODE_R 29 | ||
45 | #define CONF_MOD_MMC_SD_CLK_REQ_R 23 | ||
46 | #define CONF_MOD_MCBSP3_AUXON 20 | ||
47 | |||
48 | /* Some MOD_CONF_CTRL_1 bit shifts - used in struct clk.enable_bit */ | ||
49 | #define CONF_MOD_SOSSI_CLK_EN_R 16 | ||
50 | |||
51 | /* Some OTG_SYSCON_2-specific bit fields */ | ||
52 | #define OTG_SYSCON_2_UHOST_EN_SHIFT 8 | ||
53 | |||
54 | /* Some SOFT_REQ_REG bit fields - used in struct clk.enable_bit */ | ||
55 | #define SOFT_MMC2_DPLL_REQ_SHIFT 13 | ||
56 | #define SOFT_MMC_DPLL_REQ_SHIFT 12 | ||
57 | #define SOFT_UART3_DPLL_REQ_SHIFT 11 | ||
58 | #define SOFT_UART2_DPLL_REQ_SHIFT 10 | ||
59 | #define SOFT_UART1_DPLL_REQ_SHIFT 9 | ||
60 | #define SOFT_USB_OTG_DPLL_REQ_SHIFT 8 | ||
61 | #define SOFT_CAM_DPLL_REQ_SHIFT 7 | ||
62 | #define SOFT_COM_MCKO_REQ_SHIFT 6 | ||
63 | #define SOFT_PERIPH_REQ_SHIFT 5 /* sys_ck gate for UART2 ? */ | ||
64 | #define USB_REQ_EN_SHIFT 4 | ||
65 | #define SOFT_USB_REQ_SHIFT 3 /* sys_ck gate for USB host? */ | ||
66 | #define SOFT_SDW_REQ_SHIFT 2 /* sys_ck gate for Bluetooth? */ | ||
67 | #define SOFT_COM_REQ_SHIFT 1 /* sys_ck gate for com proc? */ | ||
68 | #define SOFT_DPLL_REQ_SHIFT 0 | ||
69 | |||
70 | /* | ||
27 | * Omap1 clocks | 71 | * Omap1 clocks |
28 | *-------------------------------------------------------------------------*/ | 72 | */ |
29 | 73 | ||
30 | static struct clk ck_ref = { | 74 | static struct clk ck_ref = { |
31 | .name = "ck_ref", | 75 | .name = "ck_ref", |
@@ -54,7 +98,7 @@ static struct arm_idlect1_clk ck_dpll1out = { | |||
54 | .enable_bit = EN_CKOUT_ARM, | 98 | .enable_bit = EN_CKOUT_ARM, |
55 | .recalc = &followparent_recalc, | 99 | .recalc = &followparent_recalc, |
56 | }, | 100 | }, |
57 | .idlect_shift = 12, | 101 | .idlect_shift = IDL_CLKOUT_ARM_SHIFT, |
58 | }; | 102 | }; |
59 | 103 | ||
60 | static struct clk sossi_ck = { | 104 | static struct clk sossi_ck = { |
@@ -63,7 +107,7 @@ static struct clk sossi_ck = { | |||
63 | .parent = &ck_dpll1out.clk, | 107 | .parent = &ck_dpll1out.clk, |
64 | .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, | 108 | .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, |
65 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), | 109 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), |
66 | .enable_bit = 16, | 110 | .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, |
67 | .recalc = &omap1_sossi_recalc, | 111 | .recalc = &omap1_sossi_recalc, |
68 | .set_rate = &omap1_set_sossi_rate, | 112 | .set_rate = &omap1_set_sossi_rate, |
69 | }; | 113 | }; |
@@ -91,7 +135,7 @@ static struct arm_idlect1_clk armper_ck = { | |||
91 | .round_rate = omap1_clk_round_rate_ckctl_arm, | 135 | .round_rate = omap1_clk_round_rate_ckctl_arm, |
92 | .set_rate = omap1_clk_set_rate_ckctl_arm, | 136 | .set_rate = omap1_clk_set_rate_ckctl_arm, |
93 | }, | 137 | }, |
94 | .idlect_shift = 2, | 138 | .idlect_shift = IDLPER_ARM_SHIFT, |
95 | }; | 139 | }; |
96 | 140 | ||
97 | /* | 141 | /* |
@@ -118,7 +162,7 @@ static struct arm_idlect1_clk armxor_ck = { | |||
118 | .enable_bit = EN_XORPCK, | 162 | .enable_bit = EN_XORPCK, |
119 | .recalc = &followparent_recalc, | 163 | .recalc = &followparent_recalc, |
120 | }, | 164 | }, |
121 | .idlect_shift = 1, | 165 | .idlect_shift = IDLXORP_ARM_SHIFT, |
122 | }; | 166 | }; |
123 | 167 | ||
124 | static struct arm_idlect1_clk armtim_ck = { | 168 | static struct arm_idlect1_clk armtim_ck = { |
@@ -131,7 +175,7 @@ static struct arm_idlect1_clk armtim_ck = { | |||
131 | .enable_bit = EN_TIMCK, | 175 | .enable_bit = EN_TIMCK, |
132 | .recalc = &followparent_recalc, | 176 | .recalc = &followparent_recalc, |
133 | }, | 177 | }, |
134 | .idlect_shift = 9, | 178 | .idlect_shift = IDLTIM_ARM_SHIFT, |
135 | }; | 179 | }; |
136 | 180 | ||
137 | static struct arm_idlect1_clk armwdt_ck = { | 181 | static struct arm_idlect1_clk armwdt_ck = { |
@@ -145,7 +189,7 @@ static struct arm_idlect1_clk armwdt_ck = { | |||
145 | .fixed_div = 14, | 189 | .fixed_div = 14, |
146 | .recalc = &omap_fixed_divisor_recalc, | 190 | .recalc = &omap_fixed_divisor_recalc, |
147 | }, | 191 | }, |
148 | .idlect_shift = 0, | 192 | .idlect_shift = IDLWDT_ARM_SHIFT, |
149 | }; | 193 | }; |
150 | 194 | ||
151 | static struct clk arminth_ck16xx = { | 195 | static struct clk arminth_ck16xx = { |
@@ -212,7 +256,6 @@ static struct clk dsptim_ck = { | |||
212 | .recalc = &followparent_recalc, | 256 | .recalc = &followparent_recalc, |
213 | }; | 257 | }; |
214 | 258 | ||
215 | /* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */ | ||
216 | static struct arm_idlect1_clk tc_ck = { | 259 | static struct arm_idlect1_clk tc_ck = { |
217 | .clk = { | 260 | .clk = { |
218 | .name = "tc_ck", | 261 | .name = "tc_ck", |
@@ -224,7 +267,7 @@ static struct arm_idlect1_clk tc_ck = { | |||
224 | .round_rate = omap1_clk_round_rate_ckctl_arm, | 267 | .round_rate = omap1_clk_round_rate_ckctl_arm, |
225 | .set_rate = omap1_clk_set_rate_ckctl_arm, | 268 | .set_rate = omap1_clk_set_rate_ckctl_arm, |
226 | }, | 269 | }, |
227 | .idlect_shift = 6, | 270 | .idlect_shift = IDLIF_ARM_SHIFT, |
228 | }; | 271 | }; |
229 | 272 | ||
230 | static struct clk arminth_ck1510 = { | 273 | static struct clk arminth_ck1510 = { |
@@ -304,7 +347,7 @@ static struct arm_idlect1_clk api_ck = { | |||
304 | .enable_bit = EN_APICK, | 347 | .enable_bit = EN_APICK, |
305 | .recalc = &followparent_recalc, | 348 | .recalc = &followparent_recalc, |
306 | }, | 349 | }, |
307 | .idlect_shift = 8, | 350 | .idlect_shift = IDLAPI_ARM_SHIFT, |
308 | }; | 351 | }; |
309 | 352 | ||
310 | static struct arm_idlect1_clk lb_ck = { | 353 | static struct arm_idlect1_clk lb_ck = { |
@@ -317,7 +360,7 @@ static struct arm_idlect1_clk lb_ck = { | |||
317 | .enable_bit = EN_LBCK, | 360 | .enable_bit = EN_LBCK, |
318 | .recalc = &followparent_recalc, | 361 | .recalc = &followparent_recalc, |
319 | }, | 362 | }, |
320 | .idlect_shift = 4, | 363 | .idlect_shift = IDLLB_ARM_SHIFT, |
321 | }; | 364 | }; |
322 | 365 | ||
323 | static struct clk rhea1_ck = { | 366 | static struct clk rhea1_ck = { |
@@ -359,9 +402,15 @@ static struct arm_idlect1_clk lcd_ck_1510 = { | |||
359 | .round_rate = omap1_clk_round_rate_ckctl_arm, | 402 | .round_rate = omap1_clk_round_rate_ckctl_arm, |
360 | .set_rate = omap1_clk_set_rate_ckctl_arm, | 403 | .set_rate = omap1_clk_set_rate_ckctl_arm, |
361 | }, | 404 | }, |
362 | .idlect_shift = 3, | 405 | .idlect_shift = OMAP1510_IDLLCD_ARM_SHIFT, |
363 | }; | 406 | }; |
364 | 407 | ||
408 | /* | ||
409 | * XXX The enable_bit here is misused - it simply switches between 12MHz | ||
410 | * and 48MHz. Reimplement with clksel. | ||
411 | * | ||
412 | * XXX does this need SYSC register handling? | ||
413 | */ | ||
365 | static struct clk uart1_1510 = { | 414 | static struct clk uart1_1510 = { |
366 | .name = "uart1_ck", | 415 | .name = "uart1_ck", |
367 | .ops = &clkops_null, | 416 | .ops = &clkops_null, |
@@ -370,25 +419,37 @@ static struct clk uart1_1510 = { | |||
370 | .rate = 12000000, | 419 | .rate = 12000000, |
371 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 420 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, |
372 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), | 421 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), |
373 | .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ | 422 | .enable_bit = CONF_MOD_UART1_CLK_MODE_R, |
374 | .set_rate = &omap1_set_uart_rate, | 423 | .set_rate = &omap1_set_uart_rate, |
375 | .recalc = &omap1_uart_recalc, | 424 | .recalc = &omap1_uart_recalc, |
376 | }; | 425 | }; |
377 | 426 | ||
427 | /* | ||
428 | * XXX The enable_bit here is misused - it simply switches between 12MHz | ||
429 | * and 48MHz. Reimplement with clksel. | ||
430 | * | ||
431 | * XXX SYSC register handling does not belong in the clock framework | ||
432 | */ | ||
378 | static struct uart_clk uart1_16xx = { | 433 | static struct uart_clk uart1_16xx = { |
379 | .clk = { | 434 | .clk = { |
380 | .name = "uart1_ck", | 435 | .name = "uart1_ck", |
381 | .ops = &clkops_uart, | 436 | .ops = &clkops_uart_16xx, |
382 | /* Direct from ULPD, no real parent */ | 437 | /* Direct from ULPD, no real parent */ |
383 | .parent = &armper_ck.clk, | 438 | .parent = &armper_ck.clk, |
384 | .rate = 48000000, | 439 | .rate = 48000000, |
385 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 440 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, |
386 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), | 441 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), |
387 | .enable_bit = 29, | 442 | .enable_bit = CONF_MOD_UART1_CLK_MODE_R, |
388 | }, | 443 | }, |
389 | .sysc_addr = 0xfffb0054, | 444 | .sysc_addr = 0xfffb0054, |
390 | }; | 445 | }; |
391 | 446 | ||
447 | /* | ||
448 | * XXX The enable_bit here is misused - it simply switches between 12MHz | ||
449 | * and 48MHz. Reimplement with clksel. | ||
450 | * | ||
451 | * XXX does this need SYSC register handling? | ||
452 | */ | ||
392 | static struct clk uart2_ck = { | 453 | static struct clk uart2_ck = { |
393 | .name = "uart2_ck", | 454 | .name = "uart2_ck", |
394 | .ops = &clkops_null, | 455 | .ops = &clkops_null, |
@@ -397,11 +458,17 @@ static struct clk uart2_ck = { | |||
397 | .rate = 12000000, | 458 | .rate = 12000000, |
398 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 459 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, |
399 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), | 460 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), |
400 | .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ | 461 | .enable_bit = CONF_MOD_UART2_CLK_MODE_R, |
401 | .set_rate = &omap1_set_uart_rate, | 462 | .set_rate = &omap1_set_uart_rate, |
402 | .recalc = &omap1_uart_recalc, | 463 | .recalc = &omap1_uart_recalc, |
403 | }; | 464 | }; |
404 | 465 | ||
466 | /* | ||
467 | * XXX The enable_bit here is misused - it simply switches between 12MHz | ||
468 | * and 48MHz. Reimplement with clksel. | ||
469 | * | ||
470 | * XXX does this need SYSC register handling? | ||
471 | */ | ||
405 | static struct clk uart3_1510 = { | 472 | static struct clk uart3_1510 = { |
406 | .name = "uart3_ck", | 473 | .name = "uart3_ck", |
407 | .ops = &clkops_null, | 474 | .ops = &clkops_null, |
@@ -410,21 +477,27 @@ static struct clk uart3_1510 = { | |||
410 | .rate = 12000000, | 477 | .rate = 12000000, |
411 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 478 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, |
412 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), | 479 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), |
413 | .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ | 480 | .enable_bit = CONF_MOD_UART3_CLK_MODE_R, |
414 | .set_rate = &omap1_set_uart_rate, | 481 | .set_rate = &omap1_set_uart_rate, |
415 | .recalc = &omap1_uart_recalc, | 482 | .recalc = &omap1_uart_recalc, |
416 | }; | 483 | }; |
417 | 484 | ||
485 | /* | ||
486 | * XXX The enable_bit here is misused - it simply switches between 12MHz | ||
487 | * and 48MHz. Reimplement with clksel. | ||
488 | * | ||
489 | * XXX SYSC register handling does not belong in the clock framework | ||
490 | */ | ||
418 | static struct uart_clk uart3_16xx = { | 491 | static struct uart_clk uart3_16xx = { |
419 | .clk = { | 492 | .clk = { |
420 | .name = "uart3_ck", | 493 | .name = "uart3_ck", |
421 | .ops = &clkops_uart, | 494 | .ops = &clkops_uart_16xx, |
422 | /* Direct from ULPD, no real parent */ | 495 | /* Direct from ULPD, no real parent */ |
423 | .parent = &armper_ck.clk, | 496 | .parent = &armper_ck.clk, |
424 | .rate = 48000000, | 497 | .rate = 48000000, |
425 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 498 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, |
426 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), | 499 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), |
427 | .enable_bit = 31, | 500 | .enable_bit = CONF_MOD_UART3_CLK_MODE_R, |
428 | }, | 501 | }, |
429 | .sysc_addr = 0xfffb9854, | 502 | .sysc_addr = 0xfffb9854, |
430 | }; | 503 | }; |
@@ -457,7 +530,7 @@ static struct clk usb_hhc_ck16xx = { | |||
457 | /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ | 530 | /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ |
458 | .flags = ENABLE_REG_32BIT, | 531 | .flags = ENABLE_REG_32BIT, |
459 | .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ | 532 | .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ |
460 | .enable_bit = 8 /* UHOST_EN */, | 533 | .enable_bit = OTG_SYSCON_2_UHOST_EN_SHIFT |
461 | }; | 534 | }; |
462 | 535 | ||
463 | static struct clk usb_dc_ck = { | 536 | static struct clk usb_dc_ck = { |
@@ -466,7 +539,7 @@ static struct clk usb_dc_ck = { | |||
466 | /* Direct from ULPD, no parent */ | 539 | /* Direct from ULPD, no parent */ |
467 | .rate = 48000000, | 540 | .rate = 48000000, |
468 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | 541 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), |
469 | .enable_bit = 4, | 542 | .enable_bit = USB_REQ_EN_SHIFT, |
470 | }; | 543 | }; |
471 | 544 | ||
472 | static struct clk usb_dc_ck7xx = { | 545 | static struct clk usb_dc_ck7xx = { |
@@ -475,7 +548,25 @@ static struct clk usb_dc_ck7xx = { | |||
475 | /* Direct from ULPD, no parent */ | 548 | /* Direct from ULPD, no parent */ |
476 | .rate = 48000000, | 549 | .rate = 48000000, |
477 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | 550 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), |
478 | .enable_bit = 8, | 551 | .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, |
552 | }; | ||
553 | |||
554 | static struct clk uart1_7xx = { | ||
555 | .name = "uart1_ck", | ||
556 | .ops = &clkops_generic, | ||
557 | /* Direct from ULPD, no parent */ | ||
558 | .rate = 12000000, | ||
559 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | ||
560 | .enable_bit = 9, | ||
561 | }; | ||
562 | |||
563 | static struct clk uart2_7xx = { | ||
564 | .name = "uart2_ck", | ||
565 | .ops = &clkops_generic, | ||
566 | /* Direct from ULPD, no parent */ | ||
567 | .rate = 12000000, | ||
568 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | ||
569 | .enable_bit = 11, | ||
479 | }; | 570 | }; |
480 | 571 | ||
481 | static struct clk mclk_1510 = { | 572 | static struct clk mclk_1510 = { |
@@ -484,7 +575,7 @@ static struct clk mclk_1510 = { | |||
484 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ | 575 | /* Direct from ULPD, no parent. May be enabled by ext hardware. */ |
485 | .rate = 12000000, | 576 | .rate = 12000000, |
486 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | 577 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), |
487 | .enable_bit = 6, | 578 | .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, |
488 | }; | 579 | }; |
489 | 580 | ||
490 | static struct clk mclk_16xx = { | 581 | static struct clk mclk_16xx = { |
@@ -524,9 +615,13 @@ static struct clk mmc1_ck = { | |||
524 | .rate = 48000000, | 615 | .rate = 48000000, |
525 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 616 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, |
526 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), | 617 | .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), |
527 | .enable_bit = 23, | 618 | .enable_bit = CONF_MOD_MMC_SD_CLK_REQ_R, |
528 | }; | 619 | }; |
529 | 620 | ||
621 | /* | ||
622 | * XXX MOD_CONF_CTRL_0 bit 20 is defined in the 1510 TRM as | ||
623 | * CONF_MOD_MCBSP3_AUXON ?? | ||
624 | */ | ||
530 | static struct clk mmc2_ck = { | 625 | static struct clk mmc2_ck = { |
531 | .name = "mmc2_ck", | 626 | .name = "mmc2_ck", |
532 | .ops = &clkops_generic, | 627 | .ops = &clkops_generic, |
@@ -546,7 +641,7 @@ static struct clk mmc3_ck = { | |||
546 | .rate = 48000000, | 641 | .rate = 48000000, |
547 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | 642 | .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, |
548 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | 643 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), |
549 | .enable_bit = 12, | 644 | .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, |
550 | }; | 645 | }; |
551 | 646 | ||
552 | static struct clk virtual_ck_mpu = { | 647 | static struct clk virtual_ck_mpu = { |
@@ -620,7 +715,9 @@ static struct omap_clk omap_clks[] = { | |||
620 | /* ULPD clocks */ | 715 | /* ULPD clocks */ |
621 | CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), | 716 | CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), |
622 | CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), | 717 | CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), |
718 | CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX), | ||
623 | CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), | 719 | CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), |
720 | CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX), | ||
624 | CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), | 721 | CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), |
625 | CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), | 722 | CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), |
626 | CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), | 723 | CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index eb98eb8d3731..b583121b04b9 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
@@ -64,44 +64,7 @@ static void omap_init_rtc(void) | |||
64 | static inline void omap_init_rtc(void) {} | 64 | static inline void omap_init_rtc(void) {} |
65 | #endif | 65 | #endif |
66 | 66 | ||
67 | #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) | ||
68 | |||
69 | #if defined(CONFIG_ARCH_OMAP15XX) | ||
70 | # define OMAP1_MBOX_SIZE 0x23 | ||
71 | # define INT_DSP_MAILBOX1 INT_1510_DSP_MAILBOX1 | ||
72 | #elif defined(CONFIG_ARCH_OMAP16XX) | ||
73 | # define OMAP1_MBOX_SIZE 0x2f | ||
74 | # define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1 | ||
75 | #endif | ||
76 | |||
77 | #define OMAP1_MBOX_BASE OMAP16XX_MAILBOX_BASE | ||
78 | |||
79 | static struct resource mbox_resources[] = { | ||
80 | { | ||
81 | .start = OMAP1_MBOX_BASE, | ||
82 | .end = OMAP1_MBOX_BASE + OMAP1_MBOX_SIZE, | ||
83 | .flags = IORESOURCE_MEM, | ||
84 | }, | ||
85 | { | ||
86 | .start = INT_DSP_MAILBOX1, | ||
87 | .flags = IORESOURCE_IRQ, | ||
88 | }, | ||
89 | }; | ||
90 | |||
91 | static struct platform_device mbox_device = { | ||
92 | .name = "omap1-mailbox", | ||
93 | .id = -1, | ||
94 | .num_resources = ARRAY_SIZE(mbox_resources), | ||
95 | .resource = mbox_resources, | ||
96 | }; | ||
97 | |||
98 | static inline void omap_init_mbox(void) | ||
99 | { | ||
100 | platform_device_register(&mbox_device); | ||
101 | } | ||
102 | #else | ||
103 | static inline void omap_init_mbox(void) { } | 67 | static inline void omap_init_mbox(void) { } |
104 | #endif | ||
105 | 68 | ||
106 | /*-------------------------------------------------------------------------*/ | 69 | /*-------------------------------------------------------------------------*/ |
107 | 70 | ||
@@ -231,42 +194,7 @@ static inline void omap_init_spi100k(void) | |||
231 | 194 | ||
232 | /*-------------------------------------------------------------------------*/ | 195 | /*-------------------------------------------------------------------------*/ |
233 | 196 | ||
234 | #if defined(CONFIG_OMAP_STI) | ||
235 | |||
236 | #define OMAP1_STI_BASE 0xfffea000 | ||
237 | #define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400) | ||
238 | |||
239 | static struct resource sti_resources[] = { | ||
240 | { | ||
241 | .start = OMAP1_STI_BASE, | ||
242 | .end = OMAP1_STI_BASE + SZ_1K - 1, | ||
243 | .flags = IORESOURCE_MEM, | ||
244 | }, | ||
245 | { | ||
246 | .start = OMAP1_STI_CHANNEL_BASE, | ||
247 | .end = OMAP1_STI_CHANNEL_BASE + SZ_1K - 1, | ||
248 | .flags = IORESOURCE_MEM, | ||
249 | }, | ||
250 | { | ||
251 | .start = INT_1610_STI, | ||
252 | .flags = IORESOURCE_IRQ, | ||
253 | } | ||
254 | }; | ||
255 | |||
256 | static struct platform_device sti_device = { | ||
257 | .name = "sti", | ||
258 | .id = -1, | ||
259 | .num_resources = ARRAY_SIZE(sti_resources), | ||
260 | .resource = sti_resources, | ||
261 | }; | ||
262 | |||
263 | static inline void omap_init_sti(void) | ||
264 | { | ||
265 | platform_device_register(&sti_device); | ||
266 | } | ||
267 | #else | ||
268 | static inline void omap_init_sti(void) {} | 197 | static inline void omap_init_sti(void) {} |
269 | #endif | ||
270 | 198 | ||
271 | #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) | 199 | #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) |
272 | 200 | ||
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S index e8a8cf36b7f0..671408eb4ab4 100644 --- a/arch/arm/mach-omap1/include/mach/debug-macro.S +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S | |||
@@ -33,7 +33,7 @@ omap_uart_virt: .word 0x0 | |||
33 | /* Use omap_uart_phys/virt if already configured */ | 33 | /* Use omap_uart_phys/virt if already configured */ |
34 | 9: mrc p15, 0, \rx, c1, c0 | 34 | 9: mrc p15, 0, \rx, c1, c0 |
35 | tst \rx, #1 @ MMU enabled? | 35 | tst \rx, #1 @ MMU enabled? |
36 | ldreq \rx, =omap_uart_phys @ physical base address | 36 | ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address |
37 | ldrne \rx, =omap_uart_virt @ virtual base | 37 | ldrne \rx, =omap_uart_virt @ virtual base |
38 | ldr \rx, [\rx, #0] | 38 | ldr \rx, [\rx, #0] |
39 | cmp \rx, #0 @ is port configured? | 39 | cmp \rx, #0 @ is port configured? |
@@ -68,11 +68,15 @@ omap_uart_virt: .word 0x0 | |||
68 | 68 | ||
69 | /* Store both phys and virt address for the uart */ | 69 | /* Store both phys and virt address for the uart */ |
70 | 98: add \rx, \rx, #0xff000000 @ phys base | 70 | 98: add \rx, \rx, #0xff000000 @ phys base |
71 | ldr \tmp, =omap_uart_phys | 71 | mrc p15, 0, \tmp, c1, c0 |
72 | tst \tmp, #1 @ MMU enabled? | ||
73 | ldreq \tmp, =__virt_to_phys(omap_uart_phys) | ||
74 | ldrne \tmp, =omap_uart_phys | ||
72 | str \rx, [\tmp, #0] | 75 | str \rx, [\tmp, #0] |
73 | sub \rx, \rx, #0xff000000 @ phys base | 76 | sub \rx, \rx, #0xff000000 @ phys base |
74 | add \rx, \rx, #0xfe000000 @ virt base | 77 | add \rx, \rx, #0xfe000000 @ virt base |
75 | ldr \tmp, =omap_uart_virt | 78 | ldreq \tmp, =__virt_to_phys(omap_uart_virt) |
79 | ldrne \tmp, =omap_uart_virt | ||
76 | str \rx, [\tmp, #0] | 80 | str \rx, [\tmp, #0] |
77 | b 9b | 81 | b 9b |
78 | 99: | 82 | 99: |
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index d9b8d82530ae..0ce3fec2d257 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c | |||
@@ -22,7 +22,6 @@ | |||
22 | 22 | ||
23 | extern void omap_check_revision(void); | 23 | extern void omap_check_revision(void); |
24 | extern void omap_sram_init(void); | 24 | extern void omap_sram_init(void); |
25 | extern void omapfb_reserve_sdram(void); | ||
26 | 25 | ||
27 | /* | 26 | /* |
28 | * The machine specific code may provide the extra mapping besides the | 27 | * The machine specific code may provide the extra mapping besides the |
@@ -122,7 +121,6 @@ void __init omap1_map_common_io(void) | |||
122 | #endif | 121 | #endif |
123 | 122 | ||
124 | omap_sram_init(); | 123 | omap_sram_init(); |
125 | omapfb_reserve_sdram(); | ||
126 | } | 124 | } |
127 | 125 | ||
128 | /* | 126 | /* |
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c index 4f5b3da3d559..1a85a421007f 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/arch/arm/mach-omap1/mailbox.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Mailbox reservation modules for DSP | 2 | * Mailbox reservation modules for OMAP1 |
3 | * | 3 | * |
4 | * Copyright (C) 2006-2009 Nokia Corporation | 4 | * Copyright (C) 2006-2009 Nokia Corporation |
5 | * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> | 5 | * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> |
@@ -9,13 +9,10 @@ | |||
9 | * for more details. | 9 | * for more details. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/resource.h> | ||
14 | #include <linux/interrupt.h> | 12 | #include <linux/interrupt.h> |
15 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
16 | #include <linux/io.h> | 14 | #include <linux/io.h> |
17 | #include <plat/mailbox.h> | 15 | #include <plat/mailbox.h> |
18 | #include <mach/irqs.h> | ||
19 | 16 | ||
20 | #define MAILBOX_ARM2DSP1 0x00 | 17 | #define MAILBOX_ARM2DSP1 0x00 |
21 | #define MAILBOX_ARM2DSP1b 0x04 | 18 | #define MAILBOX_ARM2DSP1b 0x04 |
@@ -83,7 +80,7 @@ static int omap1_mbox_fifo_full(struct omap_mbox *mbox) | |||
83 | struct omap_mbox1_fifo *fifo = | 80 | struct omap_mbox1_fifo *fifo = |
84 | &((struct omap_mbox1_priv *)mbox->priv)->rx_fifo; | 81 | &((struct omap_mbox1_priv *)mbox->priv)->rx_fifo; |
85 | 82 | ||
86 | return (mbox_read_reg(fifo->flag)); | 83 | return mbox_read_reg(fifo->flag); |
87 | } | 84 | } |
88 | 85 | ||
89 | /* irq */ | 86 | /* irq */ |
@@ -141,47 +138,37 @@ struct omap_mbox mbox_dsp_info = { | |||
141 | .ops = &omap1_mbox_ops, | 138 | .ops = &omap1_mbox_ops, |
142 | .priv = &omap1_mbox_dsp_priv, | 139 | .priv = &omap1_mbox_dsp_priv, |
143 | }; | 140 | }; |
144 | EXPORT_SYMBOL(mbox_dsp_info); | 141 | |
142 | struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL }; | ||
145 | 143 | ||
146 | static int __devinit omap1_mbox_probe(struct platform_device *pdev) | 144 | static int __devinit omap1_mbox_probe(struct platform_device *pdev) |
147 | { | 145 | { |
148 | struct resource *res; | 146 | struct resource *mem; |
147 | int ret; | ||
148 | int i; | ||
149 | struct omap_mbox **list; | ||
149 | 150 | ||
150 | if (pdev->num_resources != 2) { | 151 | list = omap1_mboxes; |
151 | dev_err(&pdev->dev, "invalid number of resources: %d\n", | 152 | list[0]->irq = platform_get_irq_byname(pdev, "dsp"); |
152 | pdev->num_resources); | ||
153 | return -ENODEV; | ||
154 | } | ||
155 | 153 | ||
156 | /* MBOX base */ | 154 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
157 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 155 | mbox_base = ioremap(mem->start, resource_size(mem)); |
158 | if (unlikely(!res)) { | 156 | if (!mbox_base) |
159 | dev_err(&pdev->dev, "invalid mem resource\n"); | 157 | return -ENOMEM; |
160 | return -ENODEV; | ||
161 | } | ||
162 | 158 | ||
163 | mbox_base = ioremap(res->start, resource_size(res)); | 159 | ret = omap_mbox_register(&pdev->dev, list); |
164 | if (!mbox_base) { | 160 | if (ret) { |
165 | dev_err(&pdev->dev, "ioremap failed\n"); | ||
166 | return -ENODEV; | ||
167 | } | ||
168 | |||
169 | /* DSP IRQ */ | ||
170 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
171 | if (unlikely(!res)) { | ||
172 | dev_err(&pdev->dev, "invalid irq resource\n"); | ||
173 | iounmap(mbox_base); | 161 | iounmap(mbox_base); |
174 | return -ENODEV; | 162 | return ret; |
175 | } | 163 | } |
176 | mbox_dsp_info.irq = res->start; | ||
177 | 164 | ||
178 | return omap_mbox_register(&pdev->dev, &mbox_dsp_info); | 165 | return 0; |
179 | } | 166 | } |
180 | 167 | ||
181 | static int __devexit omap1_mbox_remove(struct platform_device *pdev) | 168 | static int __devexit omap1_mbox_remove(struct platform_device *pdev) |
182 | { | 169 | { |
183 | omap_mbox_unregister(&mbox_dsp_info); | 170 | omap_mbox_unregister(); |
184 | 171 | iounmap(mbox_base); | |
185 | return 0; | 172 | return 0; |
186 | } | 173 | } |
187 | 174 | ||
@@ -189,7 +176,7 @@ static struct platform_driver omap1_mbox_driver = { | |||
189 | .probe = omap1_mbox_probe, | 176 | .probe = omap1_mbox_probe, |
190 | .remove = __devexit_p(omap1_mbox_remove), | 177 | .remove = __devexit_p(omap1_mbox_remove), |
191 | .driver = { | 178 | .driver = { |
192 | .name = "omap1-mailbox", | 179 | .name = "omap-mailbox", |
193 | }, | 180 | }, |
194 | }; | 181 | }; |
195 | 182 | ||
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index e9bdff192f82..b3a796a6da03 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <plat/mux.h> | 23 | #include <plat/mux.h> |
24 | #include <plat/cpu.h> | 24 | #include <plat/cpu.h> |
25 | #include <plat/mcbsp.h> | 25 | #include <plat/mcbsp.h> |
26 | #include <plat/dsp_common.h> | ||
27 | 26 | ||
28 | #define DPS_RSTCT2_PER_EN (1 << 0) | 27 | #define DPS_RSTCT2_PER_EN (1 << 0) |
29 | #define DSP_RSTCT2_WD_PER_EN (1 << 1) | 28 | #define DSP_RSTCT2_WD_PER_EN (1 << 1) |
@@ -46,7 +45,6 @@ static void omap1_mcbsp_request(unsigned int id) | |||
46 | clk_enable(api_clk); | 45 | clk_enable(api_clk); |
47 | clk_enable(dsp_clk); | 46 | clk_enable(dsp_clk); |
48 | 47 | ||
49 | omap_dsp_request_mem(); | ||
50 | /* | 48 | /* |
51 | * DSP external peripheral reset | 49 | * DSP external peripheral reset |
52 | * FIXME: This should be moved to dsp code | 50 | * FIXME: This should be moved to dsp code |
@@ -62,7 +60,6 @@ static void omap1_mcbsp_free(unsigned int id) | |||
62 | { | 60 | { |
63 | if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { | 61 | if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { |
64 | if (--dsp_use == 0) { | 62 | if (--dsp_use == 0) { |
65 | omap_dsp_release_mem(); | ||
66 | if (!IS_ERR(api_clk)) { | 63 | if (!IS_ERR(api_clk)) { |
67 | clk_disable(api_clk); | 64 | clk_disable(api_clk); |
68 | clk_put(api_clk); | 65 | clk_put(api_clk); |
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 84341377232d..7835add00344 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c | |||
@@ -70,6 +70,10 @@ MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0) | |||
70 | MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0) | 70 | MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0) |
71 | MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0) | 71 | MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0) |
72 | MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0) | 72 | MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0) |
73 | |||
74 | /* UART pins */ | ||
75 | MUX_CFG_7XX("UART_7XX_1", 3, 21, 0, 20, 0, 0) | ||
76 | MUX_CFG_7XX("UART_7XX_2", 8, 1, 6, 0, 0, 0) | ||
73 | }; | 77 | }; |
74 | #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) | 78 | #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) |
75 | #else | 79 | #else |
@@ -440,7 +444,7 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) | |||
440 | } | 444 | } |
441 | #endif | 445 | #endif |
442 | 446 | ||
443 | #ifdef CONFIG_OMAP_MUX_ERRORS | 447 | #ifdef CONFIG_OMAP_MUX_WARNINGS |
444 | return warn ? -ETXTBSY : 0; | 448 | return warn ? -ETXTBSY : 0; |
445 | #else | 449 | #else |
446 | return 0; | 450 | return 0; |
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 349de90194e3..b78d0749f13d 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
@@ -122,6 +122,13 @@ void __init omap_serial_init(void) | |||
122 | 122 | ||
123 | for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) { | 123 | for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) { |
124 | 124 | ||
125 | /* Don't look at UARTs higher than 2 for omap7xx */ | ||
126 | if (cpu_is_omap7xx() && i > 1) { | ||
127 | serial_platform_data[i].membase = NULL; | ||
128 | serial_platform_data[i].mapbase = 0; | ||
129 | continue; | ||
130 | } | ||
131 | |||
125 | /* Static mapping, never released */ | 132 | /* Static mapping, never released */ |
126 | serial_platform_data[i].membase = | 133 | serial_platform_data[i].membase = |
127 | ioremap(serial_platform_data[i].mapbase, SZ_2K); | 134 | ioremap(serial_platform_data[i].mapbase, SZ_2K); |
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c new file mode 100644 index 000000000000..19de03b074e3 --- /dev/null +++ b/arch/arm/mach-omap1/usb.c | |||
@@ -0,0 +1,530 @@ | |||
1 | /* | ||
2 | * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx | ||
3 | * | ||
4 | * Copyright (C) 2004 Texas Instruments, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/module.h> | ||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/platform_device.h> | ||
25 | #include <linux/io.h> | ||
26 | |||
27 | #include <asm/irq.h> | ||
28 | |||
29 | #include <plat/mux.h> | ||
30 | #include <plat/usb.h> | ||
31 | |||
32 | /* These routines should handle the standard chip-specific modes | ||
33 | * for usb0/1/2 ports, covering basic mux and transceiver setup. | ||
34 | * | ||
35 | * Some board-*.c files will need to set up additional mux options, | ||
36 | * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup. | ||
37 | */ | ||
38 | |||
39 | /* TESTED ON: | ||
40 | * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables | ||
41 | * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables | ||
42 | * - 5912 OSK UDC, with *nonstandard* A-to-A cable | ||
43 | * - 1510 Innovator UDC with bundled usb0 cable | ||
44 | * - 1510 Innovator OHCI with bundled usb1/usb2 cable | ||
45 | * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS | ||
46 | * - 1710 custom development board using alternate pin group | ||
47 | * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables | ||
48 | */ | ||
49 | |||
50 | #define INT_USB_IRQ_GEN IH2_BASE + 20 | ||
51 | #define INT_USB_IRQ_NISO IH2_BASE + 30 | ||
52 | #define INT_USB_IRQ_ISO IH2_BASE + 29 | ||
53 | #define INT_USB_IRQ_HGEN INT_USB_HHC_1 | ||
54 | #define INT_USB_IRQ_OTG IH2_BASE + 8 | ||
55 | |||
56 | #ifdef CONFIG_USB_GADGET_OMAP | ||
57 | |||
58 | static struct resource udc_resources[] = { | ||
59 | /* order is significant! */ | ||
60 | { /* registers */ | ||
61 | .start = UDC_BASE, | ||
62 | .end = UDC_BASE + 0xff, | ||
63 | .flags = IORESOURCE_MEM, | ||
64 | }, { /* general IRQ */ | ||
65 | .start = INT_USB_IRQ_GEN, | ||
66 | .flags = IORESOURCE_IRQ, | ||
67 | }, { /* PIO IRQ */ | ||
68 | .start = INT_USB_IRQ_NISO, | ||
69 | .flags = IORESOURCE_IRQ, | ||
70 | }, { /* SOF IRQ */ | ||
71 | .start = INT_USB_IRQ_ISO, | ||
72 | .flags = IORESOURCE_IRQ, | ||
73 | }, | ||
74 | }; | ||
75 | |||
76 | static u64 udc_dmamask = ~(u32)0; | ||
77 | |||
78 | static struct platform_device udc_device = { | ||
79 | .name = "omap_udc", | ||
80 | .id = -1, | ||
81 | .dev = { | ||
82 | .dma_mask = &udc_dmamask, | ||
83 | .coherent_dma_mask = 0xffffffff, | ||
84 | }, | ||
85 | .num_resources = ARRAY_SIZE(udc_resources), | ||
86 | .resource = udc_resources, | ||
87 | }; | ||
88 | |||
89 | static inline void udc_device_init(struct omap_usb_config *pdata) | ||
90 | { | ||
91 | /* IRQ numbers for omap7xx */ | ||
92 | if(cpu_is_omap7xx()) { | ||
93 | udc_resources[1].start = INT_7XX_USB_GENI; | ||
94 | udc_resources[2].start = INT_7XX_USB_NON_ISO; | ||
95 | udc_resources[3].start = INT_7XX_USB_ISO; | ||
96 | } | ||
97 | pdata->udc_device = &udc_device; | ||
98 | } | ||
99 | |||
100 | #else | ||
101 | |||
102 | static inline void udc_device_init(struct omap_usb_config *pdata) | ||
103 | { | ||
104 | } | ||
105 | |||
106 | #endif | ||
107 | |||
108 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
109 | |||
110 | /* The dmamask must be set for OHCI to work */ | ||
111 | static u64 ohci_dmamask = ~(u32)0; | ||
112 | |||
113 | static struct resource ohci_resources[] = { | ||
114 | { | ||
115 | .start = OMAP_OHCI_BASE, | ||
116 | .end = OMAP_OHCI_BASE + 0xff, | ||
117 | .flags = IORESOURCE_MEM, | ||
118 | }, | ||
119 | { | ||
120 | .start = INT_USB_IRQ_HGEN, | ||
121 | .flags = IORESOURCE_IRQ, | ||
122 | }, | ||
123 | }; | ||
124 | |||
125 | static struct platform_device ohci_device = { | ||
126 | .name = "ohci", | ||
127 | .id = -1, | ||
128 | .dev = { | ||
129 | .dma_mask = &ohci_dmamask, | ||
130 | .coherent_dma_mask = 0xffffffff, | ||
131 | }, | ||
132 | .num_resources = ARRAY_SIZE(ohci_resources), | ||
133 | .resource = ohci_resources, | ||
134 | }; | ||
135 | |||
136 | static inline void ohci_device_init(struct omap_usb_config *pdata) | ||
137 | { | ||
138 | if (cpu_is_omap7xx()) | ||
139 | ohci_resources[1].start = INT_7XX_USB_HHC_1; | ||
140 | pdata->ohci_device = &ohci_device; | ||
141 | } | ||
142 | |||
143 | #else | ||
144 | |||
145 | static inline void ohci_device_init(struct omap_usb_config *pdata) | ||
146 | { | ||
147 | } | ||
148 | |||
149 | #endif | ||
150 | |||
151 | #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) | ||
152 | |||
153 | static struct resource otg_resources[] = { | ||
154 | /* order is significant! */ | ||
155 | { | ||
156 | .start = OTG_BASE, | ||
157 | .end = OTG_BASE + 0xff, | ||
158 | .flags = IORESOURCE_MEM, | ||
159 | }, { | ||
160 | .start = INT_USB_IRQ_OTG, | ||
161 | .flags = IORESOURCE_IRQ, | ||
162 | }, | ||
163 | }; | ||
164 | |||
165 | static struct platform_device otg_device = { | ||
166 | .name = "omap_otg", | ||
167 | .id = -1, | ||
168 | .num_resources = ARRAY_SIZE(otg_resources), | ||
169 | .resource = otg_resources, | ||
170 | }; | ||
171 | |||
172 | static inline void otg_device_init(struct omap_usb_config *pdata) | ||
173 | { | ||
174 | if (cpu_is_omap7xx()) | ||
175 | otg_resources[1].start = INT_7XX_USB_OTG; | ||
176 | pdata->otg_device = &otg_device; | ||
177 | } | ||
178 | |||
179 | #else | ||
180 | |||
181 | static inline void otg_device_init(struct omap_usb_config *pdata) | ||
182 | { | ||
183 | } | ||
184 | |||
185 | #endif | ||
186 | |||
187 | u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) | ||
188 | { | ||
189 | u32 syscon1 = 0; | ||
190 | |||
191 | if (nwires == 0) { | ||
192 | if (!cpu_is_omap15xx()) { | ||
193 | u32 l; | ||
194 | |||
195 | /* pulldown D+/D- */ | ||
196 | l = omap_readl(USB_TRANSCEIVER_CTRL); | ||
197 | l &= ~(3 << 1); | ||
198 | omap_writel(l, USB_TRANSCEIVER_CTRL); | ||
199 | } | ||
200 | return 0; | ||
201 | } | ||
202 | |||
203 | if (is_device) { | ||
204 | if (cpu_is_omap7xx()) { | ||
205 | omap_cfg_reg(AA17_7XX_USB_DM); | ||
206 | omap_cfg_reg(W16_7XX_USB_PU_EN); | ||
207 | omap_cfg_reg(W17_7XX_USB_VBUSI); | ||
208 | omap_cfg_reg(W18_7XX_USB_DMCK_OUT); | ||
209 | omap_cfg_reg(W19_7XX_USB_DCRST); | ||
210 | } else | ||
211 | omap_cfg_reg(W4_USB_PUEN); | ||
212 | } | ||
213 | |||
214 | if (nwires == 2) { | ||
215 | u32 l; | ||
216 | |||
217 | // omap_cfg_reg(P9_USB_DP); | ||
218 | // omap_cfg_reg(R8_USB_DM); | ||
219 | |||
220 | if (cpu_is_omap15xx()) { | ||
221 | /* This works on 1510-Innovator */ | ||
222 | return 0; | ||
223 | } | ||
224 | |||
225 | /* NOTES: | ||
226 | * - peripheral should configure VBUS detection! | ||
227 | * - only peripherals may use the internal D+/D- pulldowns | ||
228 | * - OTG support on this port not yet written | ||
229 | */ | ||
230 | |||
231 | /* Don't do this for omap7xx -- it causes USB to not work correctly */ | ||
232 | if (!cpu_is_omap7xx()) { | ||
233 | l = omap_readl(USB_TRANSCEIVER_CTRL); | ||
234 | l &= ~(7 << 4); | ||
235 | if (!is_device) | ||
236 | l |= (3 << 1); | ||
237 | omap_writel(l, USB_TRANSCEIVER_CTRL); | ||
238 | } | ||
239 | |||
240 | return 3 << 16; | ||
241 | } | ||
242 | |||
243 | /* alternate pin config, external transceiver */ | ||
244 | if (cpu_is_omap15xx()) { | ||
245 | printk(KERN_ERR "no usb0 alt pin config on 15xx\n"); | ||
246 | return 0; | ||
247 | } | ||
248 | |||
249 | omap_cfg_reg(V6_USB0_TXD); | ||
250 | omap_cfg_reg(W9_USB0_TXEN); | ||
251 | omap_cfg_reg(W5_USB0_SE0); | ||
252 | if (nwires != 3) | ||
253 | omap_cfg_reg(Y5_USB0_RCV); | ||
254 | |||
255 | /* NOTE: SPEED and SUSP aren't configured here. OTG hosts | ||
256 | * may be able to use I2C requests to set those bits along | ||
257 | * with VBUS switching and overcurrent detection. | ||
258 | */ | ||
259 | |||
260 | if (nwires != 6) { | ||
261 | u32 l; | ||
262 | |||
263 | l = omap_readl(USB_TRANSCEIVER_CTRL); | ||
264 | l &= ~CONF_USB2_UNI_R; | ||
265 | omap_writel(l, USB_TRANSCEIVER_CTRL); | ||
266 | } | ||
267 | |||
268 | switch (nwires) { | ||
269 | case 3: | ||
270 | syscon1 = 2; | ||
271 | break; | ||
272 | case 4: | ||
273 | syscon1 = 1; | ||
274 | break; | ||
275 | case 6: | ||
276 | syscon1 = 3; | ||
277 | { | ||
278 | u32 l; | ||
279 | |||
280 | omap_cfg_reg(AA9_USB0_VP); | ||
281 | omap_cfg_reg(R9_USB0_VM); | ||
282 | l = omap_readl(USB_TRANSCEIVER_CTRL); | ||
283 | l |= CONF_USB2_UNI_R; | ||
284 | omap_writel(l, USB_TRANSCEIVER_CTRL); | ||
285 | } | ||
286 | break; | ||
287 | default: | ||
288 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | ||
289 | 0, nwires); | ||
290 | } | ||
291 | |||
292 | return syscon1 << 16; | ||
293 | } | ||
294 | |||
295 | u32 __init omap1_usb1_init(unsigned nwires) | ||
296 | { | ||
297 | u32 syscon1 = 0; | ||
298 | |||
299 | if (!cpu_is_omap15xx() && nwires != 6) { | ||
300 | u32 l; | ||
301 | |||
302 | l = omap_readl(USB_TRANSCEIVER_CTRL); | ||
303 | l &= ~CONF_USB1_UNI_R; | ||
304 | omap_writel(l, USB_TRANSCEIVER_CTRL); | ||
305 | } | ||
306 | if (nwires == 0) | ||
307 | return 0; | ||
308 | |||
309 | /* external transceiver */ | ||
310 | omap_cfg_reg(USB1_TXD); | ||
311 | omap_cfg_reg(USB1_TXEN); | ||
312 | if (nwires != 3) | ||
313 | omap_cfg_reg(USB1_RCV); | ||
314 | |||
315 | if (cpu_is_omap15xx()) { | ||
316 | omap_cfg_reg(USB1_SEO); | ||
317 | omap_cfg_reg(USB1_SPEED); | ||
318 | // SUSP | ||
319 | } else if (cpu_is_omap1610() || cpu_is_omap5912()) { | ||
320 | omap_cfg_reg(W13_1610_USB1_SE0); | ||
321 | omap_cfg_reg(R13_1610_USB1_SPEED); | ||
322 | // SUSP | ||
323 | } else if (cpu_is_omap1710()) { | ||
324 | omap_cfg_reg(R13_1710_USB1_SE0); | ||
325 | // SUSP | ||
326 | } else { | ||
327 | pr_debug("usb%d cpu unrecognized\n", 1); | ||
328 | return 0; | ||
329 | } | ||
330 | |||
331 | switch (nwires) { | ||
332 | case 2: | ||
333 | goto bad; | ||
334 | case 3: | ||
335 | syscon1 = 2; | ||
336 | break; | ||
337 | case 4: | ||
338 | syscon1 = 1; | ||
339 | break; | ||
340 | case 6: | ||
341 | syscon1 = 3; | ||
342 | omap_cfg_reg(USB1_VP); | ||
343 | omap_cfg_reg(USB1_VM); | ||
344 | if (!cpu_is_omap15xx()) { | ||
345 | u32 l; | ||
346 | |||
347 | l = omap_readl(USB_TRANSCEIVER_CTRL); | ||
348 | l |= CONF_USB1_UNI_R; | ||
349 | omap_writel(l, USB_TRANSCEIVER_CTRL); | ||
350 | } | ||
351 | break; | ||
352 | default: | ||
353 | bad: | ||
354 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | ||
355 | 1, nwires); | ||
356 | } | ||
357 | |||
358 | return syscon1 << 20; | ||
359 | } | ||
360 | |||
361 | u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) | ||
362 | { | ||
363 | u32 syscon1 = 0; | ||
364 | |||
365 | /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ | ||
366 | if (alt_pingroup || nwires == 0) | ||
367 | return 0; | ||
368 | |||
369 | if (!cpu_is_omap15xx() && nwires != 6) { | ||
370 | u32 l; | ||
371 | |||
372 | l = omap_readl(USB_TRANSCEIVER_CTRL); | ||
373 | l &= ~CONF_USB2_UNI_R; | ||
374 | omap_writel(l, USB_TRANSCEIVER_CTRL); | ||
375 | } | ||
376 | |||
377 | /* external transceiver */ | ||
378 | if (cpu_is_omap15xx()) { | ||
379 | omap_cfg_reg(USB2_TXD); | ||
380 | omap_cfg_reg(USB2_TXEN); | ||
381 | omap_cfg_reg(USB2_SEO); | ||
382 | if (nwires != 3) | ||
383 | omap_cfg_reg(USB2_RCV); | ||
384 | /* there is no USB2_SPEED */ | ||
385 | } else if (cpu_is_omap16xx()) { | ||
386 | omap_cfg_reg(V6_USB2_TXD); | ||
387 | omap_cfg_reg(W9_USB2_TXEN); | ||
388 | omap_cfg_reg(W5_USB2_SE0); | ||
389 | if (nwires != 3) | ||
390 | omap_cfg_reg(Y5_USB2_RCV); | ||
391 | // FIXME omap_cfg_reg(USB2_SPEED); | ||
392 | } else { | ||
393 | pr_debug("usb%d cpu unrecognized\n", 1); | ||
394 | return 0; | ||
395 | } | ||
396 | |||
397 | // omap_cfg_reg(USB2_SUSP); | ||
398 | |||
399 | switch (nwires) { | ||
400 | case 2: | ||
401 | goto bad; | ||
402 | case 3: | ||
403 | syscon1 = 2; | ||
404 | break; | ||
405 | case 4: | ||
406 | syscon1 = 1; | ||
407 | break; | ||
408 | case 5: | ||
409 | goto bad; | ||
410 | case 6: | ||
411 | syscon1 = 3; | ||
412 | if (cpu_is_omap15xx()) { | ||
413 | omap_cfg_reg(USB2_VP); | ||
414 | omap_cfg_reg(USB2_VM); | ||
415 | } else { | ||
416 | u32 l; | ||
417 | |||
418 | omap_cfg_reg(AA9_USB2_VP); | ||
419 | omap_cfg_reg(R9_USB2_VM); | ||
420 | l = omap_readl(USB_TRANSCEIVER_CTRL); | ||
421 | l |= CONF_USB2_UNI_R; | ||
422 | omap_writel(l, USB_TRANSCEIVER_CTRL); | ||
423 | } | ||
424 | break; | ||
425 | default: | ||
426 | bad: | ||
427 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | ||
428 | 2, nwires); | ||
429 | } | ||
430 | |||
431 | return syscon1 << 24; | ||
432 | } | ||
433 | |||
434 | #ifdef CONFIG_ARCH_OMAP15XX | ||
435 | |||
436 | /* ULPD_DPLL_CTRL */ | ||
437 | #define DPLL_IOB (1 << 13) | ||
438 | #define DPLL_PLL_ENABLE (1 << 4) | ||
439 | #define DPLL_LOCK (1 << 0) | ||
440 | |||
441 | /* ULPD_APLL_CTRL */ | ||
442 | #define APLL_NDPLL_SWITCH (1 << 0) | ||
443 | |||
444 | static void __init omap_1510_usb_init(struct omap_usb_config *config) | ||
445 | { | ||
446 | unsigned int val; | ||
447 | u16 w; | ||
448 | |||
449 | config->usb0_init(config->pins[0], is_usb0_device(config)); | ||
450 | config->usb1_init(config->pins[1]); | ||
451 | config->usb2_init(config->pins[2], 0); | ||
452 | |||
453 | val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1); | ||
454 | val |= (config->hmc_mode << 1); | ||
455 | omap_writel(val, MOD_CONF_CTRL_0); | ||
456 | |||
457 | printk("USB: hmc %d", config->hmc_mode); | ||
458 | if (config->pins[0]) | ||
459 | printk(", usb0 %d wires%s", config->pins[0], | ||
460 | is_usb0_device(config) ? " (dev)" : ""); | ||
461 | if (config->pins[1]) | ||
462 | printk(", usb1 %d wires", config->pins[1]); | ||
463 | if (config->pins[2]) | ||
464 | printk(", usb2 %d wires", config->pins[2]); | ||
465 | printk("\n"); | ||
466 | |||
467 | /* use DPLL for 48 MHz function clock */ | ||
468 | pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL), | ||
469 | omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ)); | ||
470 | |||
471 | w = omap_readw(ULPD_APLL_CTRL); | ||
472 | w &= ~APLL_NDPLL_SWITCH; | ||
473 | omap_writew(w, ULPD_APLL_CTRL); | ||
474 | |||
475 | w = omap_readw(ULPD_DPLL_CTRL); | ||
476 | w |= DPLL_IOB | DPLL_PLL_ENABLE; | ||
477 | omap_writew(w, ULPD_DPLL_CTRL); | ||
478 | |||
479 | w = omap_readw(ULPD_SOFT_REQ); | ||
480 | w |= SOFT_UDC_REQ | SOFT_DPLL_REQ; | ||
481 | omap_writew(w, ULPD_SOFT_REQ); | ||
482 | |||
483 | while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK)) | ||
484 | cpu_relax(); | ||
485 | |||
486 | #ifdef CONFIG_USB_GADGET_OMAP | ||
487 | if (config->register_dev) { | ||
488 | int status; | ||
489 | |||
490 | udc_device.dev.platform_data = config; | ||
491 | status = platform_device_register(&udc_device); | ||
492 | if (status) | ||
493 | pr_debug("can't register UDC device, %d\n", status); | ||
494 | /* udc driver gates 48MHz by D+ pullup */ | ||
495 | } | ||
496 | #endif | ||
497 | |||
498 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
499 | if (config->register_host) { | ||
500 | int status; | ||
501 | |||
502 | ohci_device.dev.platform_data = config; | ||
503 | status = platform_device_register(&ohci_device); | ||
504 | if (status) | ||
505 | pr_debug("can't register OHCI device, %d\n", status); | ||
506 | /* hcd explicitly gates 48MHz */ | ||
507 | } | ||
508 | #endif | ||
509 | } | ||
510 | |||
511 | #else | ||
512 | static inline void omap_1510_usb_init(struct omap_usb_config *config) {} | ||
513 | #endif | ||
514 | |||
515 | void __init omap1_usb_init(struct omap_usb_config *pdata) | ||
516 | { | ||
517 | pdata->usb0_init = omap1_usb0_init; | ||
518 | pdata->usb1_init = omap1_usb1_init; | ||
519 | pdata->usb2_init = omap1_usb2_init; | ||
520 | udc_device_init(pdata); | ||
521 | ohci_device_init(pdata); | ||
522 | otg_device_init(pdata); | ||
523 | |||
524 | if (cpu_is_omap7xx() || cpu_is_omap16xx()) | ||
525 | omap_otg_init(pdata); | ||
526 | else if (cpu_is_omap15xx()) | ||
527 | omap_1510_usb_init(pdata); | ||
528 | else | ||
529 | printk(KERN_ERR "USB: No init for your chip yet\n"); | ||
530 | } | ||