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authorLennert Buytenhek <buytenh@wantstofly.org>2010-11-29 04:39:27 -0500
committerLennert Buytenhek <buytenh@wantstofly.org>2011-01-13 11:18:51 -0500
commita51eef7eb45f7d0b141cf5b3729075e97992046b (patch)
treead2cae519aa27ecf6bafffa3900e57f9d2b00f80 /arch/arm/mach-omap1
parent85dcd90ce11d24649906adc454f31f1ac3f2dc6a (diff)
ARM: omap1: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq.c8
-rw-r--r--arch/arm/mach-omap1/fpga.c28
-rw-r--r--arch/arm/mach-omap1/irq.c44
3 files changed, 41 insertions, 39 deletions
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index 6c994e2d8879..152b32c15e28 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -49,7 +49,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
49 49
50 irq_desc = irq_to_desc(IH_GPIO_BASE); 50 irq_desc = irq_to_desc(IH_GPIO_BASE);
51 if (irq_desc) 51 if (irq_desc)
52 irq_chip = irq_desc->chip; 52 irq_chip = irq_desc->irq_data.chip;
53 53
54 /* 54 /*
55 * For each handled GPIO interrupt, keep calling its interrupt handler 55 * For each handled GPIO interrupt, keep calling its interrupt handler
@@ -62,13 +62,15 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
62 62
63 while (irq_counter[gpio] < fiq_count) { 63 while (irq_counter[gpio] < fiq_count) {
64 if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) { 64 if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) {
65 struct irq_data *d = irq_get_irq_data(irq_num);
66
65 /* 67 /*
66 * It looks like handle_edge_irq() that 68 * It looks like handle_edge_irq() that
67 * OMAP GPIO edge interrupts default to, 69 * OMAP GPIO edge interrupts default to,
68 * expects interrupt already unmasked. 70 * expects interrupt already unmasked.
69 */ 71 */
70 if (irq_chip && irq_chip->unmask) 72 if (irq_chip && irq_chip->irq_unmask)
71 irq_chip->unmask(irq_num); 73 irq_chip->irq_unmask(d);
72 } 74 }
73 generic_handle_irq(irq_num); 75 generic_handle_irq(irq_num);
74 76
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 8780e75cdc3d..0ace7998aaa5 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -30,9 +30,9 @@
30#include <plat/fpga.h> 30#include <plat/fpga.h>
31#include <mach/gpio.h> 31#include <mach/gpio.h>
32 32
33static void fpga_mask_irq(unsigned int irq) 33static void fpga_mask_irq(struct irq_data *d)
34{ 34{
35 irq -= OMAP_FPGA_IRQ_BASE; 35 unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
36 36
37 if (irq < 8) 37 if (irq < 8)
38 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) 38 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
@@ -58,14 +58,14 @@ static inline u32 get_fpga_unmasked_irqs(void)
58} 58}
59 59
60 60
61static void fpga_ack_irq(unsigned int irq) 61static void fpga_ack_irq(struct irq_data *d)
62{ 62{
63 /* Don't need to explicitly ACK FPGA interrupts */ 63 /* Don't need to explicitly ACK FPGA interrupts */
64} 64}
65 65
66static void fpga_unmask_irq(unsigned int irq) 66static void fpga_unmask_irq(struct irq_data *d)
67{ 67{
68 irq -= OMAP_FPGA_IRQ_BASE; 68 unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
69 69
70 if (irq < 8) 70 if (irq < 8)
71 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)), 71 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
@@ -78,10 +78,10 @@ static void fpga_unmask_irq(unsigned int irq)
78 | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2); 78 | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
79} 79}
80 80
81static void fpga_mask_ack_irq(unsigned int irq) 81static void fpga_mask_ack_irq(struct irq_data *d)
82{ 82{
83 fpga_mask_irq(irq); 83 fpga_mask_irq(d);
84 fpga_ack_irq(irq); 84 fpga_ack_irq(d);
85} 85}
86 86
87void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) 87void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
@@ -105,17 +105,17 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
105 105
106static struct irq_chip omap_fpga_irq_ack = { 106static struct irq_chip omap_fpga_irq_ack = {
107 .name = "FPGA-ack", 107 .name = "FPGA-ack",
108 .ack = fpga_mask_ack_irq, 108 .irq_ack = fpga_mask_ack_irq,
109 .mask = fpga_mask_irq, 109 .irq_mask = fpga_mask_irq,
110 .unmask = fpga_unmask_irq, 110 .irq_unmask = fpga_unmask_irq,
111}; 111};
112 112
113 113
114static struct irq_chip omap_fpga_irq = { 114static struct irq_chip omap_fpga_irq = {
115 .name = "FPGA", 115 .name = "FPGA",
116 .ack = fpga_ack_irq, 116 .irq_ack = fpga_ack_irq,
117 .mask = fpga_mask_irq, 117 .irq_mask = fpga_mask_irq,
118 .unmask = fpga_unmask_irq, 118 .irq_unmask = fpga_unmask_irq,
119}; 119};
120 120
121/* 121/*
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 6bddbc869f4c..47701584df35 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -70,48 +70,48 @@ static inline void irq_bank_writel(unsigned long value, int bank, int offset)
70 omap_writel(value, irq_banks[bank].base_reg + offset); 70 omap_writel(value, irq_banks[bank].base_reg + offset);
71} 71}
72 72
73static void omap_ack_irq(unsigned int irq) 73static void omap_ack_irq(struct irq_data *d)
74{ 74{
75 if (irq > 31) 75 if (d->irq > 31)
76 omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET); 76 omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET);
77 77
78 omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET); 78 omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET);
79} 79}
80 80
81static void omap_mask_irq(unsigned int irq) 81static void omap_mask_irq(struct irq_data *d)
82{ 82{
83 int bank = IRQ_BANK(irq); 83 int bank = IRQ_BANK(d->irq);
84 u32 l; 84 u32 l;
85 85
86 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); 86 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
87 l |= 1 << IRQ_BIT(irq); 87 l |= 1 << IRQ_BIT(d->irq);
88 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); 88 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
89} 89}
90 90
91static void omap_unmask_irq(unsigned int irq) 91static void omap_unmask_irq(struct irq_data *d)
92{ 92{
93 int bank = IRQ_BANK(irq); 93 int bank = IRQ_BANK(d->irq);
94 u32 l; 94 u32 l;
95 95
96 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); 96 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
97 l &= ~(1 << IRQ_BIT(irq)); 97 l &= ~(1 << IRQ_BIT(d->irq));
98 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); 98 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
99} 99}
100 100
101static void omap_mask_ack_irq(unsigned int irq) 101static void omap_mask_ack_irq(struct irq_data *d)
102{ 102{
103 omap_mask_irq(irq); 103 omap_mask_irq(d);
104 omap_ack_irq(irq); 104 omap_ack_irq(d);
105} 105}
106 106
107static int omap_wake_irq(unsigned int irq, unsigned int enable) 107static int omap_wake_irq(struct irq_data *d, unsigned int enable)
108{ 108{
109 int bank = IRQ_BANK(irq); 109 int bank = IRQ_BANK(d->irq);
110 110
111 if (enable) 111 if (enable)
112 irq_banks[bank].wake_enable |= IRQ_BIT(irq); 112 irq_banks[bank].wake_enable |= IRQ_BIT(d->irq);
113 else 113 else
114 irq_banks[bank].wake_enable &= ~IRQ_BIT(irq); 114 irq_banks[bank].wake_enable &= ~IRQ_BIT(d->irq);
115 115
116 return 0; 116 return 0;
117} 117}
@@ -168,10 +168,10 @@ static struct omap_irq_bank omap1610_irq_banks[] = {
168 168
169static struct irq_chip omap_irq_chip = { 169static struct irq_chip omap_irq_chip = {
170 .name = "MPU", 170 .name = "MPU",
171 .ack = omap_mask_ack_irq, 171 .irq_ack = omap_mask_ack_irq,
172 .mask = omap_mask_irq, 172 .irq_mask = omap_mask_irq,
173 .unmask = omap_unmask_irq, 173 .irq_unmask = omap_unmask_irq,
174 .set_wake = omap_wake_irq, 174 .irq_set_wake = omap_wake_irq,
175}; 175};
176 176
177void __init omap_init_irq(void) 177void __init omap_init_irq(void)
@@ -239,9 +239,9 @@ void __init omap_init_irq(void)
239 /* Unmask level 2 handler */ 239 /* Unmask level 2 handler */
240 240
241 if (cpu_is_omap7xx()) 241 if (cpu_is_omap7xx())
242 omap_unmask_irq(INT_7XX_IH2_IRQ); 242 omap_unmask_irq(irq_get_irq_data(INT_7XX_IH2_IRQ));
243 else if (cpu_is_omap15xx()) 243 else if (cpu_is_omap15xx())
244 omap_unmask_irq(INT_1510_IH2_IRQ); 244 omap_unmask_irq(irq_get_irq_data(INT_1510_IH2_IRQ));
245 else if (cpu_is_omap16xx()) 245 else if (cpu_is_omap16xx())
246 omap_unmask_irq(INT_1610_IH2_IRQ); 246 omap_unmask_irq(irq_get_irq_data(INT_1610_IH2_IRQ));
247} 247}