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authorIngo Molnar <mingo@elte.hu>2010-04-30 03:56:41 -0400
committerIngo Molnar <mingo@elte.hu>2010-04-30 03:56:44 -0400
commit3ca50496c2677a2b3fdd3ede86660fd1433beac6 (patch)
tree97a76d8479a8d8a96e04ed0694b8dbf89457bfcc /arch/arm/mach-omap1/timer32k.c
parent462b04e28a7ec1339c892117c3f20a40e55d0e83 (diff)
parent66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8 (diff)
Merge commit 'v2.6.34-rc6' into perf/core
Merge reason: update to the latest -rc. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-omap1/timer32k.c')
-rw-r--r--arch/arm/mach-omap1/timer32k.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 9ad118563f7d..20cfbcc6c60c 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -68,12 +68,6 @@ struct sys_timer omap_timer;
68 * --------------------------------------------------------------------------- 68 * ---------------------------------------------------------------------------
69 */ 69 */
70 70
71#if defined(CONFIG_ARCH_OMAP16XX)
72#define TIMER_32K_SYNCHRONIZED 0xfffbc410
73#else
74#error OMAP 32KHz timer does not currently work on 15XX!
75#endif
76
77/* 16xx specific defines */ 71/* 16xx specific defines */
78#define OMAP1_32K_TIMER_BASE 0xfffb9000 72#define OMAP1_32K_TIMER_BASE 0xfffb9000
79#define OMAP1_32K_TIMER_CR 0x08 73#define OMAP1_32K_TIMER_CR 0x08
@@ -150,15 +144,6 @@ static struct clock_event_device clockevent_32k_timer = {
150 .set_mode = omap_32k_timer_set_mode, 144 .set_mode = omap_32k_timer_set_mode,
151}; 145};
152 146
153/*
154 * The 32KHz synchronized timer is an additional timer on 16xx.
155 * It is always running.
156 */
157static inline unsigned long omap_32k_sync_timer_read(void)
158{
159 return omap_readl(TIMER_32K_SYNCHRONIZED);
160}
161
162static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id) 147static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
163{ 148{
164 struct clock_event_device *evt = &clockevent_32k_timer; 149 struct clock_event_device *evt = &clockevent_32k_timer;