ARM: OMAP: correct misc 15xx and non-15xx platform code

Disable accesses to SOFT_REQ_REG2 and ULPD_SOFT_DISABLE_REQ_REG
registers for 15xx processors that don't have these registers. Enable
level 2 interrupt handler for processors that identify as OMAP 15xx
(e.g 310) and not 1510 specifically. Also fix the following compiler
warning (only visible with CONFIG_OMAP_RESET_CLOCKS):

arch/arm/mach-omap1/clock.c: In function 'omap1_clk_disable_unused':
arch/arm/mach-omap1/clock.c:634: warning: 'return' with a value, in
function returning void

Signed-off-by: Andrzej Zaborowski <balrog@zabor.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 4 insertions, 2 deletions

diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 4834758d340c..8ff232034871 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -256,7 +256,8 @@ void omap_pm_suspend(void)
                 tps65010_set_led(LED1, OFF);
         }
 
-        omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
+        if (!cpu_is_omap15xx())
+                omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
 
         /*
          * Step 1: turn off interrupts (FIXME: NOTE: already disabled)
@@ -434,7 +435,8 @@ void omap_pm_suspend(void)
                 MPUI1610_RESTORE(OMAP_IH2_3_MIR);
         }
 
-        omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG);
+        if (!cpu_is_omap15xx())
+                omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG);
 
         /*
          * Reenable interrupts