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author | Alistair Buxton <a.j.buxton@gmail.com> | 2009-09-22 05:02:58 -0400 |
---|---|---|
committer | Alistair Buxton <a.j.buxton@gmail.com> | 2009-10-07 18:14:06 -0400 |
commit | 7c0069264017fdac8ef017b8893f0f0d7a13851a (patch) | |
tree | 2ef9a74c5e8a19e2d7437a61f6f546a1c7e782fb /arch/arm/mach-omap1/pm.c | |
parent | 372b1c32e7e7d7aa5f44e0eaed4ad8ae21e4e9da (diff) |
OMAP7XX: Rename all the rest of the omap730 references in omap1 core
This patch is part of a series which removes references to omap730 in code
which is shared with omap850, replacing them with references to omap7xx.
This updates all the remaining omap730 references in miscellaneous local
variables, macros and similar.
Signed-off-by: Alistair Buxton <a.j.buxton@gmail.com>
Reviewed-by: Zebediah C. McClure <zmc@lurian.net>
Diffstat (limited to 'arch/arm/mach-omap1/pm.c')
-rw-r--r-- | arch/arm/mach-omap1/pm.c | 70 |
1 files changed, 35 insertions, 35 deletions
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 58479c75cac4..10f4e4adca17 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -62,7 +62,7 @@ | |||
62 | static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; | 62 | static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; |
63 | static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; | 63 | static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; |
64 | static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; | 64 | static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; |
65 | static unsigned int mpui730_sleep_save[MPUI730_SLEEP_SAVE_SIZE]; | 65 | static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE]; |
66 | static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; | 66 | static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; |
67 | static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; | 67 | static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; |
68 | 68 | ||
@@ -254,14 +254,14 @@ void omap1_pm_suspend(void) | |||
254 | */ | 254 | */ |
255 | 255 | ||
256 | if (cpu_is_omap7xx()) { | 256 | if (cpu_is_omap7xx()) { |
257 | MPUI730_SAVE(OMAP_IH1_MIR); | 257 | MPUI7XX_SAVE(OMAP_IH1_MIR); |
258 | MPUI730_SAVE(OMAP_IH2_0_MIR); | 258 | MPUI7XX_SAVE(OMAP_IH2_0_MIR); |
259 | MPUI730_SAVE(OMAP_IH2_1_MIR); | 259 | MPUI7XX_SAVE(OMAP_IH2_1_MIR); |
260 | MPUI730_SAVE(MPUI_CTRL); | 260 | MPUI7XX_SAVE(MPUI_CTRL); |
261 | MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); | 261 | MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); |
262 | MPUI730_SAVE(MPUI_DSP_API_CONFIG); | 262 | MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); |
263 | MPUI730_SAVE(EMIFS_CONFIG); | 263 | MPUI7XX_SAVE(EMIFS_CONFIG); |
264 | MPUI730_SAVE(EMIFF_SDRAM_CONFIG); | 264 | MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); |
265 | 265 | ||
266 | } else if (cpu_is_omap15xx()) { | 266 | } else if (cpu_is_omap15xx()) { |
267 | MPUI1510_SAVE(OMAP_IH1_MIR); | 267 | MPUI1510_SAVE(OMAP_IH1_MIR); |
@@ -384,11 +384,11 @@ void omap1_pm_suspend(void) | |||
384 | ULPD_RESTORE(ULPD_STATUS_REQ); | 384 | ULPD_RESTORE(ULPD_STATUS_REQ); |
385 | 385 | ||
386 | if (cpu_is_omap7xx()) { | 386 | if (cpu_is_omap7xx()) { |
387 | MPUI730_RESTORE(EMIFS_CONFIG); | 387 | MPUI7XX_RESTORE(EMIFS_CONFIG); |
388 | MPUI730_RESTORE(EMIFF_SDRAM_CONFIG); | 388 | MPUI7XX_RESTORE(EMIFF_SDRAM_CONFIG); |
389 | MPUI730_RESTORE(OMAP_IH1_MIR); | 389 | MPUI7XX_RESTORE(OMAP_IH1_MIR); |
390 | MPUI730_RESTORE(OMAP_IH2_0_MIR); | 390 | MPUI7XX_RESTORE(OMAP_IH2_0_MIR); |
391 | MPUI730_RESTORE(OMAP_IH2_1_MIR); | 391 | MPUI7XX_RESTORE(OMAP_IH2_1_MIR); |
392 | } else if (cpu_is_omap15xx()) { | 392 | } else if (cpu_is_omap15xx()) { |
393 | MPUI1510_RESTORE(MPUI_CTRL); | 393 | MPUI1510_RESTORE(MPUI_CTRL); |
394 | MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); | 394 | MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); |
@@ -462,12 +462,12 @@ static int omap_pm_read_proc( | |||
462 | ULPD_SAVE(ULPD_POWER_CTRL); | 462 | ULPD_SAVE(ULPD_POWER_CTRL); |
463 | 463 | ||
464 | if (cpu_is_omap7xx()) { | 464 | if (cpu_is_omap7xx()) { |
465 | MPUI730_SAVE(MPUI_CTRL); | 465 | MPUI7XX_SAVE(MPUI_CTRL); |
466 | MPUI730_SAVE(MPUI_DSP_STATUS); | 466 | MPUI7XX_SAVE(MPUI_DSP_STATUS); |
467 | MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); | 467 | MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); |
468 | MPUI730_SAVE(MPUI_DSP_API_CONFIG); | 468 | MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); |
469 | MPUI730_SAVE(EMIFF_SDRAM_CONFIG); | 469 | MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); |
470 | MPUI730_SAVE(EMIFS_CONFIG); | 470 | MPUI7XX_SAVE(EMIFS_CONFIG); |
471 | } else if (cpu_is_omap15xx()) { | 471 | } else if (cpu_is_omap15xx()) { |
472 | MPUI1510_SAVE(MPUI_CTRL); | 472 | MPUI1510_SAVE(MPUI_CTRL); |
473 | MPUI1510_SAVE(MPUI_DSP_STATUS); | 473 | MPUI1510_SAVE(MPUI_DSP_STATUS); |
@@ -519,18 +519,18 @@ static int omap_pm_read_proc( | |||
519 | 519 | ||
520 | if (cpu_is_omap7xx()) { | 520 | if (cpu_is_omap7xx()) { |
521 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | 521 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
522 | "MPUI730_CTRL_REG 0x%-8x \n" | 522 | "MPUI7XX_CTRL_REG 0x%-8x \n" |
523 | "MPUI730_DSP_STATUS_REG: 0x%-8x \n" | 523 | "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n" |
524 | "MPUI730_DSP_BOOT_CONFIG_REG: 0x%-8x \n" | 524 | "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n" |
525 | "MPUI730_DSP_API_CONFIG_REG: 0x%-8x \n" | 525 | "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n" |
526 | "MPUI730_SDRAM_CONFIG_REG: 0x%-8x \n" | 526 | "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n" |
527 | "MPUI730_EMIFS_CONFIG_REG: 0x%-8x \n", | 527 | "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n", |
528 | MPUI730_SHOW(MPUI_CTRL), | 528 | MPUI7XX_SHOW(MPUI_CTRL), |
529 | MPUI730_SHOW(MPUI_DSP_STATUS), | 529 | MPUI7XX_SHOW(MPUI_DSP_STATUS), |
530 | MPUI730_SHOW(MPUI_DSP_BOOT_CONFIG), | 530 | MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG), |
531 | MPUI730_SHOW(MPUI_DSP_API_CONFIG), | 531 | MPUI7XX_SHOW(MPUI_DSP_API_CONFIG), |
532 | MPUI730_SHOW(EMIFF_SDRAM_CONFIG), | 532 | MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG), |
533 | MPUI730_SHOW(EMIFS_CONFIG)); | 533 | MPUI7XX_SHOW(EMIFS_CONFIG)); |
534 | } else if (cpu_is_omap15xx()) { | 534 | } else if (cpu_is_omap15xx()) { |
535 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | 535 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
536 | "MPUI1510_CTRL_REG 0x%-8x \n" | 536 | "MPUI1510_CTRL_REG 0x%-8x \n" |
@@ -669,8 +669,8 @@ static int __init omap_pm_init(void) | |||
669 | * memory the MPU can see when it wakes up. | 669 | * memory the MPU can see when it wakes up. |
670 | */ | 670 | */ |
671 | if (cpu_is_omap7xx()) { | 671 | if (cpu_is_omap7xx()) { |
672 | omap_sram_suspend = omap_sram_push(omap730_cpu_suspend, | 672 | omap_sram_suspend = omap_sram_push(omap7xx_cpu_suspend, |
673 | omap730_cpu_suspend_sz); | 673 | omap7xx_cpu_suspend_sz); |
674 | } else if (cpu_is_omap15xx()) { | 674 | } else if (cpu_is_omap15xx()) { |
675 | omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, | 675 | omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, |
676 | omap1510_cpu_suspend_sz); | 676 | omap1510_cpu_suspend_sz); |
@@ -701,7 +701,7 @@ static int __init omap_pm_init(void) | |||
701 | 701 | ||
702 | /* Configure IDLECT3 */ | 702 | /* Configure IDLECT3 */ |
703 | if (cpu_is_omap7xx()) | 703 | if (cpu_is_omap7xx()) |
704 | omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3); | 704 | omap_writel(OMAP7XX_IDLECT3_VAL, OMAP7XX_IDLECT3); |
705 | else if (cpu_is_omap16xx()) | 705 | else if (cpu_is_omap16xx()) |
706 | omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); | 706 | omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); |
707 | 707 | ||