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authorPaul Walmsley <paul@pwsan.com>2009-12-08 18:29:38 -0500
committerpaul <paul@twilight.(none)>2009-12-11 19:00:40 -0500
commit52650505fbf3a6ab851c801f54e73e76c55ab8da (patch)
tree07fc2b2eccb313fc7a0e3ade4a564f2df08fc33c /arch/arm/mach-omap1/opp_data.c
parent6f62b58dd4e697a23a308f5b77781394949d333e (diff)
OMAP1 clock: convert mach-omap1/clock.h to mach-omap1/clock_data.c
The OMAP1 clock code currently #includes a large .h file full of static data structures. Instead, define the data in a .c file. Russell King <linux@arm.linux.org.uk> proposed this new arrangement: http://marc.info/?l=linux-omap&m=125967425908895&w=2 This patch also deals with most of the flagrant checkpatch violations. While here, separate the mpu_rate data structures out into their own files, opp.h and opp_data.c. In the long run, these mpu_rate tables should be replaced with OPP code. Also includes a patch from Felipe Balbi <felipe.balbi@nokia.com> to mark omap1_clk_functions as __initdata to avoid a section warning: http://patchwork.kernel.org/patch/64366/ Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Felipe Balbi <felipe.balbi@nokia.com> Cc: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm/mach-omap1/opp_data.c')
-rw-r--r--arch/arm/mach-omap1/opp_data.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/mach-omap1/opp_data.c b/arch/arm/mach-omap1/opp_data.c
new file mode 100644
index 000000000000..75a546514994
--- /dev/null
+++ b/arch/arm/mach-omap1/opp_data.c
@@ -0,0 +1,59 @@
1/*
2 * linux/arch/arm/mach-omap1/opp_data.c
3 *
4 * Copyright (C) 2004 - 2005 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include "opp.h"
14
15/*-------------------------------------------------------------------------
16 * Omap1 MPU rate table
17 *-------------------------------------------------------------------------*/
18struct mpu_rate omap1_rate_table[] = {
19 /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
20 * NOTE: Comment order here is different from bits in CKCTL value:
21 * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
22 */
23#if defined(CONFIG_OMAP_ARM_216MHZ)
24 { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */
25#endif
26#if defined(CONFIG_OMAP_ARM_195MHZ)
27 { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */
28#endif
29#if defined(CONFIG_OMAP_ARM_192MHZ)
30 { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
31 { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
32 { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
33 { 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */
34 { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
35#endif
36#if defined(CONFIG_OMAP_ARM_182MHZ)
37 { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */
38#endif
39#if defined(CONFIG_OMAP_ARM_168MHZ)
40 { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
41#endif
42#if defined(CONFIG_OMAP_ARM_150MHZ)
43 { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
44#endif
45#if defined(CONFIG_OMAP_ARM_120MHZ)
46 { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
47#endif
48#if defined(CONFIG_OMAP_ARM_96MHZ)
49 { 96000000, 12000000, 96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */
50#endif
51#if defined(CONFIG_OMAP_ARM_60MHZ)
52 { 60000000, 12000000, 60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */
53#endif
54#if defined(CONFIG_OMAP_ARM_30MHZ)
55 { 30000000, 12000000, 60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */
56#endif
57 { 0, 0, 0, 0, 0 },
58};
59