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authorAlistair Buxton <a.j.buxton@gmail.com>2009-09-22 01:33:04 -0400
committerAlistair Buxton <a.j.buxton@gmail.com>2009-10-07 18:14:03 -0400
commit559663b980c8293b3624b4d91d08efc71f6fae82 (patch)
treeb4db40a8dee43669c4ef5a2ccc9997116f39ae11 /arch/arm/mach-omap1/irq.c
parent207b0e9cfef296c469cce84f74455f97f8ab2227 (diff)
OMAP7XX: IRQ: Remove duplicate omap850 code
This patch is part of a series which unifies all duplicated code between omap730 and omap850. All cpu checks are converted to cpu_is_omap7xx() and CONFIG_ARCH_OMAP850 is added to all CONFIG_ARCH_OMAP730 checks. This fixes a bug which prevents IRQs from being enabled on omap850 due to a missing check in entry-macro.S, which was found by Cory Maccarrone. Signed-off-by: Alistair Buxton <a.j.buxton@gmail.com> Reviewed-by: Zebediah C. McClure <zmc@lurian.net>
Diffstat (limited to 'arch/arm/mach-omap1/irq.c')
-rw-r--r--arch/arm/mach-omap1/irq.c24
1 files changed, 4 insertions, 20 deletions
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index de03c8448994..c05999c41165 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -137,7 +137,7 @@ static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger)
137 irq_bank_writel(val, bank, offset); 137 irq_bank_writel(val, bank, offset);
138} 138}
139 139
140#ifdef CONFIG_ARCH_OMAP730 140#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
141static struct omap_irq_bank omap730_irq_banks[] = { 141static struct omap_irq_bank omap730_irq_banks[] = {
142 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, 142 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
143 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, 143 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
@@ -145,14 +145,6 @@ static struct omap_irq_bank omap730_irq_banks[] = {
145}; 145};
146#endif 146#endif
147 147
148#ifdef CONFIG_ARCH_OMAP850
149static struct omap_irq_bank omap850_irq_banks[] = {
150 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
151 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
152 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 },
153};
154#endif
155
156#ifdef CONFIG_ARCH_OMAP15XX 148#ifdef CONFIG_ARCH_OMAP15XX
157static struct omap_irq_bank omap1510_irq_banks[] = { 149static struct omap_irq_bank omap1510_irq_banks[] = {
158 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff }, 150 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff },
@@ -186,18 +178,12 @@ void __init omap_init_irq(void)
186{ 178{
187 int i, j; 179 int i, j;
188 180
189#ifdef CONFIG_ARCH_OMAP730 181#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
190 if (cpu_is_omap730()) { 182 if (cpu_is_omap7xx()) {
191 irq_banks = omap730_irq_banks; 183 irq_banks = omap730_irq_banks;
192 irq_bank_count = ARRAY_SIZE(omap730_irq_banks); 184 irq_bank_count = ARRAY_SIZE(omap730_irq_banks);
193 } 185 }
194#endif 186#endif
195#ifdef CONFIG_ARCH_OMAP850
196 if (cpu_is_omap850()) {
197 irq_banks = omap850_irq_banks;
198 irq_bank_count = ARRAY_SIZE(omap850_irq_banks);
199 }
200#endif
201#ifdef CONFIG_ARCH_OMAP15XX 187#ifdef CONFIG_ARCH_OMAP15XX
202 if (cpu_is_omap1510()) { 188 if (cpu_is_omap1510()) {
203 irq_banks = omap1510_irq_banks; 189 irq_banks = omap1510_irq_banks;
@@ -247,10 +233,8 @@ void __init omap_init_irq(void)
247 233
248 /* Unmask level 2 handler */ 234 /* Unmask level 2 handler */
249 235
250 if (cpu_is_omap730()) 236 if (cpu_is_omap7xx())
251 omap_unmask_irq(INT_730_IH2_IRQ); 237 omap_unmask_irq(INT_730_IH2_IRQ);
252 else if (cpu_is_omap850())
253 omap_unmask_irq(INT_850_IH2_IRQ);
254 else if (cpu_is_omap15xx()) 238 else if (cpu_is_omap15xx())
255 omap_unmask_irq(INT_1510_IH2_IRQ); 239 omap_unmask_irq(INT_1510_IH2_IRQ);
256 else if (cpu_is_omap16xx()) 240 else if (cpu_is_omap16xx())