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authorTony Lindgren <tony@atomide.com>2012-09-23 22:31:35 -0400
committerTony Lindgren <tony@atomide.com>2012-09-23 22:31:35 -0400
commit9cd68fa707cf6372f33eb51a5719dd7626efe5f6 (patch)
tree66cde27bd288e011a6e4cff87d342666399a1266 /arch/arm/mach-omap1/include/mach/omap7xx.h
parent5698bd757d55b1bb87edd1a9744ab09c142abfc2 (diff)
parent76a5d9bfc42d60e9a672e0cae776157a60970f4e (diff)
Merge tag 'omap-devel-b-c-2-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-late
OMAP patches intended for the 3.7 merge window: - Runtime PM conversions for the GPMC and RNG IP blocks - Preparation patches for the OMAP common clock framework conversion - clkdev alias additions required by other drivers - Performance Monitoring Unit (PMU) support for OMAP2, 3, and non-4430 OMAP4 - OMAP hwmod code and data improvements - Preparation patches for the IOMMU runtime PM conversion - Preparation patches for OMAP4 full-chip retention support Based on a merge of v3.6-rc6, the omap-cleanup-b-for-3.7 tag (7852ec0536ca39cefffc6301dc77f8ae55592926),the cleanup-fixes-for-v3.7 tag (de6ca33a96a6bf61fcb91d3d399703e19ead9d1e), and the omap-devel-am33xx-for-v3.7 tag (11964f53eb4d9ce59a058be9999d9cfcb1ced878), due to dependencies. These patches have been tested for meaningful warnings from checkpatch, sparse, smatch, and cppcheck. Basic build, boot[1], and PM test logs are available here: http://www.pwsan.com/omap/testlogs/hwmod_prcm_clock_a_3.7/20120923173830/ ... 1. Note that the N800 boot fails due to a known issue present in the base commit: http://www.spinics.net/lists/arm-kernel/msg196034.html
Diffstat (limited to 'arch/arm/mach-omap1/include/mach/omap7xx.h')
-rw-r--r--arch/arm/mach-omap1/include/mach/omap7xx.h106
1 files changed, 106 insertions, 0 deletions
diff --git a/arch/arm/mach-omap1/include/mach/omap7xx.h b/arch/arm/mach-omap1/include/mach/omap7xx.h
new file mode 100644
index 000000000000..63da994bc609
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+++ b/arch/arm/mach-omap1/include/mach/omap7xx.h
@@ -0,0 +1,106 @@
1/*
2 * Hardware definitions for TI OMAP7XX processor.
3 *
4 * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
5 * Adapted for omap850 by Zebediah C. McClure <zmc@lurian.net>
6 * Adapted for omap7xx by Alistair Buxton <a.j.buxton@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP7XX_H
30#define __ASM_ARCH_OMAP7XX_H
31
32/*
33 * ----------------------------------------------------------------------------
34 * Base addresses
35 * ----------------------------------------------------------------------------
36 */
37
38/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
39
40#define OMAP7XX_DSP_BASE 0xE0000000
41#define OMAP7XX_DSP_SIZE 0x50000
42#define OMAP7XX_DSP_START 0xE0000000
43
44#define OMAP7XX_DSPREG_BASE 0xE1000000
45#define OMAP7XX_DSPREG_SIZE SZ_128K
46#define OMAP7XX_DSPREG_START 0xE1000000
47
48#define OMAP7XX_SPI1_BASE 0xfffc0800
49#define OMAP7XX_SPI2_BASE 0xfffc1000
50
51/*
52 * ----------------------------------------------------------------------------
53 * OMAP7XX specific configuration registers
54 * ----------------------------------------------------------------------------
55 */
56#define OMAP7XX_CONFIG_BASE 0xfffe1000
57#define OMAP7XX_IO_CONF_0 0xfffe1070
58#define OMAP7XX_IO_CONF_1 0xfffe1074
59#define OMAP7XX_IO_CONF_2 0xfffe1078
60#define OMAP7XX_IO_CONF_3 0xfffe107c
61#define OMAP7XX_IO_CONF_4 0xfffe1080
62#define OMAP7XX_IO_CONF_5 0xfffe1084
63#define OMAP7XX_IO_CONF_6 0xfffe1088
64#define OMAP7XX_IO_CONF_7 0xfffe108c
65#define OMAP7XX_IO_CONF_8 0xfffe1090
66#define OMAP7XX_IO_CONF_9 0xfffe1094
67#define OMAP7XX_IO_CONF_10 0xfffe1098
68#define OMAP7XX_IO_CONF_11 0xfffe109c
69#define OMAP7XX_IO_CONF_12 0xfffe10a0
70#define OMAP7XX_IO_CONF_13 0xfffe10a4
71
72#define OMAP7XX_MODE_1 0xfffe1010
73#define OMAP7XX_MODE_2 0xfffe1014
74
75/* CSMI specials: in terms of base + offset */
76#define OMAP7XX_MODE2_OFFSET 0x14
77
78/*
79 * ----------------------------------------------------------------------------
80 * OMAP7XX traffic controller configuration registers
81 * ----------------------------------------------------------------------------
82 */
83#define OMAP7XX_FLASH_CFG_0 0xfffecc10
84#define OMAP7XX_FLASH_ACFG_0 0xfffecc50
85#define OMAP7XX_FLASH_CFG_1 0xfffecc14
86#define OMAP7XX_FLASH_ACFG_1 0xfffecc54
87
88/*
89 * ----------------------------------------------------------------------------
90 * OMAP7XX DSP control registers
91 * ----------------------------------------------------------------------------
92 */
93#define OMAP7XX_ICR_BASE 0xfffbb800
94#define OMAP7XX_DSP_M_CTL 0xfffbb804
95#define OMAP7XX_DSP_MMU_BASE 0xfffed200
96
97/*
98 * ----------------------------------------------------------------------------
99 * OMAP7XX PCC_UPLD configuration registers
100 * ----------------------------------------------------------------------------
101 */
102#define OMAP7XX_PCC_UPLD_CTRL_BASE (0xfffe0900)
103#define OMAP7XX_PCC_UPLD_CTRL (OMAP7XX_PCC_UPLD_CTRL_BASE + 0x00)
104
105#endif /* __ASM_ARCH_OMAP7XX_H */
106