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authorCory Maccarrone <darkstar6262@gmail.com>2010-08-02 07:21:39 -0400
committerTony Lindgren <tony@atomide.com>2010-08-02 07:21:39 -0400
commit8b8fbd39e20b5db95f8f4b3bda4c9d3fcf8e3afc (patch)
tree2e164da265d61b97cf2edfa55579032e24dd77df /arch/arm/mach-omap1/clock_data.c
parent35ddf7c003f54fc9878a15384beb9a900d40319d (diff)
omap1: omap7xx clocks, mux, serial fixes
This change adds in the necessary clocks and mux pins for UART control on omap7xx devices. I also made a change in the serial code to only try and initialize two UARTs in omap_serial_init, as these devices don't have three. Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap1/clock_data.c')
-rw-r--r--arch/arm/mach-omap1/clock_data.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index aa8558adbf1c..9240bc1026a3 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -478,6 +478,24 @@ static struct clk usb_dc_ck7xx = {
478 .enable_bit = 8, 478 .enable_bit = 8,
479}; 479};
480 480
481static struct clk uart1_7xx = {
482 .name = "uart1_ck",
483 .ops = &clkops_generic,
484 /* Direct from ULPD, no parent */
485 .rate = 12000000,
486 .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
487 .enable_bit = 9,
488};
489
490static struct clk uart2_7xx = {
491 .name = "uart2_ck",
492 .ops = &clkops_generic,
493 /* Direct from ULPD, no parent */
494 .rate = 12000000,
495 .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
496 .enable_bit = 11,
497};
498
481static struct clk mclk_1510 = { 499static struct clk mclk_1510 = {
482 .name = "mclk", 500 .name = "mclk",
483 .ops = &clkops_generic, 501 .ops = &clkops_generic,
@@ -620,7 +638,9 @@ static struct omap_clk omap_clks[] = {
620 /* ULPD clocks */ 638 /* ULPD clocks */
621 CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), 639 CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310),
622 CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), 640 CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX),
641 CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX),
623 CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), 642 CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310),
643 CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX),
624 CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), 644 CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310),
625 CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), 645 CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX),
626 CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), 646 CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310),