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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-01-31 05:05:51 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-08 12:50:42 -0500
commit3f0a820c4c0b4670fb5f164baa5582e23c2ef118 (patch)
tree6af02e1456c0316791ab95e7da9c09496f29c232 /arch/arm/mach-omap1/clock.h
parentb5088c0d90b898802318c62caf2320a53df6ce57 (diff)
[ARM] omap: create a proper tree of clocks
Traditionally, we've tracked the parent/child relationships between clk structures by setting the child's parent member to point at the upstream clock. As a result, when decending the tree, we have had to scan all clocks to find the children. Avoid this wasteful scanning by keeping a list of the clock's children. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap1/clock.h')
-rw-r--r--arch/arm/mach-omap1/clock.h7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 1b4dd056d9bd..28bc74e93e8d 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -155,7 +155,6 @@ static struct clk ck_dpll1 = {
155 .name = "ck_dpll1", 155 .name = "ck_dpll1",
156 .ops = &clkops_null, 156 .ops = &clkops_null,
157 .parent = &ck_ref, 157 .parent = &ck_ref,
158 .flags = RATE_PROPAGATES,
159}; 158};
160 159
161static struct arm_idlect1_clk ck_dpll1out = { 160static struct arm_idlect1_clk ck_dpll1out = {
@@ -163,8 +162,7 @@ static struct arm_idlect1_clk ck_dpll1out = {
163 .name = "ck_dpll1out", 162 .name = "ck_dpll1out",
164 .ops = &clkops_generic, 163 .ops = &clkops_generic,
165 .parent = &ck_dpll1, 164 .parent = &ck_dpll1,
166 .flags = CLOCK_IDLE_CONTROL | 165 .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT,
167 ENABLE_REG_32BIT | RATE_PROPAGATES,
168 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 166 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
169 .enable_bit = EN_CKOUT_ARM, 167 .enable_bit = EN_CKOUT_ARM,
170 .recalc = &followparent_recalc, 168 .recalc = &followparent_recalc,
@@ -187,7 +185,6 @@ static struct clk arm_ck = {
187 .name = "arm_ck", 185 .name = "arm_ck",
188 .ops = &clkops_null, 186 .ops = &clkops_null,
189 .parent = &ck_dpll1, 187 .parent = &ck_dpll1,
190 .flags = RATE_PROPAGATES,
191 .rate_offset = CKCTL_ARMDIV_OFFSET, 188 .rate_offset = CKCTL_ARMDIV_OFFSET,
192 .recalc = &omap1_ckctl_recalc, 189 .recalc = &omap1_ckctl_recalc,
193 .round_rate = omap1_clk_round_rate_ckctl_arm, 190 .round_rate = omap1_clk_round_rate_ckctl_arm,
@@ -328,7 +325,7 @@ static struct arm_idlect1_clk tc_ck = {
328 .name = "tc_ck", 325 .name = "tc_ck",
329 .ops = &clkops_null, 326 .ops = &clkops_null,
330 .parent = &ck_dpll1, 327 .parent = &ck_dpll1,
331 .flags = RATE_PROPAGATES | CLOCK_IDLE_CONTROL, 328 .flags = CLOCK_IDLE_CONTROL,
332 .rate_offset = CKCTL_TCDIV_OFFSET, 329 .rate_offset = CKCTL_TCDIV_OFFSET,
333 .recalc = &omap1_ckctl_recalc, 330 .recalc = &omap1_ckctl_recalc,
334 .round_rate = omap1_clk_round_rate_ckctl_arm, 331 .round_rate = omap1_clk_round_rate_ckctl_arm,