diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-14 17:24:42 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-14 17:24:42 -0400 |
commit | b6825d2df55aa7d7341c715b577b73a6a03dc944 (patch) | |
tree | ae4f0f52f4c2ad4e501dd323318486ccdd7fcd93 /arch/arm/mach-omap1/clock.c | |
parent | 6defd90433729c2d795865165cb34d938d8ff07c (diff) | |
parent | aa59e19d05114f9fb7718d6bc8398255476fb4f5 (diff) |
Merge branch 'omap-all' into devel
Conflicts:
arch/arm/mach-omap2/gpmc.c
arch/arm/mach-omap2/irq.c
Diffstat (limited to 'arch/arm/mach-omap1/clock.c')
-rw-r--r-- | arch/arm/mach-omap1/clock.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 478c2c9a22cb..5fba20731710 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -201,7 +201,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) | |||
201 | return -EINVAL; | 201 | return -EINVAL; |
202 | 202 | ||
203 | parent = clk->parent; | 203 | parent = clk->parent; |
204 | if (unlikely(parent == 0)) | 204 | if (unlikely(parent == NULL)) |
205 | return -EIO; | 205 | return -EIO; |
206 | 206 | ||
207 | realrate = parent->rate; | 207 | realrate = parent->rate; |
@@ -499,7 +499,7 @@ static int omap1_clk_enable_generic(struct clk *clk) | |||
499 | if (clk->flags & ALWAYS_ENABLED) | 499 | if (clk->flags & ALWAYS_ENABLED) |
500 | return 0; | 500 | return 0; |
501 | 501 | ||
502 | if (unlikely(clk->enable_reg == 0)) { | 502 | if (unlikely(clk->enable_reg == NULL)) { |
503 | printk(KERN_ERR "clock.c: Enable for %s without enable code\n", | 503 | printk(KERN_ERR "clock.c: Enable for %s without enable code\n", |
504 | clk->name); | 504 | clk->name); |
505 | return -EINVAL; | 505 | return -EINVAL; |
@@ -535,7 +535,7 @@ static void omap1_clk_disable_generic(struct clk *clk) | |||
535 | __u16 regval16; | 535 | __u16 regval16; |
536 | __u32 regval32; | 536 | __u32 regval32; |
537 | 537 | ||
538 | if (clk->enable_reg == 0) | 538 | if (clk->enable_reg == NULL) |
539 | return; | 539 | return; |
540 | 540 | ||
541 | if (clk->flags & ENABLE_REG_32BIT) { | 541 | if (clk->flags & ENABLE_REG_32BIT) { |
@@ -577,7 +577,7 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) | |||
577 | return clk->parent->rate / (1 << dsor_exp); | 577 | return clk->parent->rate / (1 << dsor_exp); |
578 | } | 578 | } |
579 | 579 | ||
580 | if(clk->round_rate != 0) | 580 | if (clk->round_rate != NULL) |
581 | return clk->round_rate(clk, rate); | 581 | return clk->round_rate(clk, rate); |
582 | 582 | ||
583 | return clk->rate; | 583 | return clk->rate; |
@@ -625,7 +625,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk) | |||
625 | 625 | ||
626 | /* Clocks in the DSP domain need api_ck. Just assume bootloader | 626 | /* Clocks in the DSP domain need api_ck. Just assume bootloader |
627 | * has not enabled any DSP clocks */ | 627 | * has not enabled any DSP clocks */ |
628 | if ((u32)clk->enable_reg == DSP_IDLECT2) { | 628 | if (clk->enable_reg == DSP_IDLECT2) { |
629 | printk(KERN_INFO "Skipping reset check for DSP domain " | 629 | printk(KERN_INFO "Skipping reset check for DSP domain " |
630 | "clock \"%s\"\n", clk->name); | 630 | "clock \"%s\"\n", clk->name); |
631 | return; | 631 | return; |