ARM: OMAP: add SoSSI clock

This is needed, so that disabling the SoSSI clock during idle can
be prevented.

Signed-off-by: Imre Deak <imre.deak@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 34 insertions, 0 deletions

diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index f625f6dd228a..5d9faa68d2ec 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -49,6 +49,15 @@ static void omap1_uart_recalc(struct clk * clk)
                 clk->rate = 12000000;
 }
 
+static void omap1_sossi_recalc(struct clk *clk)
+{
+        u32 div = omap_readl(MOD_CONF_CTRL_1);
+
+        div = (div >> 17) & 0x7;
+        div++;
+        clk->rate = clk->parent->rate / div;
+}
+
 static int omap1_clk_enable_dsp_domain(struct clk *clk)
 {
         int retval;
@@ -396,6 +405,31 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate)
         return 0;
 }
 
+static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate)
+{
+        u32 l;
+        int div;
+        unsigned long p_rate;
+
+        p_rate = clk->parent->rate;
+        /* Round towards slower frequency */
+        div = (p_rate + rate - 1) / rate;
+        div--;
+        if (div < 0 || div > 7)
+                return -EINVAL;
+
+        l = omap_readl(MOD_CONF_CTRL_1);
+        l &= ~(7 << 17);
+        l |= div << 17;
+        omap_writel(l, MOD_CONF_CTRL_1);
+
+        clk->rate = p_rate / (div + 1);
+        if (unlikely(clk->flags & RATE_PROPAGATES))
+                propagate_rate(clk);
+
+        return 0;
+}
+
 static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate)
 {
         return 96000000 / calc_ext_dsor(rate);