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authorUwe Kleine-König <Uwe.Kleine-Koenig@digi.com>2008-02-15 02:41:06 -0500
committerUwe Kleine-König <Uwe.Kleine-Koenig@digi.com>2008-03-31 02:17:01 -0400
commit724ce5ee15ff4c4f3035110b683b990a3b33c832 (patch)
tree7b07d25bf64d2e6dad4495c847d1b24d9d5dca43 /arch/arm/mach-ns9xxx
parent3a581349b961f225893103a0fbbd065a831c5184 (diff)
ns9xxx: prepare for adding support for Digi ns921x processors
The hardware team changed some things that were taken as being common to all ns9xxx processors up to now. This patch addresses: - irqs: s/IRQ_/IRQ_NS9360_/ - system module registers: some registers are still general, their definition lives now in include/asm-arm/arch-ns9xxx/regs-sys-common.h. The ns9360 specific ones are in .../regs-sys-ns9360.h As a result ns9360_systemclock cannot be static inline any more as its definition needs regs-sys-ns9360.h. This becomes a real problem when adding support for ns9215 as this will need regs-sys-ns9215.h and including both files will not work. For the same reason ns9360_reset() is now non-inline and gpio functions live in their own file. - register mapping: s/ns9xxx_map_io/ns9360_map_io/ - timer registers: move time.c to time-ns9360.c; s/ns9xxx_timer/ns9360_timer/ Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
Diffstat (limited to 'arch/arm/mach-ns9xxx')
-rw-r--r--arch/arm/mach-ns9xxx/Makefile4
-rw-r--r--arch/arm/mach-ns9xxx/board-a9m9750dev.c11
-rw-r--r--arch/arm/mach-ns9xxx/generic.c27
-rw-r--r--arch/arm/mach-ns9xxx/generic.h5
-rw-r--r--arch/arm/mach-ns9xxx/gpio-ns9360.c118
-rw-r--r--arch/arm/mach-ns9xxx/gpio-ns9360.h13
-rw-r--r--arch/arm/mach-ns9xxx/gpio.c141
-rw-r--r--arch/arm/mach-ns9xxx/irq.c4
-rw-r--r--arch/arm/mach-ns9xxx/mach-cc9p9360dev.c8
-rw-r--r--arch/arm/mach-ns9xxx/mach-cc9p9360js.c8
-rw-r--r--arch/arm/mach-ns9xxx/processor-ns9360.c54
-rw-r--r--arch/arm/mach-ns9xxx/time-ns9360.c (renamed from arch/arm/mach-ns9xxx/time.c)75
12 files changed, 294 insertions, 174 deletions
diff --git a/arch/arm/mach-ns9xxx/Makefile b/arch/arm/mach-ns9xxx/Makefile
index ca2c68dede1d..67a9e30c8789 100644
--- a/arch/arm/mach-ns9xxx/Makefile
+++ b/arch/arm/mach-ns9xxx/Makefile
@@ -1,8 +1,10 @@
1obj-y := irq.o time.o generic.o gpio.o 1obj-y := irq.o generic.o gpio.o
2 2
3obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o 3obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o
4obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o 4obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o
5 5
6obj-$(CONFIG_PROCESSOR_NS9360) += gpio-ns9360.o processor-ns9360.o time-ns9360.o
7
6obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o 8obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o
7obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o 9obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o
8 10
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index 14a06da25ac2..a494b71c0195 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -14,7 +14,8 @@
14#include <asm/gpio.h> 14#include <asm/gpio.h>
15 15
16#include <asm/arch-ns9xxx/board.h> 16#include <asm/arch-ns9xxx/board.h>
17#include <asm/arch-ns9xxx/regs-sys.h> 17#include <asm/arch-ns9xxx/processor-ns9360.h>
18#include <asm/arch-ns9xxx/regs-sys-ns9360.h>
18#include <asm/arch-ns9xxx/regs-mem.h> 19#include <asm/arch-ns9xxx/regs-mem.h>
19#include <asm/arch-ns9xxx/regs-bbu.h> 20#include <asm/arch-ns9xxx/regs-bbu.h>
20#include <asm/arch-ns9xxx/regs-board-a9m9750dev.h> 21#include <asm/arch-ns9xxx/regs-board-a9m9750dev.h>
@@ -103,9 +104,9 @@ void __init board_a9m9750dev_init_irq(void)
103 int i; 104 int i;
104 105
105 if (gpio_request(11, "board a9m9750dev extirq2") == 0) 106 if (gpio_request(11, "board a9m9750dev extirq2") == 0)
106 ns9xxx_gpio_configure(11, 0, 1); 107 ns9360_gpio_configure(11, 0, 1);
107 else 108 else
108 printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_EXT2\n", 109 printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_NS9XXX_EXT2\n",
109 __func__); 110 __func__);
110 111
111 for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { 112 for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
@@ -114,13 +115,13 @@ void __init board_a9m9750dev_init_irq(void)
114 set_irq_flags(i, IRQF_VALID); 115 set_irq_flags(i, IRQF_VALID);
115 } 116 }
116 117
117 /* IRQ_EXT2: level sensitive + active low */ 118 /* IRQ_NS9XXX_EXT2: level sensitive + active low */
118 eic = __raw_readl(SYS_EIC(2)); 119 eic = __raw_readl(SYS_EIC(2));
119 REGSET(eic, SYS_EIC, PLTY, AL); 120 REGSET(eic, SYS_EIC, PLTY, AL);
120 REGSET(eic, SYS_EIC, LVEDG, LEVEL); 121 REGSET(eic, SYS_EIC, LVEDG, LEVEL);
121 __raw_writel(eic, SYS_EIC(2)); 122 __raw_writel(eic, SYS_EIC(2));
122 123
123 set_irq_chained_handler(IRQ_EXT2, 124 set_irq_chained_handler(IRQ_NS9XXX_EXT2,
124 a9m9750dev_fpga_demux_handler); 125 a9m9750dev_fpga_demux_handler);
125} 126}
126 127
diff --git a/arch/arm/mach-ns9xxx/generic.c b/arch/arm/mach-ns9xxx/generic.c
index d742c921e34d..1e0f467879cc 100644
--- a/arch/arm/mach-ns9xxx/generic.c
+++ b/arch/arm/mach-ns9xxx/generic.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ns9xxx/generic.c 2 * arch/arm/mach-ns9xxx/generic.c
3 * 3 *
4 * Copyright (C) 2006 by Digi International Inc. 4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -11,34 +11,9 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/memory.h> 13#include <asm/memory.h>
14#include <asm/page.h>
15#include <asm/mach-types.h>
16#include <asm/mach/map.h>
17#include <asm/arch-ns9xxx/regs-sys.h>
18#include <asm/arch-ns9xxx/regs-mem.h>
19#include <asm/arch-ns9xxx/board.h>
20 14
21#include "generic.h" 15#include "generic.h"
22 16
23static struct map_desc standard_io_desc[] __initdata = {
24 { /* BBus */
25 .virtual = io_p2v(0x90000000),
26 .pfn = __phys_to_pfn(0x90000000),
27 .length = 0x00700000,
28 .type = MT_DEVICE,
29 }, { /* AHB */
30 .virtual = io_p2v(0xa0100000),
31 .pfn = __phys_to_pfn(0xa0100000),
32 .length = 0x00900000,
33 .type = MT_DEVICE,
34 },
35};
36
37void __init ns9xxx_map_io(void)
38{
39 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
40}
41
42void __init ns9xxx_init_machine(void) 17void __init ns9xxx_init_machine(void)
43{ 18{
44} 19}
diff --git a/arch/arm/mach-ns9xxx/generic.h b/arch/arm/mach-ns9xxx/generic.h
index 687e291773f4..82493191aad6 100644
--- a/arch/arm/mach-ns9xxx/generic.h
+++ b/arch/arm/mach-ns9xxx/generic.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ns9xxx/generic.h 2 * arch/arm/mach-ns9xxx/generic.h
3 * 3 *
4 * Copyright (C) 2006 by Digi International Inc. 4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -13,7 +13,4 @@
13#include <linux/init.h> 13#include <linux/init.h>
14 14
15void __init ns9xxx_init_irq(void); 15void __init ns9xxx_init_irq(void);
16void __init ns9xxx_map_io(void);
17void __init ns9xxx_init_machine(void); 16void __init ns9xxx_init_machine(void);
18
19extern struct sys_timer ns9xxx_timer;
diff --git a/arch/arm/mach-ns9xxx/gpio-ns9360.c b/arch/arm/mach-ns9xxx/gpio-ns9360.c
new file mode 100644
index 000000000000..cabfb879dda9
--- /dev/null
+++ b/arch/arm/mach-ns9xxx/gpio-ns9360.c
@@ -0,0 +1,118 @@
1/*
2 * arch/arm/mach-ns9xxx/gpio-ns9360.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/bug.h>
12#include <linux/errno.h>
13#include <linux/io.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16
17#include <asm/arch-ns9xxx/regs-bbu.h>
18#include <asm/arch-ns9xxx/processor-ns9360.h>
19
20#include "gpio-ns9360.h"
21
22static inline int ns9360_valid_gpio(unsigned gpio)
23{
24 return gpio <= 72;
25}
26
27static inline void __iomem *ns9360_gpio_get_gconfaddr(unsigned gpio)
28{
29 if (gpio < 56)
30 return BBU_GCONFb1(gpio / 8);
31 else
32 /*
33 * this could be optimised away on
34 * ns9750 only builds, but it isn't ...
35 */
36 return BBU_GCONFb2((gpio - 56) / 8);
37}
38
39static inline void __iomem *ns9360_gpio_get_gctrladdr(unsigned gpio)
40{
41 if (gpio < 32)
42 return BBU_GCTRL1;
43 else if (gpio < 64)
44 return BBU_GCTRL2;
45 else
46 /* this could be optimised away on ns9750 only builds */
47 return BBU_GCTRL3;
48}
49
50static inline void __iomem *ns9360_gpio_get_gstataddr(unsigned gpio)
51{
52 if (gpio < 32)
53 return BBU_GSTAT1;
54 else if (gpio < 64)
55 return BBU_GSTAT2;
56 else
57 /* this could be optimised away on ns9750 only builds */
58 return BBU_GSTAT3;
59}
60
61/*
62 * each gpio can serve for 4 different purposes [0..3]. These are called
63 * "functions" and passed in the parameter func. Functions 0-2 are always some
64 * special things, function 3 is GPIO. If func == 3 dir specifies input or
65 * output, and with inv you can enable an inverter (independent of func).
66 */
67int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func)
68{
69 void __iomem *conf = ns9360_gpio_get_gconfaddr(gpio);
70 u32 confval;
71
72 confval = __raw_readl(conf);
73 REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
74 REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
75 REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
76 __raw_writel(confval, conf);
77
78 return 0;
79}
80
81int ns9360_gpio_configure(unsigned gpio, int inv, int func)
82{
83 if (likely(ns9360_valid_gpio(gpio))) {
84 if (func == 3) {
85 printk(KERN_WARNING "use gpio_direction_input "
86 "or gpio_direction_output\n");
87 return -EINVAL;
88 } else
89 return __ns9360_gpio_configure(gpio, 0, inv, func);
90 } else
91 return -EINVAL;
92}
93EXPORT_SYMBOL(ns9360_gpio_configure);
94
95int ns9360_gpio_get_value(unsigned gpio)
96{
97 void __iomem *stat = ns9360_gpio_get_gstataddr(gpio);
98 int ret;
99
100 ret = 1 & (__raw_readl(stat) >> (gpio & 31));
101
102 return ret;
103}
104
105void ns9360_gpio_set_value(unsigned gpio, int value)
106{
107 void __iomem *ctrl = ns9360_gpio_get_gctrladdr(gpio);
108 u32 ctrlval;
109
110 ctrlval = __raw_readl(ctrl);
111
112 if (value)
113 ctrlval |= 1 << (gpio & 31);
114 else
115 ctrlval &= ~(1 << (gpio & 31));
116
117 __raw_writel(ctrlval, ctrl);
118}
diff --git a/arch/arm/mach-ns9xxx/gpio-ns9360.h b/arch/arm/mach-ns9xxx/gpio-ns9360.h
new file mode 100644
index 000000000000..131cd1715caa
--- /dev/null
+++ b/arch/arm/mach-ns9xxx/gpio-ns9360.h
@@ -0,0 +1,13 @@
1/*
2 * arch/arm/mach-ns9xxx/gpio-ns9360.h
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func);
12int ns9360_gpio_get_value(unsigned gpio);
13void ns9360_gpio_set_value(unsigned gpio, int value);
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c
index 5286e9fc1d30..b3c963b0c8f5 100644
--- a/arch/arm/mach-ns9xxx/gpio.c
+++ b/arch/arm/mach-ns9xxx/gpio.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ns9xxx/gpio.c 2 * arch/arm/mach-ns9xxx/gpio.c
3 * 3 *
4 * Copyright (C) 2006 by Digi International Inc. 4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -15,12 +15,13 @@
15 15
16#include <asm/arch-ns9xxx/gpio.h> 16#include <asm/arch-ns9xxx/gpio.h>
17#include <asm/arch-ns9xxx/processor.h> 17#include <asm/arch-ns9xxx/processor.h>
18#include <asm/arch-ns9xxx/regs-bbu.h> 18#include <asm/arch-ns9xxx/processor-ns9360.h>
19#include <asm/io.h>
20#include <asm/bug.h> 19#include <asm/bug.h>
21#include <asm/types.h> 20#include <asm/types.h>
22#include <asm/bitops.h> 21#include <asm/bitops.h>
23 22
23#include "gpio-ns9360.h"
24
24#if defined(CONFIG_PROCESSOR_NS9360) 25#if defined(CONFIG_PROCESSOR_NS9360)
25#define GPIO_MAX 72 26#define GPIO_MAX 72
26#elif defined(CONFIG_PROCESSOR_NS9750) 27#elif defined(CONFIG_PROCESSOR_NS9750)
@@ -45,41 +46,10 @@ static inline int ns9xxx_valid_gpio(unsigned gpio)
45 return gpio <= 49; 46 return gpio <= 49;
46 else 47 else
47#endif 48#endif
49 {
48 BUG(); 50 BUG();
49} 51 return 0;
50 52 }
51static inline void __iomem *ns9xxx_gpio_get_gconfaddr(unsigned gpio)
52{
53 if (gpio < 56)
54 return BBU_GCONFb1(gpio / 8);
55 else
56 /*
57 * this could be optimised away on
58 * ns9750 only builds, but it isn't ...
59 */
60 return BBU_GCONFb2((gpio - 56) / 8);
61}
62
63static inline void __iomem *ns9xxx_gpio_get_gctrladdr(unsigned gpio)
64{
65 if (gpio < 32)
66 return BBU_GCTRL1;
67 else if (gpio < 64)
68 return BBU_GCTRL2;
69 else
70 /* this could be optimised away on ns9750 only builds */
71 return BBU_GCTRL3;
72}
73
74static inline void __iomem *ns9xxx_gpio_get_gstataddr(unsigned gpio)
75{
76 if (gpio < 32)
77 return BBU_GSTAT1;
78 else if (gpio < 64)
79 return BBU_GSTAT2;
80 else
81 /* this could be optimised away on ns9750 only builds */
82 return BBU_GSTAT3;
83} 53}
84 54
85int gpio_request(unsigned gpio, const char *label) 55int gpio_request(unsigned gpio, const char *label)
@@ -98,49 +68,24 @@ void gpio_free(unsigned gpio)
98} 68}
99EXPORT_SYMBOL(gpio_free); 69EXPORT_SYMBOL(gpio_free);
100 70
101/* 71int gpio_direction_input(unsigned gpio)
102 * each gpio can serve for 4 different purposes [0..3]. These are called
103 * "functions" and passed in the parameter func. Functions 0-2 are always some
104 * special things, function 3 is GPIO. If func == 3 dir specifies input or
105 * output, and with inv you can enable an inverter (independent of func).
106 */
107static int __ns9xxx_gpio_configure(unsigned gpio, int dir, int inv, int func)
108{ 72{
109 void __iomem *conf = ns9xxx_gpio_get_gconfaddr(gpio); 73 if (likely(ns9xxx_valid_gpio(gpio))) {
110 u32 confval; 74 int ret = -EINVAL;
111 unsigned long flags; 75 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
115 confval = __raw_readl(conf);
116 REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
117 REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
118 REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
119 __raw_writel(confval, conf);
120 76
121 spin_unlock_irqrestore(&gpio_lock, flags); 77 spin_lock_irqsave(&gpio_lock, flags);
78#if defined(CONFIG_PROCESSOR_NS9360)
79 if (processor_is_ns9360())
80 ret = __ns9360_gpio_configure(gpio, 0, 0, 3);
81 else
82#endif
83 BUG();
122 84
123 return 0; 85 spin_unlock_irqrestore(&gpio_lock, flags);
124}
125 86
126int ns9xxx_gpio_configure(unsigned gpio, int inv, int func) 87 return ret;
127{
128 if (likely(ns9xxx_valid_gpio(gpio))) {
129 if (func == 3) {
130 printk(KERN_WARNING "use gpio_direction_input "
131 "or gpio_direction_output\n");
132 return -EINVAL;
133 } else
134 return __ns9xxx_gpio_configure(gpio, 0, inv, func);
135 } else
136 return -EINVAL;
137}
138EXPORT_SYMBOL(ns9xxx_gpio_configure);
139 88
140int gpio_direction_input(unsigned gpio)
141{
142 if (likely(ns9xxx_valid_gpio(gpio))) {
143 return __ns9xxx_gpio_configure(gpio, 0, 0, 3);
144 } else 89 } else
145 return -EINVAL; 90 return -EINVAL;
146} 91}
@@ -149,9 +94,22 @@ EXPORT_SYMBOL(gpio_direction_input);
149int gpio_direction_output(unsigned gpio, int value) 94int gpio_direction_output(unsigned gpio, int value)
150{ 95{
151 if (likely(ns9xxx_valid_gpio(gpio))) { 96 if (likely(ns9xxx_valid_gpio(gpio))) {
97 int ret = -EINVAL;
98 unsigned long flags;
99
152 gpio_set_value(gpio, value); 100 gpio_set_value(gpio, value);
153 101
154 return __ns9xxx_gpio_configure(gpio, 1, 0, 3); 102 spin_lock_irqsave(&gpio_lock, flags);
103#if defined(CONFIG_PROCESSOR_NS9360)
104 if (processor_is_ns9360())
105 ret = __ns9360_gpio_configure(gpio, 1, 0, 3);
106 else
107#endif
108 BUG();
109
110 spin_unlock_irqrestore(&gpio_lock, flags);
111
112 return ret;
155 } else 113 } else
156 return -EINVAL; 114 return -EINVAL;
157} 115}
@@ -159,31 +117,28 @@ EXPORT_SYMBOL(gpio_direction_output);
159 117
160int gpio_get_value(unsigned gpio) 118int gpio_get_value(unsigned gpio)
161{ 119{
162 void __iomem *stat = ns9xxx_gpio_get_gstataddr(gpio); 120#if defined(CONFIG_PROCESSOR_NS9360)
163 int ret; 121 if (processor_is_ns9360())
164 122 return ns9360_gpio_get_value(gpio);
165 ret = 1 & (__raw_readl(stat) >> (gpio & 31)); 123 else
166 124#endif
167 return ret; 125 {
126 BUG();
127 return -EINVAL;
128 }
168} 129}
169EXPORT_SYMBOL(gpio_get_value); 130EXPORT_SYMBOL(gpio_get_value);
170 131
171void gpio_set_value(unsigned gpio, int value) 132void gpio_set_value(unsigned gpio, int value)
172{ 133{
173 void __iomem *ctrl = ns9xxx_gpio_get_gctrladdr(gpio);
174 u32 ctrlval;
175 unsigned long flags; 134 unsigned long flags;
176
177 spin_lock_irqsave(&gpio_lock, flags); 135 spin_lock_irqsave(&gpio_lock, flags);
178 136#if defined(CONFIG_PROCESSOR_NS9360)
179 ctrlval = __raw_readl(ctrl); 137 if (processor_is_ns9360())
180 138 ns9360_gpio_set_value(gpio, value);
181 if (value)
182 ctrlval |= 1 << (gpio & 31);
183 else 139 else
184 ctrlval &= ~(1 << (gpio & 31)); 140#endif
185 141 BUG();
186 __raw_writel(ctrlval, ctrl);
187 142
188 spin_unlock_irqrestore(&gpio_lock, flags); 143 spin_unlock_irqrestore(&gpio_lock, flags);
189} 144}
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 00001b874e97..d4a583cc44c5 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -12,7 +12,7 @@
12#include <asm/io.h> 12#include <asm/io.h>
13#include <asm/mach/irq.h> 13#include <asm/mach/irq.h>
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15#include <asm/arch-ns9xxx/regs-sys.h> 15#include <asm/arch-ns9xxx/regs-sys-common.h>
16#include <asm/arch-ns9xxx/irqs.h> 16#include <asm/arch-ns9xxx/irqs.h>
17#include <asm/arch-ns9xxx/board.h> 17#include <asm/arch-ns9xxx/board.h>
18 18
@@ -67,7 +67,7 @@ void __init ns9xxx_init_irq(void)
67 for (i = 0; i < 32; ++i) 67 for (i = 0; i < 32; ++i)
68 __raw_writel(i, SYS_IVA(i)); 68 __raw_writel(i, SYS_IVA(i));
69 69
70 for (i = IRQ_WATCHDOG; i <= IRQ_EXT3; ++i) { 70 for (i = 0; i <= 31; ++i) {
71 set_irq_chip(i, &ns9xxx_chip); 71 set_irq_chip(i, &ns9xxx_chip);
72 set_irq_handler(i, handle_level_irq); 72 set_irq_handler(i, handle_level_irq);
73 set_irq_flags(i, IRQF_VALID); 73 set_irq_flags(i, IRQF_VALID);
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c b/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
index 760c9d0db7c3..9623fff6b3bc 100644
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
+++ b/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ns9xxx/mach-cc9p9360dev.c 2 * arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
3 * 3 *
4 * Copyright (C) 2006 by Digi International Inc. 4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -11,12 +11,14 @@
11#include <asm/mach/arch.h> 11#include <asm/mach/arch.h>
12#include <asm/mach-types.h> 12#include <asm/mach-types.h>
13 13
14#include <asm/arch-ns9xxx/processor-ns9360.h>
15
14#include "board-a9m9750dev.h" 16#include "board-a9m9750dev.h"
15#include "generic.h" 17#include "generic.h"
16 18
17static void __init mach_cc9p9360dev_map_io(void) 19static void __init mach_cc9p9360dev_map_io(void)
18{ 20{
19 ns9xxx_map_io(); 21 ns9360_map_io();
20 board_a9m9750dev_map_io(); 22 board_a9m9750dev_map_io();
21} 23}
22 24
@@ -36,6 +38,6 @@ MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an A9M9750 Devboard")
36 .map_io = mach_cc9p9360dev_map_io, 38 .map_io = mach_cc9p9360dev_map_io,
37 .init_irq = mach_cc9p9360dev_init_irq, 39 .init_irq = mach_cc9p9360dev_init_irq,
38 .init_machine = mach_cc9p9360dev_init_machine, 40 .init_machine = mach_cc9p9360dev_init_machine,
39 .timer = &ns9xxx_timer, 41 .timer = &ns9360_timer,
40 .boot_params = 0x100, 42 .boot_params = 0x100,
41MACHINE_END 43MACHINE_END
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
index 85c8b41105c9..fcc815bdd291 100644
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
+++ b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ns9xxx/mach-cc9p9360js.c 2 * arch/arm/mach-ns9xxx/mach-cc9p9360js.c
3 * 3 *
4 * Copyright (C) 2006 by Digi International Inc. 4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -11,6 +11,8 @@
11#include <asm/mach/arch.h> 11#include <asm/mach/arch.h>
12#include <asm/mach-types.h> 12#include <asm/mach-types.h>
13 13
14#include <asm/arch-ns9xxx/processor-ns9360.h>
15
14#include "board-jscc9p9360.h" 16#include "board-jscc9p9360.h"
15#include "generic.h" 17#include "generic.h"
16 18
@@ -21,9 +23,9 @@ static void __init mach_cc9p9360js_init_machine(void)
21} 23}
22 24
23MACHINE_START(CC9P9360JS, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard") 25MACHINE_START(CC9P9360JS, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard")
24 .map_io = ns9xxx_map_io, 26 .map_io = ns9360_map_io,
25 .init_irq = ns9xxx_init_irq, 27 .init_irq = ns9xxx_init_irq,
26 .init_machine = mach_cc9p9360js_init_machine, 28 .init_machine = mach_cc9p9360js_init_machine,
27 .timer = &ns9xxx_timer, 29 .timer = &ns9360_timer,
28 .boot_params = 0x100, 30 .boot_params = 0x100,
29MACHINE_END 31MACHINE_END
diff --git a/arch/arm/mach-ns9xxx/processor-ns9360.c b/arch/arm/mach-ns9xxx/processor-ns9360.c
new file mode 100644
index 000000000000..2bee0b7fccbb
--- /dev/null
+++ b/arch/arm/mach-ns9xxx/processor-ns9360.c
@@ -0,0 +1,54 @@
1/*
2 * arch/arm/mach-ns9xxx/processor-ns9360.c
3 *
4 * Copyright (C) 2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/io.h>
12#include <linux/kernel.h>
13#include <linux/slab.h>
14
15#include <asm/page.h>
16#include <asm/mach/map.h>
17#include <asm/arch-ns9xxx/processor-ns9360.h>
18#include <asm/arch-ns9xxx/regs-sys-ns9360.h>
19
20void ns9360_reset(char mode)
21{
22 u32 reg;
23
24 reg = __raw_readl(SYS_PLL) >> 16;
25 REGSET(reg, SYS_PLL, SWC, YES);
26 __raw_writel(reg, SYS_PLL);
27}
28
29#define CRYSTAL 29491200 /* Hz */
30unsigned long ns9360_systemclock(void)
31{
32 u32 pll = __raw_readl(SYS_PLL);
33 return CRYSTAL * (REGGETIM(pll, SYS_PLL, ND) + 1)
34 >> REGGETIM(pll, SYS_PLL, FS);
35}
36
37static struct map_desc ns9360_io_desc[] __initdata = {
38 { /* BBus */
39 .virtual = io_p2v(0x90000000),
40 .pfn = __phys_to_pfn(0x90000000),
41 .length = 0x00700000,
42 .type = MT_DEVICE,
43 }, { /* AHB */
44 .virtual = io_p2v(0xa0100000),
45 .pfn = __phys_to_pfn(0xa0100000),
46 .length = 0x00900000,
47 .type = MT_DEVICE,
48 },
49};
50
51void __init ns9360_map_io(void)
52{
53 iotable_init(ns9360_io_desc, ARRAY_SIZE(ns9360_io_desc));
54}
diff --git a/arch/arm/mach-ns9xxx/time.c b/arch/arm/mach-ns9xxx/time-ns9360.c
index c3dd1f4acb99..4d573c9793ed 100644
--- a/arch/arm/mach-ns9xxx/time.c
+++ b/arch/arm/mach-ns9xxx/time-ns9360.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ns9xxx/time.c 2 * arch/arm/mach-ns9xxx/time-ns9360.c
3 * 3 *
4 * Copyright (C) 2006 by Digi International Inc. 4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -15,8 +15,8 @@
15#include <linux/clocksource.h> 15#include <linux/clocksource.h>
16#include <linux/clockchips.h> 16#include <linux/clockchips.h>
17 17
18#include <asm/arch-ns9xxx/regs-sys.h> 18#include <asm/arch-ns9xxx/processor-ns9360.h>
19#include <asm/arch-ns9xxx/clock.h> 19#include <asm/arch-ns9xxx/regs-sys-ns9360.h>
20#include <asm/arch-ns9xxx/irqs.h> 20#include <asm/arch-ns9xxx/irqs.h>
21#include <asm/arch/system.h> 21#include <asm/arch/system.h>
22#include "generic.h" 22#include "generic.h"
@@ -25,26 +25,26 @@
25#define TIMER_CLOCKEVENT 1 25#define TIMER_CLOCKEVENT 1
26static u32 latch; 26static u32 latch;
27 27
28static cycle_t ns9xxx_clocksource_read(void) 28static cycle_t ns9360_clocksource_read(void)
29{ 29{
30 return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE)); 30 return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE));
31} 31}
32 32
33static struct clocksource ns9xxx_clocksource = { 33static struct clocksource ns9360_clocksource = {
34 .name = "ns9xxx-timer" __stringify(TIMER_CLOCKSOURCE), 34 .name = "ns9360-timer" __stringify(TIMER_CLOCKSOURCE),
35 .rating = 300, 35 .rating = 300,
36 .read = ns9xxx_clocksource_read, 36 .read = ns9360_clocksource_read,
37 .mask = CLOCKSOURCE_MASK(32), 37 .mask = CLOCKSOURCE_MASK(32),
38 .shift = 20, 38 .shift = 20,
39 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 39 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
40}; 40};
41 41
42static void ns9xxx_clockevent_setmode(enum clock_event_mode mode, 42static void ns9360_clockevent_setmode(enum clock_event_mode mode,
43 struct clock_event_device *clk) 43 struct clock_event_device *clk)
44{ 44{
45 u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT)); 45 u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
46 46
47 switch(mode) { 47 switch (mode) {
48 case CLOCK_EVT_MODE_PERIODIC: 48 case CLOCK_EVT_MODE_PERIODIC:
49 __raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT)); 49 __raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT));
50 REGSET(tc, SYS_TCx, REN, EN); 50 REGSET(tc, SYS_TCx, REN, EN);
@@ -69,7 +69,7 @@ static void ns9xxx_clockevent_setmode(enum clock_event_mode mode,
69 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT)); 69 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
70} 70}
71 71
72static int ns9xxx_clockevent_setnextevent(unsigned long evt, 72static int ns9360_clockevent_setnextevent(unsigned long evt,
73 struct clock_event_device *clk) 73 struct clock_event_device *clk)
74{ 74{
75 u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT)); 75 u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
@@ -88,20 +88,20 @@ static int ns9xxx_clockevent_setnextevent(unsigned long evt,
88 return 0; 88 return 0;
89} 89}
90 90
91static struct clock_event_device ns9xxx_clockevent_device = { 91static struct clock_event_device ns9360_clockevent_device = {
92 .name = "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT), 92 .name = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
93 .shift = 20, 93 .shift = 20,
94 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 94 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
95 .set_mode = ns9xxx_clockevent_setmode, 95 .set_mode = ns9360_clockevent_setmode,
96 .set_next_event = ns9xxx_clockevent_setnextevent, 96 .set_next_event = ns9360_clockevent_setnextevent,
97}; 97};
98 98
99static irqreturn_t ns9xxx_clockevent_handler(int irq, void *dev_id) 99static irqreturn_t ns9360_clockevent_handler(int irq, void *dev_id)
100{ 100{
101 int timerno = irq - IRQ_TIMER0; 101 int timerno = irq - IRQ_NS9360_TIMER0;
102 u32 tc; 102 u32 tc;
103 103
104 struct clock_event_device *evt = &ns9xxx_clockevent_device; 104 struct clock_event_device *evt = &ns9360_clockevent_device;
105 105
106 /* clear irq */ 106 /* clear irq */
107 tc = __raw_readl(SYS_TC(timerno)); 107 tc = __raw_readl(SYS_TC(timerno));
@@ -119,13 +119,13 @@ static irqreturn_t ns9xxx_clockevent_handler(int irq, void *dev_id)
119 return IRQ_HANDLED; 119 return IRQ_HANDLED;
120} 120}
121 121
122static struct irqaction ns9xxx_clockevent_action = { 122static struct irqaction ns9360_clockevent_action = {
123 .name = "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT), 123 .name = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
124 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 124 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
125 .handler = ns9xxx_clockevent_handler, 125 .handler = ns9360_clockevent_handler,
126}; 126};
127 127
128static void __init ns9xxx_timer_init(void) 128static void __init ns9360_timer_init(void)
129{ 129{
130 int tc; 130 int tc;
131 131
@@ -148,12 +148,12 @@ static void __init ns9xxx_timer_init(void)
148 148
149 __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE)); 149 __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
150 150
151 ns9xxx_clocksource.mult = clocksource_hz2mult(ns9xxx_cpuclock(), 151 ns9360_clocksource.mult = clocksource_hz2mult(ns9360_cpuclock(),
152 ns9xxx_clocksource.shift); 152 ns9360_clocksource.shift);
153 153
154 clocksource_register(&ns9xxx_clocksource); 154 clocksource_register(&ns9360_clocksource);
155 155
156 latch = SH_DIV(ns9xxx_cpuclock(), HZ, 0); 156 latch = SH_DIV(ns9360_cpuclock(), HZ, 0);
157 157
158 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT)); 158 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
159 REGSET(tc, SYS_TCx, TEN, DIS); 159 REGSET(tc, SYS_TCx, TEN, DIS);
@@ -166,19 +166,20 @@ static void __init ns9xxx_timer_init(void)
166 REGSET(tc, SYS_TCx, REN, EN); 166 REGSET(tc, SYS_TCx, REN, EN);
167 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT)); 167 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
168 168
169 ns9xxx_clockevent_device.mult = div_sc(ns9xxx_cpuclock(), 169 ns9360_clockevent_device.mult = div_sc(ns9360_cpuclock(),
170 NSEC_PER_SEC, ns9xxx_clockevent_device.shift); 170 NSEC_PER_SEC, ns9360_clockevent_device.shift);
171 ns9xxx_clockevent_device.max_delta_ns = 171 ns9360_clockevent_device.max_delta_ns =
172 clockevent_delta2ns(-1, &ns9xxx_clockevent_device); 172 clockevent_delta2ns(-1, &ns9360_clockevent_device);
173 ns9xxx_clockevent_device.min_delta_ns = 173 ns9360_clockevent_device.min_delta_ns =
174 clockevent_delta2ns(1, &ns9xxx_clockevent_device); 174 clockevent_delta2ns(1, &ns9360_clockevent_device);
175 175
176 ns9xxx_clockevent_device.cpumask = cpumask_of_cpu(0); 176 ns9360_clockevent_device.cpumask = cpumask_of_cpu(0);
177 clockevents_register_device(&ns9xxx_clockevent_device); 177 clockevents_register_device(&ns9360_clockevent_device);
178 178
179 setup_irq(IRQ_TIMER0 + TIMER_CLOCKEVENT, &ns9xxx_clockevent_action); 179 setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
180 &ns9360_clockevent_action);
180} 181}
181 182
182struct sys_timer ns9xxx_timer = { 183struct sys_timer ns9360_timer = {
183 .init = ns9xxx_timer_init, 184 .init = ns9360_timer_init,
184}; 185};