diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2013-01-05 20:58:43 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-01-28 17:25:40 -0500 |
commit | dea3eacd087cfa692ea20aafbfaf4827607afe45 (patch) | |
tree | 0d73edfbd8b083d49e3e1e4e65e4f385f6e1d340 /arch/arm/mach-nomadik/cpu-8815.c | |
parent | 5f66d482af4e12e2a2d4cda0686820550b80ac8e (diff) |
ARM: nomadik: get rid of <mach/hardware.h>
This was only used from the core machine, source it into the machine
file and delete, also convert all direct references using the
physical-to-virtual macros in this file to ioremap() and only
default-remap the 4K used by the debug UART.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-nomadik/cpu-8815.c')
-rw-r--r-- | arch/arm/mach-nomadik/cpu-8815.c | 67 |
1 files changed, 55 insertions, 12 deletions
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 60a18e12e6ce..21c1aa512640 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c | |||
@@ -38,7 +38,6 @@ | |||
38 | #include <linux/gpio.h> | 38 | #include <linux/gpio.h> |
39 | #include <linux/amba/mmci.h> | 39 | #include <linux/amba/mmci.h> |
40 | 40 | ||
41 | #include <mach/hardware.h> | ||
42 | #include <mach/irqs.h> | 41 | #include <mach/irqs.h> |
43 | #include <asm/mach/arch.h> | 42 | #include <asm/mach/arch.h> |
44 | #include <asm/mach/map.h> | 43 | #include <asm/mach/map.h> |
@@ -48,6 +47,51 @@ | |||
48 | #include <asm/cacheflush.h> | 47 | #include <asm/cacheflush.h> |
49 | #include <asm/hardware/cache-l2x0.h> | 48 | #include <asm/hardware/cache-l2x0.h> |
50 | 49 | ||
50 | /* | ||
51 | * These are the only hard-coded address offsets we still have to use. | ||
52 | */ | ||
53 | #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */ | ||
54 | #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */ | ||
55 | #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */ | ||
56 | #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */ | ||
57 | #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */ | ||
58 | #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */ | ||
59 | #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */ | ||
60 | #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */ | ||
61 | #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */ | ||
62 | #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */ | ||
63 | #define NOMADIK_XTI_BASE 0x101A0000 /* XTI */ | ||
64 | #define NOMADIK_RNG_BASE 0x101B0000 /* Random number generator */ | ||
65 | #define NOMADIK_SRC_BASE 0x101E0000 /* SRC base */ | ||
66 | #define NOMADIK_WDOG_BASE 0x101E1000 /* Watchdog */ | ||
67 | #define NOMADIK_MTU0_BASE 0x101E2000 /* Multiple Timer 0 */ | ||
68 | #define NOMADIK_MTU1_BASE 0x101E3000 /* Multiple Timer 1 */ | ||
69 | #define NOMADIK_GPIO0_BASE 0x101E4000 /* GPIO0 */ | ||
70 | #define NOMADIK_GPIO1_BASE 0x101E5000 /* GPIO1 */ | ||
71 | #define NOMADIK_GPIO2_BASE 0x101E6000 /* GPIO2 */ | ||
72 | #define NOMADIK_GPIO3_BASE 0x101E7000 /* GPIO3 */ | ||
73 | #define NOMADIK_RTC_BASE 0x101E8000 /* Real Time Clock base */ | ||
74 | #define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */ | ||
75 | #define NOMADIK_OWM_BASE 0x101EA000 /* One wire master */ | ||
76 | #define NOMADIK_SCR_BASE 0x101EF000 /* Secure Control registers */ | ||
77 | #define NOMADIK_MSP2_BASE 0x101F0000 /* MSP 2 interface */ | ||
78 | #define NOMADIK_MSP1_BASE 0x101F1000 /* MSP 1 interface */ | ||
79 | #define NOMADIK_UART2_BASE 0x101F2000 /* UART 2 interface */ | ||
80 | #define NOMADIK_SSIRx_BASE 0x101F3000 /* SSI 8-ch rx interface */ | ||
81 | #define NOMADIK_SSITx_BASE 0x101F4000 /* SSI 8-ch tx interface */ | ||
82 | #define NOMADIK_MSHC_BASE 0x101F5000 /* Memory Stick(Pro) Host */ | ||
83 | #define NOMADIK_SDI_BASE 0x101F6000 /* SD-card/MM-Card */ | ||
84 | #define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */ | ||
85 | #define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */ | ||
86 | #define NOMADIK_MSP0_BASE 0x101F9000 /* MSP 0 interface */ | ||
87 | #define NOMADIK_FIRDA_BASE 0x101FA000 /* FIrDA interface */ | ||
88 | #define NOMADIK_UART1_BASE 0x101FB000 /* UART 1 interface */ | ||
89 | #define NOMADIK_SSP_BASE 0x101FC000 /* SSP interface */ | ||
90 | #define NOMADIK_UART0_BASE 0x101FD000 /* UART 0 interface */ | ||
91 | #define NOMADIK_SGA_BASE 0x101FE000 /* SGA interface */ | ||
92 | #define NOMADIK_L2CC_BASE 0x10210000 /* L2 Cache controller */ | ||
93 | #define NOMADIK_UART1_VBASE 0xF01FB000 | ||
94 | |||
51 | static unsigned long out_low[] = { PIN_OUTPUT_LOW }; | 95 | static unsigned long out_low[] = { PIN_OUTPUT_LOW }; |
52 | static unsigned long out_high[] = { PIN_OUTPUT_HIGH }; | 96 | static unsigned long out_high[] = { PIN_OUTPUT_HIGH }; |
53 | static unsigned long in_nopull[] = { PIN_INPUT_NOPULL }; | 97 | static unsigned long in_nopull[] = { PIN_INPUT_NOPULL }; |
@@ -90,30 +134,29 @@ static struct pinctrl_map __initdata nhk8815_pinmap[] = { | |||
90 | PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO74_C20", in_pullup), | 134 | PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO74_C20", in_pullup), |
91 | }; | 135 | }; |
92 | 136 | ||
93 | /* All SoC devices live in the same area (see hardware.h) */ | 137 | /* This is needed for LL-debug/earlyprintk/debug-macro.S */ |
94 | static struct map_desc nomadik_io_desc[] __initdata = { | 138 | static struct map_desc cpu8815_io_desc[] __initdata = { |
95 | { | 139 | { |
96 | .virtual = NOMADIK_IO_VIRTUAL, | 140 | .virtual = NOMADIK_UART1_VBASE, |
97 | .pfn = __phys_to_pfn(NOMADIK_IO_PHYSICAL), | 141 | .pfn = __phys_to_pfn(NOMADIK_UART1_BASE), |
98 | .length = NOMADIK_IO_SIZE, | 142 | .length = SZ_4K, |
99 | .type = MT_DEVICE, | 143 | .type = MT_DEVICE, |
100 | } | 144 | }, |
101 | /* static ram and secured ram may be added later */ | ||
102 | }; | 145 | }; |
103 | 146 | ||
104 | static void __init cpu8815_map_io(void) | 147 | static void __init cpu8815_map_io(void) |
105 | { | 148 | { |
106 | iotable_init(nomadik_io_desc, ARRAY_SIZE(nomadik_io_desc)); | 149 | iotable_init(cpu8815_io_desc, ARRAY_SIZE(cpu8815_io_desc)); |
107 | } | 150 | } |
108 | 151 | ||
109 | static void cpu8815_restart(char mode, const char *cmd) | 152 | static void cpu8815_restart(char mode, const char *cmd) |
110 | { | 153 | { |
111 | void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18); | 154 | void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K); |
112 | 155 | ||
113 | /* FIXME: use egpio when implemented */ | 156 | /* FIXME: use egpio when implemented */ |
114 | 157 | ||
115 | /* Write anything to Reset status register */ | 158 | /* Write anything to Reset status register */ |
116 | writel(1, src_rstsr); | 159 | writel(1, srcbase + 0x18); |
117 | } | 160 | } |
118 | 161 | ||
119 | /* Initial value for SRC control register: all timers use MXTAL/8 source */ | 162 | /* Initial value for SRC control register: all timers use MXTAL/8 source */ |