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authorShawn Guo <shawn.guo@linaro.org>2013-03-13 23:37:15 -0400
committerShawn Guo <shawn.guo@linaro.org>2013-04-04 09:22:42 -0400
commit0d9f8217db159cdef7d90f89c9b101550d0fe3aa (patch)
treea93b3030c999a8ff70e636aff463d0ecdca833ea /arch/arm/mach-mxs
parent669406534b4abb827d1bdc39bb5e2d5255818ae2 (diff)
ARM: mxs: move display timing configurations into device tree
Move display timing configurations into device tree, so that the auxdata for mxsfb driver can be killed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-mxs')
-rw-r--r--arch/arm/mach-mxs/mach-mxs.c158
1 files changed, 0 insertions, 158 deletions
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 6a4e11824ec9..f39ab808694d 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -22,7 +22,6 @@
22#include <linux/irqchip.h> 22#include <linux/irqchip.h>
23#include <linux/irqchip/mxs.h> 23#include <linux/irqchip/mxs.h>
24#include <linux/micrel_phy.h> 24#include <linux/micrel_phy.h>
25#include <linux/mxsfb.h>
26#include <linux/of_address.h> 25#include <linux/of_address.h>
27#include <linux/of_platform.h> 26#include <linux/of_platform.h>
28#include <linux/phy.h> 27#include <linux/phy.h>
@@ -59,106 +58,6 @@ static inline void __mxs_togl(u32 mask, void __iomem *reg)
59 __raw_writel(mask, reg + MXS_TOG_ADDR); 58 __raw_writel(mask, reg + MXS_TOG_ADDR);
60} 59}
61 60
62static struct fb_videomode mx23evk_video_modes[] = {
63 {
64 .name = "Samsung-LMS430HF02",
65 .refresh = 60,
66 .xres = 480,
67 .yres = 272,
68 .pixclock = 108096, /* picosecond (9.2 MHz) */
69 .left_margin = 15,
70 .right_margin = 8,
71 .upper_margin = 12,
72 .lower_margin = 4,
73 .hsync_len = 1,
74 .vsync_len = 1,
75 },
76};
77
78static struct fb_videomode mx28evk_video_modes[] = {
79 {
80 .name = "Seiko-43WVF1G",
81 .refresh = 60,
82 .xres = 800,
83 .yres = 480,
84 .pixclock = 29851, /* picosecond (33.5 MHz) */
85 .left_margin = 89,
86 .right_margin = 164,
87 .upper_margin = 23,
88 .lower_margin = 10,
89 .hsync_len = 10,
90 .vsync_len = 10,
91 },
92};
93
94static struct fb_videomode m28evk_video_modes[] = {
95 {
96 .name = "Ampire AM-800480R2TMQW-T01H",
97 .refresh = 60,
98 .xres = 800,
99 .yres = 480,
100 .pixclock = 30066, /* picosecond (33.26 MHz) */
101 .left_margin = 0,
102 .right_margin = 256,
103 .upper_margin = 0,
104 .lower_margin = 45,
105 .hsync_len = 1,
106 .vsync_len = 1,
107 },
108};
109
110static struct fb_videomode apx4devkit_video_modes[] = {
111 {
112 .name = "HannStar PJ70112A",
113 .refresh = 60,
114 .xres = 800,
115 .yres = 480,
116 .pixclock = 33333, /* picosecond (30.00 MHz) */
117 .left_margin = 88,
118 .right_margin = 40,
119 .upper_margin = 32,
120 .lower_margin = 13,
121 .hsync_len = 48,
122 .vsync_len = 3,
123 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
124 },
125};
126
127static struct fb_videomode apf28dev_video_modes[] = {
128 {
129 .name = "LW700",
130 .refresh = 60,
131 .xres = 800,
132 .yres = 480,
133 .pixclock = 30303, /* picosecond */
134 .left_margin = 96,
135 .right_margin = 96, /* at least 3 & 1 */
136 .upper_margin = 0x14,
137 .lower_margin = 0x15,
138 .hsync_len = 64,
139 .vsync_len = 4,
140 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
141 },
142};
143
144static struct fb_videomode cfa10049_video_modes[] = {
145 {
146 .name = "Himax HX8357-B",
147 .refresh = 60,
148 .xres = 320,
149 .yres = 480,
150 .pixclock = 108506, /* picosecond (9.216 MHz) */
151 .left_margin = 2,
152 .right_margin = 2,
153 .upper_margin = 2,
154 .lower_margin = 2,
155 .hsync_len = 15,
156 .vsync_len = 15,
157 },
158};
159
160static struct mxsfb_platform_data mxsfb_pdata __initdata;
161
162/* 61/*
163 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers 62 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
164 */ 63 */
@@ -189,8 +88,6 @@ static void mx28evk_flexcan1_switch(int enable)
189static struct flexcan_platform_data flexcan_pdata[2]; 88static struct flexcan_platform_data flexcan_pdata[2];
190 89
191static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { 90static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
192 OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
193 OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
194 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]), 91 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
195 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]), 92 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
196 { /* sentinel */ } 93 { /* sentinel */ }
@@ -340,16 +237,6 @@ static void __init update_fec_mac_prop(enum mac_oui oui)
340 } 237 }
341} 238}
342 239
343static void __init imx23_evk_init(void)
344{
345 mxsfb_pdata.mode_list = mx23evk_video_modes;
346 mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
347 mxsfb_pdata.default_bpp = 32;
348 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
349 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
350 MXSFB_SYNC_DOTCLK_FAILING_ACT;
351}
352
353static inline void enable_clk_enet_out(void) 240static inline void enable_clk_enet_out(void)
354{ 241{
355 struct clk *clk = clk_get_sys("enet_out", NULL); 242 struct clk *clk = clk_get_sys("enet_out", NULL);
@@ -362,13 +249,6 @@ static void __init imx28_evk_init(void)
362{ 249{
363 update_fec_mac_prop(OUI_FSL); 250 update_fec_mac_prop(OUI_FSL);
364 251
365 mxsfb_pdata.mode_list = mx28evk_video_modes;
366 mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
367 mxsfb_pdata.default_bpp = 32;
368 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
369 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
370 MXSFB_SYNC_DOTCLK_FAILING_ACT;
371
372 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); 252 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
373} 253}
374 254
@@ -381,15 +261,6 @@ static void __init imx28_evk_post_init(void)
381 } 261 }
382} 262}
383 263
384static void __init m28evk_init(void)
385{
386 mxsfb_pdata.mode_list = m28evk_video_modes;
387 mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
388 mxsfb_pdata.default_bpp = 16;
389 mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
390 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
391}
392
393static int apx4devkit_phy_fixup(struct phy_device *phy) 264static int apx4devkit_phy_fixup(struct phy_device *phy)
394{ 265{
395 phy->dev_flags |= MICREL_PHY_50MHZ_CLK; 266 phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
@@ -403,13 +274,6 @@ static void __init apx4devkit_init(void)
403 if (IS_BUILTIN(CONFIG_PHYLIB)) 274 if (IS_BUILTIN(CONFIG_PHYLIB))
404 phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK, 275 phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
405 apx4devkit_phy_fixup); 276 apx4devkit_phy_fixup);
406
407 mxsfb_pdata.mode_list = apx4devkit_video_modes;
408 mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
409 mxsfb_pdata.default_bpp = 32;
410 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
411 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
412 MXSFB_SYNC_DOTCLK_FAILING_ACT;
413} 277}
414 278
415#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0) 279#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
@@ -489,12 +353,6 @@ static void __init tx28_post_init(void)
489static void __init cfa10049_init(void) 353static void __init cfa10049_init(void)
490{ 354{
491 update_fec_mac_prop(OUI_CRYSTALFONTZ); 355 update_fec_mac_prop(OUI_CRYSTALFONTZ);
492
493 mxsfb_pdata.mode_list = cfa10049_video_modes;
494 mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
495 mxsfb_pdata.default_bpp = 32;
496 mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
497 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
498} 356}
499 357
500static void __init cfa10037_init(void) 358static void __init cfa10037_init(void)
@@ -502,32 +360,16 @@ static void __init cfa10037_init(void)
502 update_fec_mac_prop(OUI_CRYSTALFONTZ); 360 update_fec_mac_prop(OUI_CRYSTALFONTZ);
503} 361}
504 362
505static void __init apf28_init(void)
506{
507 mxsfb_pdata.mode_list = apf28dev_video_modes;
508 mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
509 mxsfb_pdata.default_bpp = 16;
510 mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
511 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
512 MXSFB_SYNC_DOTCLK_FAILING_ACT;
513}
514
515static void __init mxs_machine_init(void) 363static void __init mxs_machine_init(void)
516{ 364{
517 if (of_machine_is_compatible("fsl,imx28-evk")) 365 if (of_machine_is_compatible("fsl,imx28-evk"))
518 imx28_evk_init(); 366 imx28_evk_init();
519 else if (of_machine_is_compatible("fsl,imx23-evk"))
520 imx23_evk_init();
521 else if (of_machine_is_compatible("denx,m28evk"))
522 m28evk_init();
523 else if (of_machine_is_compatible("bluegiga,apx4devkit")) 367 else if (of_machine_is_compatible("bluegiga,apx4devkit"))
524 apx4devkit_init(); 368 apx4devkit_init();
525 else if (of_machine_is_compatible("crystalfontz,cfa10037")) 369 else if (of_machine_is_compatible("crystalfontz,cfa10037"))
526 cfa10037_init(); 370 cfa10037_init();
527 else if (of_machine_is_compatible("crystalfontz,cfa10049")) 371 else if (of_machine_is_compatible("crystalfontz,cfa10049"))
528 cfa10049_init(); 372 cfa10049_init();
529 else if (of_machine_is_compatible("armadeus,imx28-apf28"))
530 apf28_init();
531 373
532 of_platform_populate(NULL, of_default_bus_match_table, 374 of_platform_populate(NULL, of_default_bus_match_table,
533 mxs_auxdata_lookup, NULL); 375 mxs_auxdata_lookup, NULL);