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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 23:25:36 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 23:25:36 -0400
commitf906fb1d70e016726fccfb0d978c5d425503db9d (patch)
treeb2bac5fbe7d2eb81dd7fe6cc88e27dddd0189c84 /arch/arm/mach-mxs
parent510597e26e2a072e2d46ea5bc57feaf385e37f70 (diff)
parenta7fadac10ffbfd16cc7ccf951eab1ecf85e1abdf (diff)
Merge branch 'next/board' of git://git.linaro.org/people/arnd/arm-soc
* 'next/board' of git://git.linaro.org/people/arnd/arm-soc: (34 commits) ep93xx: add support Vision EP9307 SoM ARM: mxs: Add initial support for DENX MX28 ARM: EXYNOS4: Add support SMDK4412 Board ARM: EXYNOS4: Add MCT support for EXYNOS4412 ARM: EXYNOS4: Add functions for gic interrupt handling ARM: EXYNOS4: Add support clock for EXYNOS4412 ARM: EXYNOS4: Add support new EXYNOS4412 SoC ARM: EXYNOS4: Add support MCT PPI for EXYNOS4212 ARM: EXYNOS4: Add support PPI in external GIC ARM: EXYNOS4: convert boot_params to atag_offset ixp4xx: support omicron ixp425 based boards ARM: EXYNOS4: Add support SMDK4212 Board ARM: EXYNOS4: Add support PM for EXYNOS4212 ARM: EXYNOS4: Add support clock for EXYNOS4212 ARM: EXYNOS4: Add support new EXYNOS4212 SoC at91: USB-A9G20 C01 & C11 board support at91: merge board USB-A9260 and USB-A9263 together at91: add support for RSIs EWS board ARM: SAMSUNG: Fix mask value for S5P64X0 CPU IDs ARM: SAMSUNG: Fix mask for S3C64xx CPU IDs ...
Diffstat (limited to 'arch/arm/mach-mxs')
-rw-r--r--arch/arm/mach-mxs/Kconfig17
-rw-r--r--arch/arm/mach-mxs/Makefile1
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c16
-rw-r--r--arch/arm/mach-mxs/include/mach/mxs.h1
-rw-r--r--arch/arm/mach-mxs/include/mach/uncompress.h1
-rw-r--r--arch/arm/mach-mxs/mach-m28evk.c366
6 files changed, 397 insertions, 5 deletions
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index 4cd0231ee539..ea5ec0f3b5b1 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -64,8 +64,25 @@ config MODULE_TX28
64 select MXS_HAVE_PLATFORM_MXS_MMC 64 select MXS_HAVE_PLATFORM_MXS_MMC
65 select MXS_HAVE_PLATFORM_MXS_PWM 65 select MXS_HAVE_PLATFORM_MXS_PWM
66 66
67config MODULE_M28
68 bool
69 select SOC_IMX28
70 select LEDS_GPIO_REGISTER
71 select MXS_HAVE_AMBA_DUART
72 select MXS_HAVE_PLATFORM_AUART
73 select MXS_HAVE_PLATFORM_FEC
74 select MXS_HAVE_PLATFORM_FLEXCAN
75 select MXS_HAVE_PLATFORM_MXS_I2C
76 select MXS_HAVE_PLATFORM_MXS_MMC
77 select MXS_HAVE_PLATFORM_MXSFB
78 select MXS_OCOTP
79
67config MACH_TX28 80config MACH_TX28
68 bool "Ka-Ro TX28 module" 81 bool "Ka-Ro TX28 module"
69 select MODULE_TX28 82 select MODULE_TX28
70 83
84config MACH_M28EVK
85 bool "Support DENX M28EVK Platform"
86 select MODULE_M28
87
71endif 88endif
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index ea8dcb7742bc..8c93b24896bf 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SOC_IMX28) += clock-mx28.o
10obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o 10obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o
11obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o 11obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o
12obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o 12obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o
13obj-$(CONFIG_MACH_M28EVK) += mach-m28evk.o
13obj-$(CONFIG_MODULE_TX28) += module-tx28.o 14obj-$(CONFIG_MODULE_TX28) += module-tx28.o
14obj-$(CONFIG_MACH_TX28) += mach-tx28.o 15obj-$(CONFIG_MACH_TX28) += mach-tx28.o
15 16
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index ba532279d1a1..7fa1ac4de7d8 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -738,11 +738,17 @@ static int clk_misc_init(void)
738 __raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT, 738 __raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT,
739 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET); 739 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET);
740 740
741 /* Extra fec clock setting */ 741 /*
742 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET); 742 * Extra fec clock setting
743 reg &= ~BM_CLKCTRL_ENET_SLEEP; 743 * The DENX M28 uses an external clock source
744 reg |= BM_CLKCTRL_ENET_CLK_OUT_EN; 744 * and the clock output must not be enabled
745 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET); 745 */
746 if (!machine_is_m28evk()) {
747 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
748 reg &= ~BM_CLKCTRL_ENET_SLEEP;
749 reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;
750 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
751 }
746 752
747 /* 753 /*
748 * 480 MHz seems too high to be ssp clock source directly, 754 * 480 MHz seems too high to be ssp clock source directly,
diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h
index 5aa5f754c846..0d2d2b470998 100644
--- a/arch/arm/mach-mxs/include/mach/mxs.h
+++ b/arch/arm/mach-mxs/include/mach/mxs.h
@@ -33,6 +33,7 @@
33 0) 33 0)
34#define cpu_is_mx28() ( \ 34#define cpu_is_mx28() ( \
35 machine_is_mx28evk() || \ 35 machine_is_mx28evk() || \
36 machine_is_m28evk() || \
36 machine_is_tx28() || \ 37 machine_is_tx28() || \
37 0) 38 0)
38 39
diff --git a/arch/arm/mach-mxs/include/mach/uncompress.h b/arch/arm/mach-mxs/include/mach/uncompress.h
index 7f8bf6539646..67776746f143 100644
--- a/arch/arm/mach-mxs/include/mach/uncompress.h
+++ b/arch/arm/mach-mxs/include/mach/uncompress.h
@@ -63,6 +63,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
63 mxs_duart_base = MX23_DUART_BASE_ADDR; 63 mxs_duart_base = MX23_DUART_BASE_ADDR;
64 break; 64 break;
65 case MACH_TYPE_MX28EVK: 65 case MACH_TYPE_MX28EVK:
66 case MACH_TYPE_M28EVK:
66 case MACH_TYPE_TX28: 67 case MACH_TYPE_TX28:
67 mxs_duart_base = MX28_DUART_BASE_ADDR; 68 mxs_duart_base = MX28_DUART_BASE_ADDR;
68 break; 69 break;
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
new file mode 100644
index 000000000000..3b1681e4f49a
--- /dev/null
+++ b/arch/arm/mach-mxs/mach-m28evk.c
@@ -0,0 +1,366 @@
1/*
2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
4 *
5 * based on: mach-mx28_evk.c
6 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/delay.h>
20#include <linux/platform_device.h>
21#include <linux/gpio.h>
22#include <linux/leds.h>
23#include <linux/irq.h>
24#include <linux/clk.h>
25#include <linux/i2c.h>
26#include <linux/i2c/at24.h>
27
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/time.h>
31
32#include <mach/common.h>
33#include <mach/iomux-mx28.h>
34
35#include "devices-mx28.h"
36
37#define M28EVK_GPIO_USERLED1 MXS_GPIO_NR(3, 16)
38#define M28EVK_GPIO_USERLED2 MXS_GPIO_NR(3, 17)
39
40#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
41#define M28EVK_LCD_ENABLE MXS_GPIO_NR(3, 28)
42
43#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
44#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
45
46static const iomux_cfg_t m28evk_pads[] __initconst = {
47 /* duart */
48 MX28_PAD_AUART0_CTS__DUART_RX | MXS_PAD_CTRL,
49 MX28_PAD_AUART0_RTS__DUART_TX | MXS_PAD_CTRL,
50
51 /* auart0 */
52 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
53 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
54
55 /* auart3 */
56 MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
57 MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
58 MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
59 MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
60
61#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
62 /* fec0 */
63 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
64 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
65 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
66 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
67 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
68 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
69 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
70 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
71 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
72 /* fec1 */
73 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
74 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
75 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
76 MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
77 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
78 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
79
80 /* flexcan0 */
81 MX28_PAD_GPMI_RDY2__CAN0_TX,
82 MX28_PAD_GPMI_RDY3__CAN0_RX,
83
84 /* flexcan1 */
85 MX28_PAD_GPMI_CE2N__CAN1_TX,
86 MX28_PAD_GPMI_CE3N__CAN1_RX,
87
88 /* I2C */
89 MX28_PAD_I2C0_SCL__I2C0_SCL,
90 MX28_PAD_I2C0_SDA__I2C0_SDA,
91
92 /* mxsfb (lcdif) */
93 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
94 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
95 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
96 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
97 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
98 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
99 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
100 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
101 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
102 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
103 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
104 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
105 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
106 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
107 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
108 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
109 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
110 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
111 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
112 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
113 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
114 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
115 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
116 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
117
118 MX28_PAD_LCD_ENABLE__LCD_ENABLE | MXS_PAD_CTRL,
119 MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MXS_PAD_CTRL,
120
121 /* mmc0 */
122 MX28_PAD_SSP0_DATA0__SSP0_D0 |
123 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
124 MX28_PAD_SSP0_DATA1__SSP0_D1 |
125 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
126 MX28_PAD_SSP0_DATA2__SSP0_D2 |
127 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
128 MX28_PAD_SSP0_DATA3__SSP0_D3 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA4__SSP0_D4 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA5__SSP0_D5 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA6__SSP0_D6 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA7__SSP0_D7 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_CMD__SSP0_CMD |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
142 MX28_PAD_SSP0_SCK__SSP0_SCK |
143 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
144
145 /* mmc1 */
146 MX28_PAD_GPMI_D00__SSP1_D0 |
147 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
148 MX28_PAD_GPMI_D01__SSP1_D1 |
149 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
150 MX28_PAD_GPMI_D02__SSP1_D2 |
151 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
152 MX28_PAD_GPMI_D03__SSP1_D3 |
153 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
154 MX28_PAD_GPMI_D04__SSP1_D4 |
155 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
156 MX28_PAD_GPMI_D05__SSP1_D5 |
157 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
158 MX28_PAD_GPMI_D06__SSP1_D6 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D07__SSP1_D7 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_RDY1__SSP1_CMD |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
166 MX28_PAD_GPMI_WRN__SSP1_SCK |
167 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
168 /* write protect */
169 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
170 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
171 /* slot power enable */
172 MX28_PAD_PWM4__GPIO_3_29 |
173 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
174
175 /* led */
176 MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
177 MX28_PAD_PWM1__GPIO_3_17 | MXS_PAD_CTRL,
178
179 /* nand */
180 MX28_PAD_GPMI_D00__GPMI_D0 |
181 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
182 MX28_PAD_GPMI_D01__GPMI_D1 |
183 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
184 MX28_PAD_GPMI_D02__GPMI_D2 |
185 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
186 MX28_PAD_GPMI_D03__GPMI_D3 |
187 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
188 MX28_PAD_GPMI_D04__GPMI_D4 |
189 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
190 MX28_PAD_GPMI_D05__GPMI_D5 |
191 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
192 MX28_PAD_GPMI_D06__GPMI_D6 |
193 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
194 MX28_PAD_GPMI_D07__GPMI_D7 |
195 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
196 MX28_PAD_GPMI_CE0N__GPMI_CE0N |
197 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
198 MX28_PAD_GPMI_RDY0__GPMI_READY0 |
199 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
200 MX28_PAD_GPMI_RDN__GPMI_RDN |
201 (MXS_PAD_12MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
202 MX28_PAD_GPMI_WRN__GPMI_WRN |
203 (MXS_PAD_12MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
204 MX28_PAD_GPMI_ALE__GPMI_ALE |
205 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
206 MX28_PAD_GPMI_CLE__GPMI_CLE |
207 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
208 MX28_PAD_GPMI_RESETN__GPMI_RESETN |
209 (MXS_PAD_12MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
210
211 /* Backlight */
212 MX28_PAD_PWM3__GPIO_3_28 | MXS_PAD_CTRL,
213};
214
215/* led */
216static const struct gpio_led m28evk_leds[] __initconst = {
217 {
218 .name = "user-led1",
219 .default_trigger = "heartbeat",
220 .gpio = M28EVK_GPIO_USERLED1,
221 },
222 {
223 .name = "user-led2",
224 .default_trigger = "heartbeat",
225 .gpio = M28EVK_GPIO_USERLED2,
226 },
227};
228
229static const struct gpio_led_platform_data m28evk_led_data __initconst = {
230 .leds = m28evk_leds,
231 .num_leds = ARRAY_SIZE(m28evk_leds),
232};
233
234static struct fec_platform_data mx28_fec_pdata[] __initdata = {
235 {
236 /* fec0 */
237 .phy = PHY_INTERFACE_MODE_RMII,
238 }, {
239 /* fec1 */
240 .phy = PHY_INTERFACE_MODE_RMII,
241 },
242};
243
244static int __init m28evk_fec_get_mac(void)
245{
246 int i;
247 u32 val;
248 const u32 *ocotp = mxs_get_ocotp();
249
250 if (!ocotp) {
251 pr_err("%s: timeout when reading fec mac from OCOTP\n",
252 __func__);
253 return -ETIMEDOUT;
254 }
255
256 /*
257 * OCOTP only stores the last 4 octets for each mac address,
258 * so hard-code DENX OUI (C0:E5:4E) here.
259 */
260 for (i = 0; i < 2; i++) {
261 val = ocotp[i * 4];
262 mx28_fec_pdata[i].mac[0] = 0xC0;
263 mx28_fec_pdata[i].mac[1] = 0xE5;
264 mx28_fec_pdata[i].mac[2] = 0x4E;
265 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
266 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
267 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
268 }
269
270 return 0;
271}
272
273/* mxsfb (lcdif) */
274static struct fb_videomode m28evk_video_modes[] = {
275 {
276 .name = "Ampire AM-800480R2TMQW-T01H",
277 .refresh = 60,
278 .xres = 800,
279 .yres = 480,
280 .pixclock = 30066, /* picosecond (33.26 MHz) */
281 .left_margin = 0,
282 .right_margin = 256,
283 .upper_margin = 0,
284 .lower_margin = 45,
285 .hsync_len = 1,
286 .vsync_len = 1,
287 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
288 },
289};
290
291static const struct mxsfb_platform_data m28evk_mxsfb_pdata __initconst = {
292 .mode_list = m28evk_video_modes,
293 .mode_count = ARRAY_SIZE(m28evk_video_modes),
294 .default_bpp = 16,
295 .ld_intf_width = STMLCDIF_18BIT,
296};
297
298static struct at24_platform_data m28evk_eeprom = {
299 .byte_len = 16384,
300 .page_size = 32,
301 .flags = AT24_FLAG_ADDR16,
302};
303
304static struct i2c_board_info m28_stk5v3_i2c_boardinfo[] __initdata = {
305 {
306 I2C_BOARD_INFO("at24", 0x51), /* E0=1, E1=0, E2=0 */
307 .platform_data = &m28evk_eeprom,
308 },
309};
310
311static struct mxs_mmc_platform_data m28evk_mmc_pdata[] __initdata = {
312 {
313 /* mmc0 */
314 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
315 .flags = SLOTF_8_BIT_CAPABLE,
316 }, {
317 /* mmc1 */
318 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
319 .flags = SLOTF_8_BIT_CAPABLE,
320 },
321};
322
323static void __init m28evk_init(void)
324{
325 mxs_iomux_setup_multiple_pads(m28evk_pads, ARRAY_SIZE(m28evk_pads));
326
327 mx28_add_duart();
328 mx28_add_auart0();
329 mx28_add_auart3();
330
331 if (!m28evk_fec_get_mac()) {
332 mx28_add_fec(0, &mx28_fec_pdata[0]);
333 mx28_add_fec(1, &mx28_fec_pdata[1]);
334 }
335
336 mx28_add_flexcan(0, NULL);
337 mx28_add_flexcan(1, NULL);
338
339 mx28_add_mxsfb(&m28evk_mxsfb_pdata);
340
341 mx28_add_mxs_mmc(0, &m28evk_mmc_pdata[0]);
342 mx28_add_mxs_mmc(1, &m28evk_mmc_pdata[1]);
343
344 gpio_led_register_device(0, &m28evk_led_data);
345
346 /* I2C */
347 mx28_add_mxs_i2c(0);
348 i2c_register_board_info(0, m28_stk5v3_i2c_boardinfo,
349 ARRAY_SIZE(m28_stk5v3_i2c_boardinfo));
350}
351
352static void __init m28evk_timer_init(void)
353{
354 mx28_clocks_init();
355}
356
357static struct sys_timer m28evk_timer = {
358 .init = m28evk_timer_init,
359};
360
361MACHINE_START(M28EVK, "DENX M28 EVK")
362 .map_io = mx28_map_io,
363 .init_irq = mx28_init_irq,
364 .init_machine = m28evk_init,
365 .timer = &m28evk_timer,
366MACHINE_END