diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-01 21:35:58 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-01 21:35:58 -0400 |
commit | 84be4ae2c038e2b03d650cbf2a7cfd9e8d6e9e51 (patch) | |
tree | 06f806cdc8bded9ae81c963287beb73a6e961d4b /arch/arm/mach-mxs | |
parent | ac9e7ab32fe42489808c8d9fc89ad413d2805766 (diff) | |
parent | 36246a820075b65907112891b77ff7915fdb06a5 (diff) |
Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc-specific updates, take 2 from Olof Johansson:
"This branch converts the MXS Freescale platform to use irqdomains and
sparse IRQ, in preparation for DT probing and multiplatform kernels."
* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: mxs: remove mach/irqs.h
ARM: mxs: select SPARSE_IRQ
ARM: mxs: adopt irq_domain support for icoll driver
ARM: mxs: select MULTI_IRQ_HANDLER
ARM: mxs: retrieve timer irq from device tree
gpio/mxs: adopt irq_domain support for mxs gpio driver
Diffstat (limited to 'arch/arm/mach-mxs')
-rw-r--r-- | arch/arm/mach-mxs/icoll.c | 63 | ||||
-rw-r--r-- | arch/arm/mach-mxs/include/mach/common.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-mxs/include/mach/entry-macro.S | 35 | ||||
-rw-r--r-- | arch/arm/mach-mxs/include/mach/irqs.h | 32 | ||||
-rw-r--r-- | arch/arm/mach-mxs/mach-mxs.c | 39 | ||||
-rw-r--r-- | arch/arm/mach-mxs/timer.c | 13 |
6 files changed, 72 insertions, 113 deletions
diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c index 23ca9d083b2c..8fb23af154b3 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/arch/arm/mach-mxs/icoll.c | |||
@@ -19,20 +19,27 @@ | |||
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/irq.h> | 21 | #include <linux/irq.h> |
22 | #include <linux/irqdomain.h> | ||
22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
23 | 24 | #include <linux/of.h> | |
25 | #include <linux/of_irq.h> | ||
26 | #include <asm/exception.h> | ||
24 | #include <mach/mxs.h> | 27 | #include <mach/mxs.h> |
25 | #include <mach/common.h> | 28 | #include <mach/common.h> |
26 | 29 | ||
27 | #define HW_ICOLL_VECTOR 0x0000 | 30 | #define HW_ICOLL_VECTOR 0x0000 |
28 | #define HW_ICOLL_LEVELACK 0x0010 | 31 | #define HW_ICOLL_LEVELACK 0x0010 |
29 | #define HW_ICOLL_CTRL 0x0020 | 32 | #define HW_ICOLL_CTRL 0x0020 |
33 | #define HW_ICOLL_STAT_OFFSET 0x0070 | ||
30 | #define HW_ICOLL_INTERRUPTn_SET(n) (0x0124 + (n) * 0x10) | 34 | #define HW_ICOLL_INTERRUPTn_SET(n) (0x0124 + (n) * 0x10) |
31 | #define HW_ICOLL_INTERRUPTn_CLR(n) (0x0128 + (n) * 0x10) | 35 | #define HW_ICOLL_INTERRUPTn_CLR(n) (0x0128 + (n) * 0x10) |
32 | #define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004 | 36 | #define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004 |
33 | #define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1 | 37 | #define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1 |
34 | 38 | ||
39 | #define ICOLL_NUM_IRQS 128 | ||
40 | |||
35 | static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); | 41 | static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); |
42 | static struct irq_domain *icoll_domain; | ||
36 | 43 | ||
37 | static void icoll_ack_irq(struct irq_data *d) | 44 | static void icoll_ack_irq(struct irq_data *d) |
38 | { | 45 | { |
@@ -48,13 +55,13 @@ static void icoll_ack_irq(struct irq_data *d) | |||
48 | static void icoll_mask_irq(struct irq_data *d) | 55 | static void icoll_mask_irq(struct irq_data *d) |
49 | { | 56 | { |
50 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, | 57 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, |
51 | icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->irq)); | 58 | icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->hwirq)); |
52 | } | 59 | } |
53 | 60 | ||
54 | static void icoll_unmask_irq(struct irq_data *d) | 61 | static void icoll_unmask_irq(struct irq_data *d) |
55 | { | 62 | { |
56 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, | 63 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, |
57 | icoll_base + HW_ICOLL_INTERRUPTn_SET(d->irq)); | 64 | icoll_base + HW_ICOLL_INTERRUPTn_SET(d->hwirq)); |
58 | } | 65 | } |
59 | 66 | ||
60 | static struct irq_chip mxs_icoll_chip = { | 67 | static struct irq_chip mxs_icoll_chip = { |
@@ -63,18 +70,56 @@ static struct irq_chip mxs_icoll_chip = { | |||
63 | .irq_unmask = icoll_unmask_irq, | 70 | .irq_unmask = icoll_unmask_irq, |
64 | }; | 71 | }; |
65 | 72 | ||
66 | void __init icoll_init_irq(void) | 73 | asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs) |
67 | { | 74 | { |
68 | int i; | 75 | u32 irqnr; |
76 | |||
77 | do { | ||
78 | irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET); | ||
79 | if (irqnr != 0x7f) { | ||
80 | __raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR); | ||
81 | irqnr = irq_find_mapping(icoll_domain, irqnr); | ||
82 | handle_IRQ(irqnr, regs); | ||
83 | continue; | ||
84 | } | ||
85 | break; | ||
86 | } while (1); | ||
87 | } | ||
88 | |||
89 | static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq, | ||
90 | irq_hw_number_t hw) | ||
91 | { | ||
92 | irq_set_chip_and_handler(virq, &mxs_icoll_chip, handle_level_irq); | ||
93 | set_irq_flags(virq, IRQF_VALID); | ||
94 | |||
95 | return 0; | ||
96 | } | ||
69 | 97 | ||
98 | static struct irq_domain_ops icoll_irq_domain_ops = { | ||
99 | .map = icoll_irq_domain_map, | ||
100 | .xlate = irq_domain_xlate_onecell, | ||
101 | }; | ||
102 | |||
103 | void __init icoll_of_init(struct device_node *np, | ||
104 | struct device_node *interrupt_parent) | ||
105 | { | ||
70 | /* | 106 | /* |
71 | * Interrupt Collector reset, which initializes the priority | 107 | * Interrupt Collector reset, which initializes the priority |
72 | * for each irq to level 0. | 108 | * for each irq to level 0. |
73 | */ | 109 | */ |
74 | mxs_reset_block(icoll_base + HW_ICOLL_CTRL); | 110 | mxs_reset_block(icoll_base + HW_ICOLL_CTRL); |
75 | 111 | ||
76 | for (i = 0; i < MXS_INTERNAL_IRQS; i++) { | 112 | icoll_domain = irq_domain_add_linear(np, ICOLL_NUM_IRQS, |
77 | irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq); | 113 | &icoll_irq_domain_ops, NULL); |
78 | set_irq_flags(i, IRQF_VALID); | 114 | WARN_ON(!icoll_domain); |
79 | } | 115 | } |
116 | |||
117 | static const struct of_device_id icoll_of_match[] __initconst = { | ||
118 | {.compatible = "fsl,icoll", .data = icoll_of_init}, | ||
119 | { /* sentinel */ } | ||
120 | }; | ||
121 | |||
122 | void __init icoll_init_irq(void) | ||
123 | { | ||
124 | of_irq_init(icoll_of_match); | ||
80 | } | 125 | } |
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index 4dec79563f19..be5a9c93cb2a 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h | |||
@@ -13,7 +13,7 @@ | |||
13 | 13 | ||
14 | extern const u32 *mxs_get_ocotp(void); | 14 | extern const u32 *mxs_get_ocotp(void); |
15 | extern int mxs_reset_block(void __iomem *); | 15 | extern int mxs_reset_block(void __iomem *); |
16 | extern void mxs_timer_init(int); | 16 | extern void mxs_timer_init(void); |
17 | extern void mxs_restart(char, const char *); | 17 | extern void mxs_restart(char, const char *); |
18 | extern int mxs_saif_clkmux_select(unsigned int clkmux); | 18 | extern int mxs_saif_clkmux_select(unsigned int clkmux); |
19 | 19 | ||
@@ -24,5 +24,6 @@ extern int mx28_clocks_init(void); | |||
24 | extern void mx28_map_io(void); | 24 | extern void mx28_map_io(void); |
25 | 25 | ||
26 | extern void icoll_init_irq(void); | 26 | extern void icoll_init_irq(void); |
27 | extern void icoll_handle_irq(struct pt_regs *); | ||
27 | 28 | ||
28 | #endif /* __MACH_MXS_COMMON_H__ */ | 29 | #endif /* __MACH_MXS_COMMON_H__ */ |
diff --git a/arch/arm/mach-mxs/include/mach/entry-macro.S b/arch/arm/mach-mxs/include/mach/entry-macro.S deleted file mode 100644 index 0c14259705b9..000000000000 --- a/arch/arm/mach-mxs/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for Freescale MXS-based | ||
3 | * | ||
4 | * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
19 | */ | ||
20 | |||
21 | #include <mach/mxs.h> | ||
22 | |||
23 | #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) | ||
24 | #define HW_ICOLL_STAT_OFFSET 0x70 | ||
25 | |||
26 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
27 | ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] | ||
28 | cmp \irqnr, #0x7F | ||
29 | strne \irqnr, [\base] | ||
30 | moveqs \irqnr, #0 | ||
31 | .endm | ||
32 | |||
33 | .macro get_irqnr_preamble, base, tmp | ||
34 | ldr \base, =MXS_ICOLL_VBASE | ||
35 | .endm | ||
diff --git a/arch/arm/mach-mxs/include/mach/irqs.h b/arch/arm/mach-mxs/include/mach/irqs.h deleted file mode 100644 index f771039b814a..000000000000 --- a/arch/arm/mach-mxs/include/mach/irqs.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | */ | ||
4 | |||
5 | /* | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __MACH_MXS_IRQS_H__ | ||
12 | #define __MACH_MXS_IRQS_H__ | ||
13 | |||
14 | #define MXS_INTERNAL_IRQS 128 | ||
15 | |||
16 | #define MXS_GPIO_IRQ_START MXS_INTERNAL_IRQS | ||
17 | |||
18 | /* the maximum for MXS-based */ | ||
19 | #define MXS_GPIO_IRQS (32 * 5) | ||
20 | |||
21 | /* | ||
22 | * The next 16 interrupts are for board specific purposes. Since | ||
23 | * the kernel can only run on one machine at a time, we can re-use | ||
24 | * these. If you need more, increase MXS_BOARD_IRQS, but keep it | ||
25 | * within sensible limits. | ||
26 | */ | ||
27 | #define MXS_BOARD_IRQ_START (MXS_GPIO_IRQ_START + MXS_GPIO_IRQS) | ||
28 | #define MXS_BOARD_IRQS 16 | ||
29 | |||
30 | #define NR_IRQS (MXS_BOARD_IRQ_START + MXS_BOARD_IRQS) | ||
31 | |||
32 | #endif /* __MACH_MXS_IRQS_H__ */ | ||
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index cf43e5effb91..4748ec551a68 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c | |||
@@ -17,10 +17,8 @@ | |||
17 | #include <linux/err.h> | 17 | #include <linux/err.h> |
18 | #include <linux/gpio.h> | 18 | #include <linux/gpio.h> |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/irqdomain.h> | ||
21 | #include <linux/micrel_phy.h> | 20 | #include <linux/micrel_phy.h> |
22 | #include <linux/mxsfb.h> | 21 | #include <linux/mxsfb.h> |
23 | #include <linux/of_irq.h> | ||
24 | #include <linux/of_platform.h> | 22 | #include <linux/of_platform.h> |
25 | #include <linux/phy.h> | 23 | #include <linux/phy.h> |
26 | #include <linux/pinctrl/consumer.h> | 24 | #include <linux/pinctrl/consumer.h> |
@@ -141,37 +139,6 @@ static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { | |||
141 | { /* sentinel */ } | 139 | { /* sentinel */ } |
142 | }; | 140 | }; |
143 | 141 | ||
144 | static int __init mxs_icoll_add_irq_domain(struct device_node *np, | ||
145 | struct device_node *interrupt_parent) | ||
146 | { | ||
147 | irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL); | ||
148 | |||
149 | return 0; | ||
150 | } | ||
151 | |||
152 | static int __init mxs_gpio_add_irq_domain(struct device_node *np, | ||
153 | struct device_node *interrupt_parent) | ||
154 | { | ||
155 | static int gpio_irq_base = MXS_GPIO_IRQ_START; | ||
156 | |||
157 | irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL); | ||
158 | gpio_irq_base += 32; | ||
159 | |||
160 | return 0; | ||
161 | } | ||
162 | |||
163 | static const struct of_device_id mxs_irq_match[] __initconst = { | ||
164 | { .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, }, | ||
165 | { .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, }, | ||
166 | { /* sentinel */ } | ||
167 | }; | ||
168 | |||
169 | static void __init mxs_dt_init_irq(void) | ||
170 | { | ||
171 | icoll_init_irq(); | ||
172 | of_irq_init(mxs_irq_match); | ||
173 | } | ||
174 | |||
175 | static void __init imx23_timer_init(void) | 142 | static void __init imx23_timer_init(void) |
176 | { | 143 | { |
177 | mx23_clocks_init(); | 144 | mx23_clocks_init(); |
@@ -421,7 +388,8 @@ static const char *imx28_dt_compat[] __initdata = { | |||
421 | 388 | ||
422 | DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") | 389 | DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") |
423 | .map_io = mx23_map_io, | 390 | .map_io = mx23_map_io, |
424 | .init_irq = mxs_dt_init_irq, | 391 | .init_irq = icoll_init_irq, |
392 | .handle_irq = icoll_handle_irq, | ||
425 | .timer = &imx23_timer, | 393 | .timer = &imx23_timer, |
426 | .init_machine = mxs_machine_init, | 394 | .init_machine = mxs_machine_init, |
427 | .dt_compat = imx23_dt_compat, | 395 | .dt_compat = imx23_dt_compat, |
@@ -430,7 +398,8 @@ MACHINE_END | |||
430 | 398 | ||
431 | DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") | 399 | DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") |
432 | .map_io = mx28_map_io, | 400 | .map_io = mx28_map_io, |
433 | .init_irq = mxs_dt_init_irq, | 401 | .init_irq = icoll_init_irq, |
402 | .handle_irq = icoll_handle_irq, | ||
434 | .timer = &imx28_timer, | 403 | .timer = &imx28_timer, |
435 | .init_machine = mxs_machine_init, | 404 | .init_machine = mxs_machine_init, |
436 | .dt_compat = imx28_dt_compat, | 405 | .dt_compat = imx28_dt_compat, |
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index 02d36de9c4e8..7c3792613392 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c | |||
@@ -25,6 +25,8 @@ | |||
25 | #include <linux/irq.h> | 25 | #include <linux/irq.h> |
26 | #include <linux/clockchips.h> | 26 | #include <linux/clockchips.h> |
27 | #include <linux/clk.h> | 27 | #include <linux/clk.h> |
28 | #include <linux/of.h> | ||
29 | #include <linux/of_irq.h> | ||
28 | 30 | ||
29 | #include <asm/mach/time.h> | 31 | #include <asm/mach/time.h> |
30 | #include <mach/mxs.h> | 32 | #include <mach/mxs.h> |
@@ -244,9 +246,17 @@ static int __init mxs_clocksource_init(struct clk *timer_clk) | |||
244 | return 0; | 246 | return 0; |
245 | } | 247 | } |
246 | 248 | ||
247 | void __init mxs_timer_init(int irq) | 249 | void __init mxs_timer_init(void) |
248 | { | 250 | { |
251 | struct device_node *np; | ||
249 | struct clk *timer_clk; | 252 | struct clk *timer_clk; |
253 | int irq; | ||
254 | |||
255 | np = of_find_compatible_node(NULL, NULL, "fsl,timrot"); | ||
256 | if (!np) { | ||
257 | pr_err("%s: failed find timrot node\n", __func__); | ||
258 | return; | ||
259 | } | ||
250 | 260 | ||
251 | timer_clk = clk_get_sys("timrot", NULL); | 261 | timer_clk = clk_get_sys("timrot", NULL); |
252 | if (IS_ERR(timer_clk)) { | 262 | if (IS_ERR(timer_clk)) { |
@@ -295,5 +305,6 @@ void __init mxs_timer_init(int irq) | |||
295 | mxs_clockevent_init(timer_clk); | 305 | mxs_clockevent_init(timer_clk); |
296 | 306 | ||
297 | /* Make irqs happen */ | 307 | /* Make irqs happen */ |
308 | irq = irq_of_parse_and_map(np, 0); | ||
298 | setup_irq(irq, &mxs_timer_irq); | 309 | setup_irq(irq, &mxs_timer_irq); |
299 | } | 310 | } |