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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-07 14:06:17 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-07 14:06:17 -0400
commit38f56f33ca381751f9b8910f67e7a805ec0b68cb (patch)
tree202f2ce60f3f43a948607ec76c8cc48c1cf73a4b /arch/arm/mach-mxs
parentfcba914542082b272f31c8e4c40000b88ed3208d (diff)
parent4183bef2e093a2f0aab45f2d5fed82b0e02aeacf (diff)
Merge tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates (part 2) from Arnd Bergmann: "These are mostly new device tree bindings for existing drivers, as well as changes to the device tree source files to add support for those devices, and a couple of new boards, most notably Samsung's Exynos5 based Chromebook. The changes depend on earlier platform specific updates and touch the usual platforms: omap, exynos, tegra, mxs, mvebu and davinci." * tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits) ARM: exynos: dts: cros5250: add EC device ARM: dts: Add sbs-battery for exynos5250-snow ARM: dts: Add i2c-arbitrator bus for exynos5250-snow ARM: dts: add mshc controller node for Exynos4x12 SoCs ARM: dts: Add chip-id controller node on Exynos4/5 SoC ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree ARM: davinci: da850-evm: add SPI flash support ARM: davinci: da850: override SPI DT node device name ARM: davinci: da850: add SPI1 DT node spi/davinci: add DT binding documentation spi/davinci: no wildcards in DT compatible property ARM: dts: mvebu: Convert mvebu device tree files to 64 bits ARM: dts: mvebu: introduce internal-regs node ARM: dts: mvebu: Convert all the mvebu files to use the range property ARM: dts: mvebu: move all peripherals inside soc ARM: dts: mvebu: fix cpus section indentation ARM: davinci: da850: add EHRPWM & ECAP DT node ARM/dts: OMAP3: fix pinctrl-single configuration ARM: dts: Add OMAP3430 SDP NOR flash memory binding ARM: dts: Add NOR flash bindings for OMAP2420 H4 ...
Diffstat (limited to 'arch/arm/mach-mxs')
-rw-r--r--arch/arm/mach-mxs/mach-mxs.c170
1 files changed, 0 insertions, 170 deletions
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index b5c1bdd3dcdf..5b62b6489d4b 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -22,7 +22,6 @@
22#include <linux/irqchip.h> 22#include <linux/irqchip.h>
23#include <linux/irqchip/mxs.h> 23#include <linux/irqchip/mxs.h>
24#include <linux/micrel_phy.h> 24#include <linux/micrel_phy.h>
25#include <linux/mxsfb.h>
26#include <linux/of_address.h> 25#include <linux/of_address.h>
27#include <linux/of_platform.h> 26#include <linux/of_platform.h>
28#include <linux/phy.h> 27#include <linux/phy.h>
@@ -61,106 +60,6 @@ static inline void __mxs_togl(u32 mask, void __iomem *reg)
61 __raw_writel(mask, reg + MXS_TOG_ADDR); 60 __raw_writel(mask, reg + MXS_TOG_ADDR);
62} 61}
63 62
64static struct fb_videomode mx23evk_video_modes[] = {
65 {
66 .name = "Samsung-LMS430HF02",
67 .refresh = 60,
68 .xres = 480,
69 .yres = 272,
70 .pixclock = 108096, /* picosecond (9.2 MHz) */
71 .left_margin = 15,
72 .right_margin = 8,
73 .upper_margin = 12,
74 .lower_margin = 4,
75 .hsync_len = 1,
76 .vsync_len = 1,
77 },
78};
79
80static struct fb_videomode mx28evk_video_modes[] = {
81 {
82 .name = "Seiko-43WVF1G",
83 .refresh = 60,
84 .xres = 800,
85 .yres = 480,
86 .pixclock = 29851, /* picosecond (33.5 MHz) */
87 .left_margin = 89,
88 .right_margin = 164,
89 .upper_margin = 23,
90 .lower_margin = 10,
91 .hsync_len = 10,
92 .vsync_len = 10,
93 },
94};
95
96static struct fb_videomode m28evk_video_modes[] = {
97 {
98 .name = "Ampire AM-800480R2TMQW-T01H",
99 .refresh = 60,
100 .xres = 800,
101 .yres = 480,
102 .pixclock = 30066, /* picosecond (33.26 MHz) */
103 .left_margin = 0,
104 .right_margin = 256,
105 .upper_margin = 0,
106 .lower_margin = 45,
107 .hsync_len = 1,
108 .vsync_len = 1,
109 },
110};
111
112static struct fb_videomode apx4devkit_video_modes[] = {
113 {
114 .name = "HannStar PJ70112A",
115 .refresh = 60,
116 .xres = 800,
117 .yres = 480,
118 .pixclock = 33333, /* picosecond (30.00 MHz) */
119 .left_margin = 88,
120 .right_margin = 40,
121 .upper_margin = 32,
122 .lower_margin = 13,
123 .hsync_len = 48,
124 .vsync_len = 3,
125 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
126 },
127};
128
129static struct fb_videomode apf28dev_video_modes[] = {
130 {
131 .name = "LW700",
132 .refresh = 60,
133 .xres = 800,
134 .yres = 480,
135 .pixclock = 30303, /* picosecond */
136 .left_margin = 96,
137 .right_margin = 96, /* at least 3 & 1 */
138 .upper_margin = 0x14,
139 .lower_margin = 0x15,
140 .hsync_len = 64,
141 .vsync_len = 4,
142 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
143 },
144};
145
146static struct fb_videomode cfa10049_video_modes[] = {
147 {
148 .name = "Himax HX8357-B",
149 .refresh = 60,
150 .xres = 320,
151 .yres = 480,
152 .pixclock = 108506, /* picosecond (9.216 MHz) */
153 .left_margin = 2,
154 .right_margin = 2,
155 .upper_margin = 2,
156 .lower_margin = 2,
157 .hsync_len = 15,
158 .vsync_len = 15,
159 },
160};
161
162static struct mxsfb_platform_data mxsfb_pdata __initdata;
163
164/* 63/*
165 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers 64 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
166 */ 65 */
@@ -191,8 +90,6 @@ static void mx28evk_flexcan1_switch(int enable)
191static struct flexcan_platform_data flexcan_pdata[2]; 90static struct flexcan_platform_data flexcan_pdata[2];
192 91
193static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { 92static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
194 OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
195 OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
196 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]), 93 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
197 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]), 94 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
198 { /* sentinel */ } 95 { /* sentinel */ }
@@ -342,16 +239,6 @@ static void __init update_fec_mac_prop(enum mac_oui oui)
342 } 239 }
343} 240}
344 241
345static void __init imx23_evk_init(void)
346{
347 mxsfb_pdata.mode_list = mx23evk_video_modes;
348 mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
349 mxsfb_pdata.default_bpp = 32;
350 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
351 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
352 MXSFB_SYNC_DOTCLK_FAILING_ACT;
353}
354
355static inline void enable_clk_enet_out(void) 242static inline void enable_clk_enet_out(void)
356{ 243{
357 struct clk *clk = clk_get_sys("enet_out", NULL); 244 struct clk *clk = clk_get_sys("enet_out", NULL);
@@ -362,16 +249,8 @@ static inline void enable_clk_enet_out(void)
362 249
363static void __init imx28_evk_init(void) 250static void __init imx28_evk_init(void)
364{ 251{
365 enable_clk_enet_out();
366 update_fec_mac_prop(OUI_FSL); 252 update_fec_mac_prop(OUI_FSL);
367 253
368 mxsfb_pdata.mode_list = mx28evk_video_modes;
369 mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
370 mxsfb_pdata.default_bpp = 32;
371 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
372 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
373 MXSFB_SYNC_DOTCLK_FAILING_ACT;
374
375 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); 254 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
376} 255}
377 256
@@ -384,20 +263,6 @@ static void __init imx28_evk_post_init(void)
384 } 263 }
385} 264}
386 265
387static void __init m28evk_init(void)
388{
389 mxsfb_pdata.mode_list = m28evk_video_modes;
390 mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
391 mxsfb_pdata.default_bpp = 16;
392 mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
393 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
394}
395
396static void __init sc_sps1_init(void)
397{
398 enable_clk_enet_out();
399}
400
401static int apx4devkit_phy_fixup(struct phy_device *phy) 266static int apx4devkit_phy_fixup(struct phy_device *phy)
402{ 267{
403 phy->dev_flags |= MICREL_PHY_50MHZ_CLK; 268 phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
@@ -411,13 +276,6 @@ static void __init apx4devkit_init(void)
411 if (IS_BUILTIN(CONFIG_PHYLIB)) 276 if (IS_BUILTIN(CONFIG_PHYLIB))
412 phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK, 277 phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
413 apx4devkit_phy_fixup); 278 apx4devkit_phy_fixup);
414
415 mxsfb_pdata.mode_list = apx4devkit_video_modes;
416 mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
417 mxsfb_pdata.default_bpp = 32;
418 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
419 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
420 MXSFB_SYNC_DOTCLK_FAILING_ACT;
421} 279}
422 280
423#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0) 281#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
@@ -496,52 +354,24 @@ static void __init tx28_post_init(void)
496 354
497static void __init cfa10049_init(void) 355static void __init cfa10049_init(void)
498{ 356{
499 enable_clk_enet_out();
500 update_fec_mac_prop(OUI_CRYSTALFONTZ); 357 update_fec_mac_prop(OUI_CRYSTALFONTZ);
501
502 mxsfb_pdata.mode_list = cfa10049_video_modes;
503 mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
504 mxsfb_pdata.default_bpp = 32;
505 mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
506 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
507} 358}
508 359
509static void __init cfa10037_init(void) 360static void __init cfa10037_init(void)
510{ 361{
511 enable_clk_enet_out();
512 update_fec_mac_prop(OUI_CRYSTALFONTZ); 362 update_fec_mac_prop(OUI_CRYSTALFONTZ);
513} 363}
514 364
515static void __init apf28_init(void)
516{
517 enable_clk_enet_out();
518
519 mxsfb_pdata.mode_list = apf28dev_video_modes;
520 mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
521 mxsfb_pdata.default_bpp = 16;
522 mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
523 mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
524 MXSFB_SYNC_DOTCLK_FAILING_ACT;
525}
526
527static void __init mxs_machine_init(void) 365static void __init mxs_machine_init(void)
528{ 366{
529 if (of_machine_is_compatible("fsl,imx28-evk")) 367 if (of_machine_is_compatible("fsl,imx28-evk"))
530 imx28_evk_init(); 368 imx28_evk_init();
531 else if (of_machine_is_compatible("fsl,imx23-evk"))
532 imx23_evk_init();
533 else if (of_machine_is_compatible("denx,m28evk"))
534 m28evk_init();
535 else if (of_machine_is_compatible("bluegiga,apx4devkit")) 369 else if (of_machine_is_compatible("bluegiga,apx4devkit"))
536 apx4devkit_init(); 370 apx4devkit_init();
537 else if (of_machine_is_compatible("crystalfontz,cfa10037")) 371 else if (of_machine_is_compatible("crystalfontz,cfa10037"))
538 cfa10037_init(); 372 cfa10037_init();
539 else if (of_machine_is_compatible("crystalfontz,cfa10049")) 373 else if (of_machine_is_compatible("crystalfontz,cfa10049"))
540 cfa10049_init(); 374 cfa10049_init();
541 else if (of_machine_is_compatible("armadeus,imx28-apf28"))
542 apf28_init();
543 else if (of_machine_is_compatible("schulercontrol,imx28-sps1"))
544 sc_sps1_init();
545 375
546 of_platform_populate(NULL, of_default_bus_match_table, 376 of_platform_populate(NULL, of_default_bus_match_table,
547 mxs_auxdata_lookup, NULL); 377 mxs_auxdata_lookup, NULL);