diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:39:59 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:39:59 -0500 |
commit | b3c37522928b5452588fc202eaa0f11f6e339256 (patch) | |
tree | 37bfe21d9977b15271903d1a4b304289a232e364 /arch/arm/mach-mx5 | |
parent | 2ac9d7aaccbd598b5bd19ac40761b723bb675442 (diff) | |
parent | 6d0a5636fba5a3f82ec80ab124dd4748344549c3 (diff) |
Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
power management changes for omap and imx
A significant part of the changes for these two platforms went into
power management, so they are split out into a separate branch.
* tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (65 commits)
ARM: imx6: remove __CPUINIT annotation from v7_invalidate_l1
ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation
ARM: imx6q: resume PL310 only when CACHE_L2X0 defined
ARM: imx6q: build pm code only when CONFIG_PM selected
ARM: mx5: use generic irq chip pm interface for pm functions on
ARM: omap: pass minimal SoC/board data for UART from dt
arm/dts: Add minimal device tree support for omap2420 and omap2430
omap-serial: Add minimal device tree support
omap-serial: Use default clock speed (48Mhz) if not specified
omap-serial: Get rid of all pdev->id usage
ARM: OMAP2+: hwmod: Add a new flag to handle hwmods left enabled at init
ARM: OMAP4: PRM: use PRCM interrupt handler
ARM: OMAP3: pm: use prcm chain handler
ARM: OMAP: hwmod: add support for selecting mpu_irq for each wakeup pad
ARM: OMAP2+: mux: add support for PAD wakeup interrupts
ARM: OMAP: PRCM: add suspend prepare / finish support
ARM: OMAP: PRCM: add support for chain interrupt handler
ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier
ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup
ARM: OMAP2+: mux: add wakeup-capable hwmod mux entries to dynamic list
...
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r-- | arch/arm/mach-mx5/mm.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-mx5/system.c | 3 |
2 files changed, 18 insertions, 4 deletions
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index df4a508f240a..bc17dfea3817 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c | |||
@@ -13,6 +13,7 @@ | |||
13 | 13 | ||
14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/clk.h> | ||
16 | 17 | ||
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
18 | 19 | ||
@@ -21,10 +22,26 @@ | |||
21 | #include <mach/devices-common.h> | 22 | #include <mach/devices-common.h> |
22 | #include <mach/iomux-v3.h> | 23 | #include <mach/iomux-v3.h> |
23 | 24 | ||
25 | static struct clk *gpc_dvfs_clk; | ||
26 | |||
24 | static void imx5_idle(void) | 27 | static void imx5_idle(void) |
25 | { | 28 | { |
26 | if (!need_resched()) | 29 | if (!need_resched()) { |
30 | /* gpc clock is needed for SRPG */ | ||
31 | if (gpc_dvfs_clk == NULL) { | ||
32 | gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); | ||
33 | if (IS_ERR(gpc_dvfs_clk)) | ||
34 | goto err0; | ||
35 | } | ||
36 | clk_enable(gpc_dvfs_clk); | ||
27 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); | 37 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); |
38 | if (tzic_enable_wake()) | ||
39 | goto err1; | ||
40 | cpu_do_idle(); | ||
41 | err1: | ||
42 | clk_disable(gpc_dvfs_clk); | ||
43 | } | ||
44 | err0: | ||
28 | local_irq_enable(); | 45 | local_irq_enable(); |
29 | } | 46 | } |
30 | 47 | ||
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c index 144ebebc4a61..5eebfaad1226 100644 --- a/arch/arm/mach-mx5/system.c +++ b/arch/arm/mach-mx5/system.c | |||
@@ -55,9 +55,6 @@ void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode) | |||
55 | stop_mode = 1; | 55 | stop_mode = 1; |
56 | } | 56 | } |
57 | arm_srpgcr |= MXC_SRPGCR_PCR; | 57 | arm_srpgcr |= MXC_SRPGCR_PCR; |
58 | |||
59 | if (tzic_enable_wake(1) != 0) | ||
60 | return; | ||
61 | break; | 58 | break; |
62 | case STOP_POWER_ON: | 59 | case STOP_POWER_ON: |
63 | ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET; | 60 | ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET; |