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authorArnd Bergmann <arnd@arndb.de>2011-10-07 15:57:31 -0400
committerArnd Bergmann <arnd@arndb.de>2011-10-07 15:57:31 -0400
commit526b264163068f77c5f2409031f5e25caf3900a9 (patch)
tree196e7581f1546e48ba392ff099f369e5c622636b /arch/arm/mach-mx5
parent4c4cbce68f57555cddb9d77da333bf50875148ce (diff)
parent05d900c9d8ce536c6792efb323c82b1c97b54bf9 (diff)
Merge branch 'imx/cleanup' into imx/devel
This helps resolve the conflicts between the imx cleanups and the new code that has gone into the imx tree. Conflict resolution was originally done by Sascha Hauer. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r--arch/arm/mach-mx5/Kconfig10
-rw-r--r--arch/arm/mach-mx5/Makefile3
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51.c27
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51sd.c25
-rw-r--r--arch/arm/mach-mx5/board-mx51_3ds.c1
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c26
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikamx.c2
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikasb.c6
-rw-r--r--arch/arm/mach-mx5/board-mx53_ard.c4
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c2
-rw-r--r--arch/arm/mach-mx5/devices-imx51.h13
-rw-r--r--arch/arm/mach-mx5/devices.c120
-rw-r--r--arch/arm/mach-mx5/devices.h5
-rw-r--r--arch/arm/mach-mx5/ehci.c2
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c3
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c6
-rw-r--r--arch/arm/mach-mx5/mm-mx50.c72
-rw-r--r--arch/arm/mach-mx5/mm.c90
-rw-r--r--arch/arm/mach-mx5/mx51_efika.c17
-rw-r--r--arch/arm/mach-mx5/pm-imx5.c18
-rw-r--r--arch/arm/mach-mx5/system.c1
21 files changed, 136 insertions, 317 deletions
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index fb4c503bb052..3d4c31306ca7 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -50,7 +50,6 @@ config MACH_MX50_RDP
50 select IMX_HAVE_PLATFORM_IMX_UART 50 select IMX_HAVE_PLATFORM_IMX_UART
51 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 51 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
52 select IMX_HAVE_PLATFORM_SPI_IMX 52 select IMX_HAVE_PLATFORM_SPI_IMX
53 select IMX_HAVE_PLATFORM_FEC
54 help 53 help
55 Include support for MX50 reference design platform (RDP) board. This 54 Include support for MX50 reference design platform (RDP) board. This
56 includes specific configurations for the board and its peripherals. 55 includes specific configurations for the board and its peripherals.
@@ -60,9 +59,11 @@ comment "i.MX51 machines:"
60config MACH_MX51_BABBAGE 59config MACH_MX51_BABBAGE
61 bool "Support MX51 BABBAGE platforms" 60 bool "Support MX51 BABBAGE platforms"
62 select SOC_IMX51 61 select SOC_IMX51
62 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
63 select IMX_HAVE_PLATFORM_IMX2_WDT 63 select IMX_HAVE_PLATFORM_IMX2_WDT
64 select IMX_HAVE_PLATFORM_IMX_I2C 64 select IMX_HAVE_PLATFORM_IMX_I2C
65 select IMX_HAVE_PLATFORM_IMX_UART 65 select IMX_HAVE_PLATFORM_IMX_UART
66 select IMX_HAVE_PLATFORM_MXC_EHCI
66 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 67 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
67 select IMX_HAVE_PLATFORM_SPI_IMX 68 select IMX_HAVE_PLATFORM_SPI_IMX
68 help 69 help
@@ -86,8 +87,10 @@ config MACH_MX51_3DS
86config MACH_EUKREA_CPUIMX51 87config MACH_EUKREA_CPUIMX51
87 bool "Support Eukrea CPUIMX51 module" 88 bool "Support Eukrea CPUIMX51 module"
88 select SOC_IMX51 89 select SOC_IMX51
90 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
89 select IMX_HAVE_PLATFORM_IMX_I2C 91 select IMX_HAVE_PLATFORM_IMX_I2C
90 select IMX_HAVE_PLATFORM_IMX_UART 92 select IMX_HAVE_PLATFORM_IMX_UART
93 select IMX_HAVE_PLATFORM_MXC_EHCI
91 select IMX_HAVE_PLATFORM_MXC_NAND 94 select IMX_HAVE_PLATFORM_MXC_NAND
92 select IMX_HAVE_PLATFORM_SPI_IMX 95 select IMX_HAVE_PLATFORM_SPI_IMX
93 help 96 help
@@ -114,10 +117,12 @@ endchoice
114config MACH_EUKREA_CPUIMX51SD 117config MACH_EUKREA_CPUIMX51SD
115 bool "Support Eukrea CPUIMX51SD module" 118 bool "Support Eukrea CPUIMX51SD module"
116 select SOC_IMX51 119 select SOC_IMX51
120 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
117 select IMX_HAVE_PLATFORM_IMX_I2C 121 select IMX_HAVE_PLATFORM_IMX_I2C
118 select IMX_HAVE_PLATFORM_SPI_IMX
119 select IMX_HAVE_PLATFORM_IMX_UART 122 select IMX_HAVE_PLATFORM_IMX_UART
123 select IMX_HAVE_PLATFORM_MXC_EHCI
120 select IMX_HAVE_PLATFORM_MXC_NAND 124 select IMX_HAVE_PLATFORM_MXC_NAND
125 select IMX_HAVE_PLATFORM_SPI_IMX
121 help 126 help
122 Include support for Eukrea CPUIMX51SD platform. This includes 127 Include support for Eukrea CPUIMX51SD platform. This includes
123 specific configurations for the module and its peripherals. 128 specific configurations for the module and its peripherals.
@@ -142,6 +147,7 @@ config MX51_EFIKA_COMMON
142 bool 147 bool
143 select SOC_IMX51 148 select SOC_IMX51
144 select IMX_HAVE_PLATFORM_IMX_UART 149 select IMX_HAVE_PLATFORM_IMX_UART
150 select IMX_HAVE_PLATFORM_MXC_EHCI
145 select IMX_HAVE_PLATFORM_PATA_IMX 151 select IMX_HAVE_PLATFORM_PATA_IMX
146 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 152 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
147 select IMX_HAVE_PLATFORM_SPI_IMX 153 select IMX_HAVE_PLATFORM_SPI_IMX
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 383e7cd3fbcb..9565304b7282 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -3,8 +3,7 @@
3# 3#
4 4
5# Object file lists. 5# Object file lists.
6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o 6obj-y := cpu.o mm.o clock-mx51-mx53.o ehci.o system.o
7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
8 7
9obj-$(CONFIG_PM) += pm-imx5.o 8obj-$(CONFIG_PM) += pm-imx5.o
10obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o 9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index a7a6682560b7..e28d0e165e5c 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -22,21 +22,18 @@
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/irq.h>
26 25
27#include <mach/eukrea-baseboards.h> 26#include <mach/eukrea-baseboards.h>
28#include <mach/common.h> 27#include <mach/common.h>
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30#include <mach/iomux-mx51.h> 29#include <mach/iomux-mx51.h>
31 30
32#include <asm/irq.h>
33#include <asm/setup.h> 31#include <asm/setup.h>
34#include <asm/mach-types.h> 32#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
36#include <asm/mach/time.h> 34#include <asm/mach/time.h>
37 35
38#include "devices-imx51.h" 36#include "devices-imx51.h"
39#include "devices.h"
40 37
41#define CPUIMX51_USBH1_STP IMX_GPIO_NR(1, 27) 38#define CPUIMX51_USBH1_STP IMX_GPIO_NR(1, 27)
42#define CPUIMX51_QUARTA_GPIO IMX_GPIO_NR(3, 28) 39#define CPUIMX51_QUARTA_GPIO IMX_GPIO_NR(3, 28)
@@ -57,7 +54,7 @@
57static struct plat_serial8250_port serial_platform_data[] = { 54static struct plat_serial8250_port serial_platform_data[] = {
58 { 55 {
59 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000), 56 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),
60 .irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO), 57 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTA_GPIO),
61 .irqflags = IRQF_TRIGGER_HIGH, 58 .irqflags = IRQF_TRIGGER_HIGH,
62 .uartclk = CPUIMX51_QUART_XTAL, 59 .uartclk = CPUIMX51_QUART_XTAL,
63 .regshift = CPUIMX51_QUART_REGSHIFT, 60 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -65,7 +62,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
65 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 62 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
66 }, { 63 }, {
67 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000), 64 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),
68 .irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO), 65 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTB_GPIO),
69 .irqflags = IRQF_TRIGGER_HIGH, 66 .irqflags = IRQF_TRIGGER_HIGH,
70 .uartclk = CPUIMX51_QUART_XTAL, 67 .uartclk = CPUIMX51_QUART_XTAL,
71 .regshift = CPUIMX51_QUART_REGSHIFT, 68 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -73,7 +70,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
73 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 70 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
74 }, { 71 }, {
75 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000), 72 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),
76 .irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO), 73 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTC_GPIO),
77 .irqflags = IRQF_TRIGGER_HIGH, 74 .irqflags = IRQF_TRIGGER_HIGH,
78 .uartclk = CPUIMX51_QUART_XTAL, 75 .uartclk = CPUIMX51_QUART_XTAL,
79 .regshift = CPUIMX51_QUART_REGSHIFT, 76 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -81,7 +78,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
81 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 78 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
82 }, { 79 }, {
83 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), 80 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
84 .irq = gpio_to_irq(CPUIMX51_QUARTD_GPIO), 81 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTD_GPIO),
85 .irqflags = IRQF_TRIGGER_HIGH, 82 .irqflags = IRQF_TRIGGER_HIGH,
86 .uartclk = CPUIMX51_QUART_XTAL, 83 .uartclk = CPUIMX51_QUART_XTAL,
87 .regshift = CPUIMX51_QUART_REGSHIFT, 84 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -167,7 +164,7 @@ static int initialize_otg_port(struct platform_device *pdev)
167 void __iomem *usb_base; 164 void __iomem *usb_base;
168 void __iomem *usbother_base; 165 void __iomem *usbother_base;
169 166
170 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 167 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
171 if (!usb_base) 168 if (!usb_base)
172 return -ENOMEM; 169 return -ENOMEM;
173 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 170 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -190,7 +187,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
190 void __iomem *usb_base; 187 void __iomem *usb_base;
191 void __iomem *usbother_base; 188 void __iomem *usbother_base;
192 189
193 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 190 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
194 if (!usb_base) 191 if (!usb_base)
195 return -ENOMEM; 192 return -ENOMEM;
196 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 193 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -206,17 +203,17 @@ static int initialize_usbh1_port(struct platform_device *pdev)
206 MXC_EHCI_ITC_NO_THRESHOLD); 203 MXC_EHCI_ITC_NO_THRESHOLD);
207} 204}
208 205
209static struct mxc_usbh_platform_data dr_utmi_config = { 206static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
210 .init = initialize_otg_port, 207 .init = initialize_otg_port,
211 .portsc = MXC_EHCI_UTMI_16BIT, 208 .portsc = MXC_EHCI_UTMI_16BIT,
212}; 209};
213 210
214static struct fsl_usb2_platform_data usb_pdata = { 211static const struct fsl_usb2_platform_data usb_pdata __initconst = {
215 .operating_mode = FSL_USB2_DR_DEVICE, 212 .operating_mode = FSL_USB2_DR_DEVICE,
216 .phy_mode = FSL_USB2_PHY_UTMI_WIDE, 213 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
217}; 214};
218 215
219static struct mxc_usbh_platform_data usbh1_config = { 216static const struct mxc_usbh_platform_data usbh1_config __initconst = {
220 .init = initialize_usbh1_port, 217 .init = initialize_usbh1_port,
221 .portsc = MXC_EHCI_MODE_ULPI, 218 .portsc = MXC_EHCI_MODE_ULPI,
222}; 219};
@@ -270,12 +267,12 @@ static void __init eukrea_cpuimx51_init(void)
270 ARRAY_SIZE(eukrea_cpuimx51_i2c_devices)); 267 ARRAY_SIZE(eukrea_cpuimx51_i2c_devices));
271 268
272 if (otg_mode_host) 269 if (otg_mode_host)
273 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 270 imx51_add_mxc_ehci_otg(&dr_utmi_config);
274 else { 271 else {
275 initialize_otg_port(NULL); 272 initialize_otg_port(NULL);
276 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata); 273 imx51_add_fsl_usb2_udc(&usb_pdata);
277 } 274 }
278 mxc_register_device(&mxc_usbh1_device, &usbh1_config); 275 imx51_add_mxc_ehci_hs(1, &usbh1_config);
279 276
280#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD 277#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD
281 eukrea_mbimx51_baseboard_init(); 278 eukrea_mbimx51_baseboard_init();
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c
index 06beec10a811..5276660041ad 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-mx5/board-cpuimx51sd.c
@@ -22,7 +22,6 @@
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/irq.h>
26#include <linux/i2c-gpio.h> 25#include <linux/i2c-gpio.h>
27#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
28#include <linux/can/platform/mcp251x.h> 27#include <linux/can/platform/mcp251x.h>
@@ -32,14 +31,12 @@
32#include <mach/hardware.h> 31#include <mach/hardware.h>
33#include <mach/iomux-mx51.h> 32#include <mach/iomux-mx51.h>
34 33
35#include <asm/irq.h>
36#include <asm/setup.h> 34#include <asm/setup.h>
37#include <asm/mach-types.h> 35#include <asm/mach-types.h>
38#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
39#include <asm/mach/time.h> 37#include <asm/mach/time.h>
40 38
41#include "devices-imx51.h" 39#include "devices-imx51.h"
42#include "devices.h"
43#include "cpu_op-mx51.h" 40#include "cpu_op-mx51.h"
44 41
45#define USBH1_RST IMX_GPIO_NR(2, 28) 42#define USBH1_RST IMX_GPIO_NR(2, 28)
@@ -108,7 +105,7 @@ static iomux_v3_cfg_t eukrea_cpuimx51sd_pads[] = {
108 105
109 /* Touchscreen */ 106 /* Touchscreen */
110 /* IRQ */ 107 /* IRQ */
111 _MX51_PAD_GPIO_NAND__GPIO_NAND | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP | 108 NEW_PAD_CTRL(MX51_PAD_GPIO_NAND__GPIO_NAND, PAD_CTL_PUS_22K_UP |
112 PAD_CTL_PKE | PAD_CTL_SRE_FAST | 109 PAD_CTL_PKE | PAD_CTL_SRE_FAST |
113 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS), 110 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
114}; 111};
@@ -129,7 +126,7 @@ static struct i2c_board_info eukrea_cpuimx51sd_i2c_devices[] = {
129 I2C_BOARD_INFO("tsc2007", 0x49), 126 I2C_BOARD_INFO("tsc2007", 0x49),
130 .type = "tsc2007", 127 .type = "tsc2007",
131 .platform_data = &tsc2007_info, 128 .platform_data = &tsc2007_info,
132 .irq = gpio_to_irq(TSC2007_IRQGPIO), 129 .irq = IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),
133 }, 130 },
134}; 131};
135 132
@@ -149,7 +146,7 @@ static int initialize_otg_port(struct platform_device *pdev)
149 void __iomem *usb_base; 146 void __iomem *usb_base;
150 void __iomem *usbother_base; 147 void __iomem *usbother_base;
151 148
152 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 149 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
153 if (!usb_base) 150 if (!usb_base)
154 return -ENOMEM; 151 return -ENOMEM;
155 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 152 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -172,7 +169,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
172 void __iomem *usb_base; 169 void __iomem *usb_base;
173 void __iomem *usbother_base; 170 void __iomem *usbother_base;
174 171
175 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 172 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
176 if (!usb_base) 173 if (!usb_base)
177 return -ENOMEM; 174 return -ENOMEM;
178 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 175 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -189,17 +186,17 @@ static int initialize_usbh1_port(struct platform_device *pdev)
189 MXC_EHCI_ITC_NO_THRESHOLD); 186 MXC_EHCI_ITC_NO_THRESHOLD);
190} 187}
191 188
192static struct mxc_usbh_platform_data dr_utmi_config = { 189static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
193 .init = initialize_otg_port, 190 .init = initialize_otg_port,
194 .portsc = MXC_EHCI_UTMI_16BIT, 191 .portsc = MXC_EHCI_UTMI_16BIT,
195}; 192};
196 193
197static struct fsl_usb2_platform_data usb_pdata = { 194static const struct fsl_usb2_platform_data usb_pdata __initconst = {
198 .operating_mode = FSL_USB2_DR_DEVICE, 195 .operating_mode = FSL_USB2_DR_DEVICE,
199 .phy_mode = FSL_USB2_PHY_UTMI_WIDE, 196 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
200}; 197};
201 198
202static struct mxc_usbh_platform_data usbh1_config = { 199static const struct mxc_usbh_platform_data usbh1_config __initconst = {
203 .init = initialize_usbh1_port, 200 .init = initialize_usbh1_port,
204 .portsc = MXC_EHCI_MODE_ULPI, 201 .portsc = MXC_EHCI_MODE_ULPI,
205}; 202};
@@ -245,7 +242,7 @@ static struct spi_board_info cpuimx51sd_spi_device[] = {
245 .mode = SPI_MODE_0, 242 .mode = SPI_MODE_0,
246 .chip_select = 0, 243 .chip_select = 0,
247 .platform_data = &mcp251x_info, 244 .platform_data = &mcp251x_info,
248 .irq = gpio_to_irq(CAN_IRQGPIO) 245 .irq = IMX_GPIO_TO_IRQ(CAN_IRQGPIO)
249 }, 246 },
250}; 247};
251 248
@@ -303,17 +300,17 @@ static void __init eukrea_cpuimx51sd_init(void)
303 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 300 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
304 301
305 if (otg_mode_host) 302 if (otg_mode_host)
306 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 303 imx51_add_mxc_ehci_otg(&dr_utmi_config);
307 else { 304 else {
308 initialize_otg_port(NULL); 305 initialize_otg_port(NULL);
309 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata); 306 imx51_add_fsl_usb2_udc(&usb_pdata);
310 } 307 }
311 308
312 gpio_request(USBH1_RST, "usb_rst"); 309 gpio_request(USBH1_RST, "usb_rst");
313 gpio_direction_output(USBH1_RST, 0); 310 gpio_direction_output(USBH1_RST, 0);
314 msleep(20); 311 msleep(20);
315 gpio_set_value(USBH1_RST, 1); 312 gpio_set_value(USBH1_RST, 1);
316 mxc_register_device(&mxc_usbh1_device, &usbh1_config); 313 imx51_add_mxc_ehci_hs(1, &usbh1_config);
317 314
318#ifdef CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD 315#ifdef CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD
319 eukrea_mbimxsd51_baseboard_init(); 316 eukrea_mbimxsd51_baseboard_init();
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c
index 5f4a168e30ba..067d8c4eb656 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -25,7 +25,6 @@
25#include <mach/3ds_debugboard.h> 25#include <mach/3ds_debugboard.h>
26 26
27#include "devices-imx51.h" 27#include "devices-imx51.h"
28#include "devices.h"
29 28
30#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 6)) 29#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 6))
31#define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) 30#define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28)
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 4bd5e87195b0..4231d984579c 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -24,14 +24,12 @@
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <mach/iomux-mx51.h> 25#include <mach/iomux-mx51.h>
26 26
27#include <asm/irq.h>
28#include <asm/setup.h> 27#include <asm/setup.h>
29#include <asm/mach-types.h> 28#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
31#include <asm/mach/time.h> 30#include <asm/mach/time.h>
32 31
33#include "devices-imx51.h" 32#include "devices-imx51.h"
34#include "devices.h"
35#include "cpu_op-mx51.h" 33#include "cpu_op-mx51.h"
36 34
37#define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7) 35#define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7)
@@ -176,7 +174,7 @@ static const struct imxi2c_platform_data babbage_i2c_data __initconst = {
176 .bitrate = 100000, 174 .bitrate = 100000,
177}; 175};
178 176
179static struct imxi2c_platform_data babbage_hsi2c_data = { 177static const struct imxi2c_platform_data babbage_hsi2c_data __initconst = {
180 .bitrate = 400000, 178 .bitrate = 400000,
181}; 179};
182 180
@@ -249,7 +247,7 @@ static int initialize_otg_port(struct platform_device *pdev)
249 void __iomem *usb_base; 247 void __iomem *usb_base;
250 void __iomem *usbother_base; 248 void __iomem *usbother_base;
251 249
252 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 250 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
253 if (!usb_base) 251 if (!usb_base)
254 return -ENOMEM; 252 return -ENOMEM;
255 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 253 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -272,7 +270,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
272 void __iomem *usb_base; 270 void __iomem *usb_base;
273 void __iomem *usbother_base; 271 void __iomem *usbother_base;
274 272
275 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 273 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
276 if (!usb_base) 274 if (!usb_base)
277 return -ENOMEM; 275 return -ENOMEM;
278 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 276 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -288,17 +286,17 @@ static int initialize_usbh1_port(struct platform_device *pdev)
288 MXC_EHCI_ITC_NO_THRESHOLD); 286 MXC_EHCI_ITC_NO_THRESHOLD);
289} 287}
290 288
291static struct mxc_usbh_platform_data dr_utmi_config = { 289static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
292 .init = initialize_otg_port, 290 .init = initialize_otg_port,
293 .portsc = MXC_EHCI_UTMI_16BIT, 291 .portsc = MXC_EHCI_UTMI_16BIT,
294}; 292};
295 293
296static struct fsl_usb2_platform_data usb_pdata = { 294static const struct fsl_usb2_platform_data usb_pdata __initconst = {
297 .operating_mode = FSL_USB2_DR_DEVICE, 295 .operating_mode = FSL_USB2_DR_DEVICE,
298 .phy_mode = FSL_USB2_PHY_UTMI_WIDE, 296 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
299}; 297};
300 298
301static struct mxc_usbh_platform_data usbh1_config = { 299static const struct mxc_usbh_platform_data usbh1_config __initconst = {
302 .init = initialize_usbh1_port, 300 .init = initialize_usbh1_port,
303 .portsc = MXC_EHCI_MODE_ULPI, 301 .portsc = MXC_EHCI_MODE_ULPI,
304}; 302};
@@ -357,8 +355,8 @@ static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = {
357static void __init mx51_babbage_init(void) 355static void __init mx51_babbage_init(void)
358{ 356{
359 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; 357 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
360 iomux_v3_cfg_t power_key = _MX51_PAD_EIM_A27__GPIO2_21 | 358 iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21,
361 MUX_PAD_CTRL(PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); 359 PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP);
362 360
363 imx51_soc_init(); 361 imx51_soc_init();
364 362
@@ -381,17 +379,17 @@ static void __init mx51_babbage_init(void)
381 379
382 imx51_add_imx_i2c(0, &babbage_i2c_data); 380 imx51_add_imx_i2c(0, &babbage_i2c_data);
383 imx51_add_imx_i2c(1, &babbage_i2c_data); 381 imx51_add_imx_i2c(1, &babbage_i2c_data);
384 mxc_register_device(&mxc_hsi2c_device, &babbage_hsi2c_data); 382 imx51_add_hsi2c(&babbage_hsi2c_data);
385 383
386 if (otg_mode_host) 384 if (otg_mode_host)
387 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 385 imx51_add_mxc_ehci_otg(&dr_utmi_config);
388 else { 386 else {
389 initialize_otg_port(NULL); 387 initialize_otg_port(NULL);
390 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata); 388 imx51_add_fsl_usb2_udc(&usb_pdata);
391 } 389 }
392 390
393 gpio_usbh1_active(); 391 gpio_usbh1_active();
394 mxc_register_device(&mxc_usbh1_device, &usbh1_config); 392 imx51_add_mxc_ehci_hs(1, &usbh1_config);
395 /* setback USBH1_STP to be function */ 393 /* setback USBH1_STP to be function */
396 mxc_iomux_v3_setup_pad(usbh1stp); 394 mxc_iomux_v3_setup_pad(usbh1stp);
397 babbage_usbhub_reset(); 395 babbage_usbhub_reset();
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index 1c2b5e71931a..90ae903aaee7 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -32,14 +32,12 @@
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/iomux-mx51.h> 33#include <mach/iomux-mx51.h>
34 34
35#include <asm/irq.h>
36#include <asm/setup.h> 35#include <asm/setup.h>
37#include <asm/mach-types.h> 36#include <asm/mach-types.h>
38#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
39#include <asm/mach/time.h> 38#include <asm/mach/time.h>
40 39
41#include "devices-imx51.h" 40#include "devices-imx51.h"
42#include "devices.h"
43#include "efika.h" 41#include "efika.h"
44 42
45#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16) 43#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16)
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index b491513e272b..c26508a6708e 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -35,14 +35,12 @@
35#include <mach/hardware.h> 35#include <mach/hardware.h>
36#include <mach/iomux-mx51.h> 36#include <mach/iomux-mx51.h>
37 37
38#include <asm/irq.h>
39#include <asm/setup.h> 38#include <asm/setup.h>
40#include <asm/mach-types.h> 39#include <asm/mach-types.h>
41#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
42#include <asm/mach/time.h> 41#include <asm/mach/time.h>
43 42
44#include "devices-imx51.h" 43#include "devices-imx51.h"
45#include "devices.h"
46#include "efika.h" 44#include "efika.h"
47 45
48#define EFIKASB_USBH2_STP IMX_GPIO_NR(2, 20) 46#define EFIKASB_USBH2_STP IMX_GPIO_NR(2, 20)
@@ -122,7 +120,7 @@ static int initialize_usbh2_port(struct platform_device *pdev)
122 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD); 120 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD);
123} 121}
124 122
125static struct mxc_usbh_platform_data usbh2_config = { 123static struct mxc_usbh_platform_data usbh2_config __initdata = {
126 .init = initialize_usbh2_port, 124 .init = initialize_usbh2_port,
127 .portsc = MXC_EHCI_MODE_ULPI, 125 .portsc = MXC_EHCI_MODE_ULPI,
128}; 126};
@@ -132,7 +130,7 @@ static void __init mx51_efikasb_usb(void)
132 usbh2_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | 130 usbh2_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
133 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND); 131 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND);
134 if (usbh2_config.otg) 132 if (usbh2_config.otg)
135 mxc_register_device(&mxc_usbh2_device, &usbh2_config); 133 imx51_add_mxc_ehci_hs(2, &usbh2_config);
136} 134}
137 135
138static const struct gpio_led mx51_efikasb_leds[] __initconst = { 136static const struct gpio_led mx51_efikasb_leds[] __initconst = {
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
index f58ac83eea28..cb4d753c6c95 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -134,8 +134,8 @@ static struct resource ard_smsc911x_resources[] = {
134 .flags = IORESOURCE_MEM, 134 .flags = IORESOURCE_MEM,
135 }, 135 },
136 { 136 {
137 .start = gpio_to_irq(ARD_ETHERNET_INT_B), 137 .start = IMX_GPIO_TO_IRQ(ARD_ETHERNET_INT_B),
138 .end = gpio_to_irq(ARD_ETHERNET_INT_B), 138 .end = IMX_GPIO_TO_IRQ(ARD_ETHERNET_INT_B),
139 .flags = IORESOURCE_IRQ, 139 .flags = IORESOURCE_IRQ,
140 }, 140 },
141}; 141};
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index afecd78ce203..2b9bd1fabaf9 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1573,7 +1573,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
1573 1573
1574 /* System timer */ 1574 /* System timer */
1575 mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), 1575 mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),
1576 MX51_MXC_INT_GPT); 1576 MX51_INT_GPT);
1577 return 0; 1577 return 0;
1578} 1578}
1579 1579
diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h
index 89fe77ffb4d4..af488bc0e225 100644
--- a/arch/arm/mach-mx5/devices-imx51.h
+++ b/arch/arm/mach-mx5/devices-imx51.h
@@ -13,9 +13,15 @@ extern const struct imx_fec_data imx51_fec_data;
13#define imx51_add_fec(pdata) \ 13#define imx51_add_fec(pdata) \
14 imx_add_fec(&imx51_fec_data, pdata) 14 imx_add_fec(&imx51_fec_data, pdata)
15 15
16extern const struct imx_fsl_usb2_udc_data imx51_fsl_usb2_udc_data;
17#define imx51_add_fsl_usb2_udc(pdata) \
18 imx_add_fsl_usb2_udc(&imx51_fsl_usb2_udc_data, pdata)
19
16extern const struct imx_imx_i2c_data imx51_imx_i2c_data[]; 20extern const struct imx_imx_i2c_data imx51_imx_i2c_data[];
17#define imx51_add_imx_i2c(id, pdata) \ 21#define imx51_add_imx_i2c(id, pdata) \
18 imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata) 22 imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata)
23#define imx51_add_hsi2c(pdata) \
24 imx51_add_imx_i2c(2, pdata)
19 25
20extern const struct imx_imx_ssi_data imx51_imx_ssi_data[]; 26extern const struct imx_imx_ssi_data imx51_imx_ssi_data[];
21#define imx51_add_imx_ssi(id, pdata) \ 27#define imx51_add_imx_ssi(id, pdata) \
@@ -25,6 +31,13 @@ extern const struct imx_imx_uart_1irq_data imx51_imx_uart_data[];
25#define imx51_add_imx_uart(id, pdata) \ 31#define imx51_add_imx_uart(id, pdata) \
26 imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata) 32 imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata)
27 33
34extern const struct imx_mxc_ehci_data imx51_mxc_ehci_otg_data;
35#define imx51_add_mxc_ehci_otg(pdata) \
36 imx_add_mxc_ehci(&imx51_mxc_ehci_otg_data, pdata)
37extern const struct imx_mxc_ehci_data imx51_mxc_ehci_hs_data[];
38#define imx51_add_mxc_ehci_hs(id, pdata) \
39 imx_add_mxc_ehci(&imx51_mxc_ehci_hs_data[id - 1], pdata)
40
28extern const struct imx_mxc_nand_data imx51_mxc_nand_data; 41extern const struct imx_mxc_nand_data imx51_mxc_nand_data;
29#define imx51_add_mxc_nand(pdata) \ 42#define imx51_add_mxc_nand(pdata) \
30 imx_add_mxc_nand(&imx51_mxc_nand_data, pdata) 43 imx_add_mxc_nand(&imx51_mxc_nand_data, pdata)
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
deleted file mode 100644
index 371ca8c8414c..000000000000
--- a/arch/arm/mach-mx5/devices.c
+++ /dev/null
@@ -1,120 +0,0 @@
1/*
2 * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
15#include <mach/hardware.h>
16#include <mach/imx-uart.h>
17#include <mach/irqs.h>
18
19static struct resource mxc_hsi2c_resources[] = {
20 {
21 .start = MX51_HSI2C_DMA_BASE_ADDR,
22 .end = MX51_HSI2C_DMA_BASE_ADDR + SZ_16K - 1,
23 .flags = IORESOURCE_MEM,
24 },
25 {
26 .start = MX51_MXC_INT_HS_I2C,
27 .end = MX51_MXC_INT_HS_I2C,
28 .flags = IORESOURCE_IRQ,
29 },
30};
31
32struct platform_device mxc_hsi2c_device = {
33 .name = "imx-i2c",
34 .id = 2,
35 .num_resources = ARRAY_SIZE(mxc_hsi2c_resources),
36 .resource = mxc_hsi2c_resources
37};
38
39static u64 usb_dma_mask = DMA_BIT_MASK(32);
40
41static struct resource usbotg_resources[] = {
42 {
43 .start = MX51_OTG_BASE_ADDR,
44 .end = MX51_OTG_BASE_ADDR + 0x1ff,
45 .flags = IORESOURCE_MEM,
46 },
47 {
48 .start = MX51_MXC_INT_USB_OTG,
49 .flags = IORESOURCE_IRQ,
50 },
51};
52
53/* OTG gadget device */
54struct platform_device mxc_usbdr_udc_device = {
55 .name = "fsl-usb2-udc",
56 .id = -1,
57 .num_resources = ARRAY_SIZE(usbotg_resources),
58 .resource = usbotg_resources,
59 .dev = {
60 .dma_mask = &usb_dma_mask,
61 .coherent_dma_mask = DMA_BIT_MASK(32),
62 },
63};
64
65struct platform_device mxc_usbdr_host_device = {
66 .name = "mxc-ehci",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(usbotg_resources),
69 .resource = usbotg_resources,
70 .dev = {
71 .dma_mask = &usb_dma_mask,
72 .coherent_dma_mask = DMA_BIT_MASK(32),
73 },
74};
75
76static struct resource usbh1_resources[] = {
77 {
78 .start = MX51_OTG_BASE_ADDR + 0x200,
79 .end = MX51_OTG_BASE_ADDR + 0x200 + 0x1ff,
80 .flags = IORESOURCE_MEM,
81 },
82 {
83 .start = MX51_MXC_INT_USB_H1,
84 .flags = IORESOURCE_IRQ,
85 },
86};
87
88struct platform_device mxc_usbh1_device = {
89 .name = "mxc-ehci",
90 .id = 1,
91 .num_resources = ARRAY_SIZE(usbh1_resources),
92 .resource = usbh1_resources,
93 .dev = {
94 .dma_mask = &usb_dma_mask,
95 .coherent_dma_mask = DMA_BIT_MASK(32),
96 },
97};
98
99static struct resource usbh2_resources[] = {
100 {
101 .start = MX51_OTG_BASE_ADDR + 0x400,
102 .end = MX51_OTG_BASE_ADDR + 0x400 + 0x1ff,
103 .flags = IORESOURCE_MEM,
104 },
105 {
106 .start = MX51_MXC_INT_USB_H2,
107 .flags = IORESOURCE_IRQ,
108 },
109};
110
111struct platform_device mxc_usbh2_device = {
112 .name = "mxc-ehci",
113 .id = 2,
114 .num_resources = ARRAY_SIZE(usbh2_resources),
115 .resource = usbh2_resources,
116 .dev = {
117 .dma_mask = &usb_dma_mask,
118 .coherent_dma_mask = DMA_BIT_MASK(32),
119 },
120};
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
deleted file mode 100644
index 55a5129bc29f..000000000000
--- a/arch/arm/mach-mx5/devices.h
+++ /dev/null
@@ -1,5 +0,0 @@
1extern struct platform_device mxc_usbdr_host_device;
2extern struct platform_device mxc_usbh1_device;
3extern struct platform_device mxc_usbh2_device;
4extern struct platform_device mxc_usbdr_udc_device;
5extern struct platform_device mxc_hsi2c_device;
diff --git a/arch/arm/mach-mx5/ehci.c b/arch/arm/mach-mx5/ehci.c
index 7ce12c804a32..c17fa131728b 100644
--- a/arch/arm/mach-mx5/ehci.c
+++ b/arch/arm/mach-mx5/ehci.c
@@ -52,7 +52,7 @@ int mx51_initialize_usb_hw(int port, unsigned int flags)
52 void __iomem *usbother_base; 52 void __iomem *usbother_base;
53 int ret = 0; 53 int ret = 0;
54 54
55 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 55 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
56 if (!usb_base) { 56 if (!usb_base) {
57 printk(KERN_ERR "%s(): ioremap failed\n", __func__); 57 printk(KERN_ERR "%s(): ioremap failed\n", __func__);
58 return -ENOMEM; 58 return -ENOMEM;
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
index bbf4564bd050..a6a3ab8f1b1c 100644
--- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
@@ -28,7 +28,6 @@
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29 29
30#include "devices-imx51.h" 30#include "devices-imx51.h"
31#include "devices.h"
32 31
33#define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30) 32#define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30)
34#define MBIMX51_LED0 IMX_GPIO_NR(3, 5) 33#define MBIMX51_LED0 IMX_GPIO_NR(3, 5)
@@ -160,7 +159,7 @@ struct tsc2007_platform_data tsc2007_data = {
160static struct i2c_board_info mbimx51_i2c_devices[] = { 159static struct i2c_board_info mbimx51_i2c_devices[] = {
161 { 160 {
162 I2C_BOARD_INFO("tsc2007", 0x49), 161 I2C_BOARD_INFO("tsc2007", 0x49),
163 .irq = gpio_to_irq(MBIMX51_TSC2007_GPIO), 162 .irq = IMX_GPIO_TO_IRQ(MBIMX51_TSC2007_GPIO),
164 .platform_data = &tsc2007_data, 163 .platform_data = &tsc2007_data,
165 }, { 164 }, {
166 I2C_BOARD_INFO("tlv320aic23", 0x1a), 165 I2C_BOARD_INFO("tlv320aic23", 0x1a),
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
index 261923997643..d817fc80b986 100644
--- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
@@ -24,7 +24,6 @@
24 24
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/irq.h>
28#include <linux/leds.h> 27#include <linux/leds.h>
29#include <linux/platform_device.h> 28#include <linux/platform_device.h>
30#include <linux/input.h> 29#include <linux/input.h>
@@ -41,13 +40,12 @@
41#include <mach/audmux.h> 40#include <mach/audmux.h>
42 41
43#include "devices-imx51.h" 42#include "devices-imx51.h"
44#include "devices.h"
45 43
46static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { 44static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
47 /* LED */ 45 /* LED */
48 MX51_PAD_NANDF_D10__GPIO3_30, 46 MX51_PAD_NANDF_D10__GPIO3_30,
49 /* SWITCH */ 47 /* SWITCH */
50 _MX51_PAD_NANDF_D9__GPIO3_31 | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP | 48 NEW_PAD_CTRL(MX51_PAD_NANDF_D9__GPIO3_31, PAD_CTL_PUS_22K_UP |
51 PAD_CTL_PKE | PAD_CTL_SRE_FAST | 49 PAD_CTL_PKE | PAD_CTL_SRE_FAST |
52 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS), 50 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
53 /* UART2 */ 51 /* UART2 */
@@ -66,7 +64,7 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
66 MX51_PAD_SD1_DATA2__SD1_DATA2, 64 MX51_PAD_SD1_DATA2__SD1_DATA2,
67 MX51_PAD_SD1_DATA3__SD1_DATA3, 65 MX51_PAD_SD1_DATA3__SD1_DATA3,
68 /* SD1 CD */ 66 /* SD1 CD */
69 _MX51_PAD_GPIO1_0__SD1_CD | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP | 67 NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_PUS_22K_UP |
70 PAD_CTL_PKE | PAD_CTL_SRE_FAST | 68 PAD_CTL_PKE | PAD_CTL_SRE_FAST |
71 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS), 69 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
72}; 70};
diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c
deleted file mode 100644
index 77e374c726fa..000000000000
--- a/arch/arm/mach-mx5/mm-mx50.c
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 * Create static mapping between physical to virtual memory.
19 */
20
21#include <linux/mm.h>
22#include <linux/init.h>
23
24#include <asm/mach/map.h>
25
26#include <mach/hardware.h>
27#include <mach/common.h>
28#include <mach/iomux-v3.h>
29#include <mach/irqs.h>
30
31/*
32 * Define the MX50 memory map.
33 */
34static struct map_desc mx50_io_desc[] __initdata = {
35 imx_map_entry(MX50, TZIC, MT_DEVICE),
36 imx_map_entry(MX50, SPBA0, MT_DEVICE),
37 imx_map_entry(MX50, AIPS1, MT_DEVICE),
38 imx_map_entry(MX50, AIPS2, MT_DEVICE),
39};
40
41/*
42 * This function initializes the memory map. It is called during the
43 * system startup to create static physical to virtual memory mappings
44 * for the IO modules.
45 */
46void __init mx50_map_io(void)
47{
48 iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc));
49}
50
51void __init imx50_init_early(void)
52{
53 mxc_set_cpu_type(MXC_CPU_MX50);
54 mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR));
55 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
56}
57
58void __init mx50_init_irq(void)
59{
60 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
61}
62
63void __init imx50_soc_init(void)
64{
65 /* i.mx50 has the i.mx31 type gpio */
66 mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
67 mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
68 mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
69 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
70 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
71 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
72}
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index baea6e5cddd9..26eacc9d0d90 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -21,12 +21,27 @@
21#include <mach/devices-common.h> 21#include <mach/devices-common.h>
22#include <mach/iomux-v3.h> 22#include <mach/iomux-v3.h>
23 23
24static void imx5_idle(void)
25{
26 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
27}
28
29/*
30 * Define the MX50 memory map.
31 */
32static struct map_desc mx50_io_desc[] __initdata = {
33 imx_map_entry(MX50, TZIC, MT_DEVICE),
34 imx_map_entry(MX50, SPBA0, MT_DEVICE),
35 imx_map_entry(MX50, AIPS1, MT_DEVICE),
36 imx_map_entry(MX50, AIPS2, MT_DEVICE),
37};
38
24/* 39/*
25 * Define the MX51 memory map. 40 * Define the MX51 memory map.
26 */ 41 */
27static struct map_desc mx51_io_desc[] __initdata = { 42static struct map_desc mx51_io_desc[] __initdata = {
43 imx_map_entry(MX51, TZIC, MT_DEVICE),
28 imx_map_entry(MX51, IRAM, MT_DEVICE), 44 imx_map_entry(MX51, IRAM, MT_DEVICE),
29 imx_map_entry(MX51, DEBUG, MT_DEVICE),
30 imx_map_entry(MX51, AIPS1, MT_DEVICE), 45 imx_map_entry(MX51, AIPS1, MT_DEVICE),
31 imx_map_entry(MX51, SPBA0, MT_DEVICE), 46 imx_map_entry(MX51, SPBA0, MT_DEVICE),
32 imx_map_entry(MX51, AIPS2, MT_DEVICE), 47 imx_map_entry(MX51, AIPS2, MT_DEVICE),
@@ -36,6 +51,7 @@ static struct map_desc mx51_io_desc[] __initdata = {
36 * Define the MX53 memory map. 51 * Define the MX53 memory map.
37 */ 52 */
38static struct map_desc mx53_io_desc[] __initdata = { 53static struct map_desc mx53_io_desc[] __initdata = {
54 imx_map_entry(MX53, TZIC, MT_DEVICE),
39 imx_map_entry(MX53, AIPS1, MT_DEVICE), 55 imx_map_entry(MX53, AIPS1, MT_DEVICE),
40 imx_map_entry(MX53, SPBA0, MT_DEVICE), 56 imx_map_entry(MX53, SPBA0, MT_DEVICE),
41 imx_map_entry(MX53, AIPS2, MT_DEVICE), 57 imx_map_entry(MX53, AIPS2, MT_DEVICE),
@@ -46,21 +62,34 @@ static struct map_desc mx53_io_desc[] __initdata = {
46 * system startup to create static physical to virtual memory mappings 62 * system startup to create static physical to virtual memory mappings
47 * for the IO modules. 63 * for the IO modules.
48 */ 64 */
65void __init mx50_map_io(void)
66{
67 iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc));
68}
69
49void __init mx51_map_io(void) 70void __init mx51_map_io(void)
50{ 71{
51 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc)); 72 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
52} 73}
53 74
75void __init mx53_map_io(void)
76{
77 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
78}
79
80void __init imx50_init_early(void)
81{
82 mxc_set_cpu_type(MXC_CPU_MX50);
83 mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR));
84 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
85}
86
54void __init imx51_init_early(void) 87void __init imx51_init_early(void)
55{ 88{
56 mxc_set_cpu_type(MXC_CPU_MX51); 89 mxc_set_cpu_type(MXC_CPU_MX51);
57 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); 90 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
58 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); 91 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
59} 92 imx_idle = imx5_idle;
60
61void __init mx53_map_io(void)
62{
63 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
64} 93}
65 94
66void __init imx53_init_early(void) 95void __init imx53_init_early(void)
@@ -70,35 +99,19 @@ void __init imx53_init_early(void)
70 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); 99 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
71} 100}
72 101
73void __init mx51_init_irq(void) 102void __init mx50_init_irq(void)
74{ 103{
75 unsigned long tzic_addr; 104 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
76 void __iomem *tzic_virt; 105}
77
78 if (mx51_revision() < IMX_CHIP_REVISION_2_0)
79 tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
80 else
81 tzic_addr = MX51_TZIC_BASE_ADDR;
82
83 tzic_virt = ioremap(tzic_addr, SZ_16K);
84 if (!tzic_virt)
85 panic("unable to map TZIC interrupt controller\n");
86 106
87 tzic_init_irq(tzic_virt); 107void __init mx51_init_irq(void)
108{
109 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
88} 110}
89 111
90void __init mx53_init_irq(void) 112void __init mx53_init_irq(void)
91{ 113{
92 unsigned long tzic_addr; 114 tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR));
93 void __iomem *tzic_virt;
94
95 tzic_addr = MX53_TZIC_BASE_ADDR;
96
97 tzic_virt = ioremap(tzic_addr, SZ_16K);
98 if (!tzic_virt)
99 panic("unable to map TZIC interrupt controller\n");
100
101 tzic_init_irq(tzic_virt);
102} 115}
103 116
104static struct sdma_script_start_addrs imx51_sdma_script __initdata = { 117static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
@@ -138,13 +151,24 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = {
138 .script_addrs = &imx53_sdma_script, 151 .script_addrs = &imx53_sdma_script,
139}; 152};
140 153
154void __init imx50_soc_init(void)
155{
156 /* i.mx50 has the i.mx31 type gpio */
157 mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
158 mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
159 mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
160 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
161 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
162 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
163}
164
141void __init imx51_soc_init(void) 165void __init imx51_soc_init(void)
142{ 166{
143 /* i.mx51 has the i.mx31 type gpio */ 167 /* i.mx51 has the i.mx31 type gpio */
144 mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); 168 mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
145 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); 169 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
146 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); 170 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH);
147 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); 171 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH);
148 172
149 /* i.mx51 has the i.mx35 type sdma */ 173 /* i.mx51 has the i.mx35 type sdma */
150 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); 174 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
index 9dc3a869033c..b004e178417d 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -34,14 +34,12 @@
34#include <linux/usb/ulpi.h> 34#include <linux/usb/ulpi.h>
35#include <mach/ulpi.h> 35#include <mach/ulpi.h>
36 36
37#include <asm/irq.h>
38#include <asm/setup.h> 37#include <asm/setup.h>
39#include <asm/mach-types.h> 38#include <asm/mach-types.h>
40#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
41#include <asm/mach/time.h> 40#include <asm/mach/time.h>
42 41
43#include "devices-imx51.h" 42#include "devices-imx51.h"
44#include "devices.h"
45#include "efika.h" 43#include "efika.h"
46#include "cpu_op-mx51.h" 44#include "cpu_op-mx51.h"
47 45
@@ -133,7 +131,7 @@ static int initialize_otg_port(struct platform_device *pdev)
133 u32 v; 131 u32 v;
134 void __iomem *usb_base; 132 void __iomem *usb_base;
135 void __iomem *usbother_base; 133 void __iomem *usbother_base;
136 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 134 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
137 if (!usb_base) 135 if (!usb_base)
138 return -ENOMEM; 136 return -ENOMEM;
139 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); 137 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
@@ -150,7 +148,7 @@ static int initialize_otg_port(struct platform_device *pdev)
150 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY); 148 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
151} 149}
152 150
153static struct mxc_usbh_platform_data dr_utmi_config = { 151static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
154 .init = initialize_otg_port, 152 .init = initialize_otg_port,
155 .portsc = MXC_EHCI_UTMI_16BIT, 153 .portsc = MXC_EHCI_UTMI_16BIT,
156}; 154};
@@ -170,7 +168,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
170 gpio_set_value(EFIKAMX_USBH1_STP, 1); 168 gpio_set_value(EFIKAMX_USBH1_STP, 1);
171 msleep(1); 169 msleep(1);
172 170
173 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 171 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
174 socregs_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); 172 socregs_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
175 173
176 /* The clock for the USBH1 ULPI port will come externally */ 174 /* The clock for the USBH1 ULPI port will come externally */
@@ -189,7 +187,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
189 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD); 187 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD);
190} 188}
191 189
192static struct mxc_usbh_platform_data usbh1_config = { 190static struct mxc_usbh_platform_data usbh1_config __initdata = {
193 .init = initialize_usbh1_port, 191 .init = initialize_usbh1_port,
194 .portsc = MXC_EHCI_MODE_ULPI, 192 .portsc = MXC_EHCI_MODE_ULPI,
195}; 193};
@@ -217,9 +215,9 @@ static void __init mx51_efika_usb(void)
217 usbh1_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | 215 usbh1_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
218 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND); 216 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND);
219 217
220 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 218 imx51_add_mxc_ehci_otg(&dr_utmi_config);
221 if (usbh1_config.otg) 219 if (usbh1_config.otg)
222 mxc_register_device(&mxc_usbh1_device, &usbh1_config); 220 imx51_add_mxc_ehci_hs(1, &usbh1_config);
223} 221}
224 222
225static struct mtd_partition mx51_efika_spi_nor_partitions[] = { 223static struct mtd_partition mx51_efika_spi_nor_partitions[] = {
@@ -589,7 +587,7 @@ static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
589 .bus_num = 0, 587 .bus_num = 0,
590 .chip_select = 0, 588 .chip_select = 0,
591 .platform_data = &mx51_efika_mc13892_data, 589 .platform_data = &mx51_efika_mc13892_data,
592 .irq = gpio_to_irq(EFIKAMX_PMIC), 590 .irq = IMX_GPIO_TO_IRQ(EFIKAMX_PMIC),
593 }, 591 },
594}; 592};
595 593
@@ -632,4 +630,3 @@ void __init efika_board_common_init(void)
632 get_cpu_op = mx51_get_cpu_op; 630 get_cpu_op = mx51_get_cpu_op;
633#endif 631#endif
634} 632}
635
diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c
index be19e9ce839a..0624fb8edffb 100644
--- a/arch/arm/mach-mx5/pm-imx5.c
+++ b/arch/arm/mach-mx5/pm-imx5.c
@@ -14,18 +14,15 @@
14#include <linux/err.h> 14#include <linux/err.h>
15#include <asm/cacheflush.h> 15#include <asm/cacheflush.h>
16#include <asm/tlbflush.h> 16#include <asm/tlbflush.h>
17#include <mach/system.h> 17#include <mach/common.h>
18#include <mach/hardware.h>
18#include "crm_regs.h" 19#include "crm_regs.h"
19 20
20static struct clk *gpc_dvfs_clk; 21static struct clk *gpc_dvfs_clk;
21 22
22static int mx5_suspend_prepare(void)
23{
24 return clk_enable(gpc_dvfs_clk);
25}
26
27static int mx5_suspend_enter(suspend_state_t state) 23static int mx5_suspend_enter(suspend_state_t state)
28{ 24{
25 clk_enable(gpc_dvfs_clk);
29 switch (state) { 26 switch (state) {
30 case PM_SUSPEND_MEM: 27 case PM_SUSPEND_MEM:
31 mx5_cpu_lp_set(STOP_POWER_OFF); 28 mx5_cpu_lp_set(STOP_POWER_OFF);
@@ -46,12 +43,9 @@ static int mx5_suspend_enter(suspend_state_t state)
46 __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR); 43 __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
47 } 44 }
48 cpu_do_idle(); 45 cpu_do_idle();
49 return 0;
50}
51
52static void mx5_suspend_finish(void)
53{
54 clk_disable(gpc_dvfs_clk); 46 clk_disable(gpc_dvfs_clk);
47
48 return 0;
55} 49}
56 50
57static int mx5_pm_valid(suspend_state_t state) 51static int mx5_pm_valid(suspend_state_t state)
@@ -61,9 +55,7 @@ static int mx5_pm_valid(suspend_state_t state)
61 55
62static const struct platform_suspend_ops mx5_suspend_ops = { 56static const struct platform_suspend_ops mx5_suspend_ops = {
63 .valid = mx5_pm_valid, 57 .valid = mx5_pm_valid,
64 .prepare = mx5_suspend_prepare,
65 .enter = mx5_suspend_enter, 58 .enter = mx5_suspend_enter,
66 .finish = mx5_suspend_finish,
67}; 59};
68 60
69static int __init mx5_pm_init(void) 61static int __init mx5_pm_init(void)
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
index 76ae8dc33e00..144ebebc4a61 100644
--- a/arch/arm/mach-mx5/system.c
+++ b/arch/arm/mach-mx5/system.c
@@ -13,6 +13,7 @@
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <mach/hardware.h> 15#include <mach/hardware.h>
16#include <mach/common.h>
16#include "crm_regs.h" 17#include "crm_regs.h"
17 18
18/* set cpu low power mode before WFI instruction. This function is called 19/* set cpu low power mode before WFI instruction. This function is called