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authorFabio Estevam <fabio.estevam@freescale.com>2011-03-25 11:52:47 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-05-19 07:11:00 -0400
commit2d95378b043f082192a11f8476e3f63291c3477b (patch)
treecbbff497f70ab4863362bed263b1e59e697599c3 /arch/arm/mach-mx5
parent0575b4b83edb0a766a9c1518a5da57780f386340 (diff)
ARM: mx53: Print silicon revision on boot
Having the silicon revision to appear on the boot log is a useful information. MX31, MX35 and MX51 already show the silicon revision on boot. Add support for displaying such information for MX53 as well. Tested on a mx53loco board, where it shows: CPU identified as i.MX53, silicon rev 2.0 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> LAKML-Reference: 1301068367-18937-1-git-send-email-fabio.estevam@freescale.com Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c1
-rw-r--r--arch/arm/mach-mx5/cpu.c23
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index fdbc05ed5513..6b89c1bf4eb2 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1563,6 +1563,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
1563 clk_enable(&iim_clk); 1563 clk_enable(&iim_clk);
1564 mx53_revision(); 1564 mx53_revision();
1565 clk_disable(&iim_clk); 1565 clk_disable(&iim_clk);
1566 mx53_display_revision();
1566 1567
1567 /* Set SDHC parents to be PLL2 */ 1568 /* Set SDHC parents to be PLL2 */
1568 clk_set_parent(&esdhc1_clk, &pll2_sw_clk); 1569 clk_set_parent(&esdhc1_clk, &pll2_sw_clk);
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 472bdfab2e55..86f87da59c64 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -166,6 +166,29 @@ int mx50_revision(void)
166} 166}
167EXPORT_SYMBOL(mx50_revision); 167EXPORT_SYMBOL(mx50_revision);
168 168
169void mx53_display_revision(void)
170{
171 int rev;
172 char *srev;
173 rev = mx53_revision();
174
175 switch (rev) {
176 case IMX_CHIP_REVISION_1_0:
177 srev = IMX_CHIP_REVISION_1_0_STRING;
178 break;
179 case IMX_CHIP_REVISION_2_0:
180 srev = IMX_CHIP_REVISION_2_0_STRING;
181 break;
182 case IMX_CHIP_REVISION_2_1:
183 srev = IMX_CHIP_REVISION_2_1_STRING;
184 break;
185 default:
186 srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
187 }
188 printk(KERN_INFO "CPU identified as i.MX53, silicon rev %s\n", srev);
189}
190EXPORT_SYMBOL(mx53_display_revision);
191
169static int __init post_cpu_init(void) 192static int __init post_cpu_init(void)
170{ 193{
171 unsigned int reg; 194 unsigned int reg;