mx5: Add registration of GPIOs for MX5 devices

Register the gpio irqs on Freescale's MX51 Babbage HW.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 31 insertions, 2 deletions

diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
index d6fd3961ade9..5070ae1f94c6 100644
--- a/arch/arm/mach-mx5/devices.c
+++ b/arch/arm/mach-mx5/devices.c
@@ -1,5 +1,6 @@
 /*
  * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
+ * Copyright (C) 2010 Freescale Semiconductor, Inc.
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
@@ -10,8 +11,10 @@
  */
 
 #include <linux/platform_device.h>
+#include <linux/gpio.h>
 #include <mach/hardware.h>
 #include <mach/imx-uart.h>
+#include <mach/irqs.h>
 
 static struct resource uart0[] = {
         {
@@ -89,8 +92,34 @@ struct platform_device mxc_fec_device = {
         .resource = mxc_fec_resources,
 };
 
-/* Dummy definition to allow compiling in AVIC and TZIC simultaneously */
+static struct mxc_gpio_port mxc_gpio_ports[] = {
+        {
+                .chip.label = "gpio-0",
+                .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR),
+                .irq = MX51_MXC_INT_GPIO1_LOW,
+                .virtual_irq_start = MXC_GPIO_IRQ_START
+        },
+        {
+                .chip.label = "gpio-1",
+                .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR),
+                .irq = MX51_MXC_INT_GPIO2_LOW,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1
+        },
+        {
+                .chip.label = "gpio-2",
+                .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR),
+                .irq = MX51_MXC_INT_GPIO3_LOW,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2
+        },
+        {
+                .chip.label = "gpio-3",
+                .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR),
+                .irq = MX51_MXC_INT_GPIO4_LOW,
+                .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
+        },
+};
+
 int __init mxc_register_gpios(void)
 {
-        return 0;
+        return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
 }