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authorDinh Nguyen <Dinh.Nguyen@freescale.com>2010-11-15 12:29:59 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2010-11-24 04:09:04 -0500
commitc0abefd30b2c9db015df4914a95d268ecdb39b00 (patch)
tree810c6f6e8e00604a78379424a6aae2140d7fadd5 /arch/arm/mach-mx5/mm.c
parent374daa4f9019f75da1addb3f31a22df1966a5baa (diff)
ARM: imx: Add core definitions for MX53
Add iomux, clocks, and memory map for Freescale's MX53 SoC. Add cpu_is_mx53 function to common.h. Add 3 more banks of gpio's to mxc_gpio_ports. Add MX53 phys offset address. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5/mm.c')
-rw-r--r--arch/arm/mach-mx5/mm.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 01dff26c1007..2822d0e6f23a 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -63,3 +63,20 @@ void __init mx51_init_irq(void)
63 tzic_init_irq(tzic_virt); 63 tzic_init_irq(tzic_virt);
64 imx51_register_gpios(); 64 imx51_register_gpios();
65} 65}
66
67int imx53_register_gpios(void);
68
69void __init mx53_init_irq(void)
70{
71 unsigned long tzic_addr;
72 void __iomem *tzic_virt;
73
74 tzic_addr = MX53_TZIC_BASE_ADDR;
75
76 tzic_virt = ioremap(tzic_addr, SZ_16K);
77 if (!tzic_virt)
78 panic("unable to map TZIC interrupt controller\n");
79
80 tzic_init_irq(tzic_virt);
81 imx53_register_gpios();
82}