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authorArnaud Patard (Rtp) <arnaud.patard@rtp-net.org>2010-11-26 09:20:52 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2010-12-03 05:05:16 -0500
commit96886c4361f1ae3f6c775d7c9295e2d557101d0f (patch)
treef3101c9303ed759ab5660985291366619a8e8fd9 /arch/arm/mach-mx5/board-mx51_efikamx.c
parentb99545cb59dc0a55507100a1335f4fd0ed521032 (diff)
iMX51: introduce IMX_GPIO_NR
Currently, to define a GPIO number, we're using something like : #define EFIKAMX_PCBID0 (2*32 + 16) to define GPIO 3 16. This is not really readable and it's error prone imho (note the 3 vs 2). So, I'm introducing a new macro to define this in a better way. Now, the code sample become : #define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16) v2: - move to gpio.h - add parens & spaces - switch to IMX_GPIO_NR instead of MX51_GPIO_NR Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Cc: Amit Kucheria <amit.kucheria@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Eric BĂ©nard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5/board-mx51_efikamx.c')
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikamx.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index 3a4607bb79b5..5ab21a0036c1 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -43,22 +43,22 @@
43 43
44#define MX51_USB_PLL_DIV_24_MHZ 0x01 44#define MX51_USB_PLL_DIV_24_MHZ 0x01
45 45
46#define EFIKAMX_PCBID0 (2*32 + 16) 46#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16)
47#define EFIKAMX_PCBID1 (2*32 + 17) 47#define EFIKAMX_PCBID1 IMX_GPIO_NR(3, 17)
48#define EFIKAMX_PCBID2 (2*32 + 11) 48#define EFIKAMX_PCBID2 IMX_GPIO_NR(3, 11)
49 49
50#define EFIKAMX_BLUE_LED (2*32 + 13) 50#define EFIKAMX_BLUE_LED IMX_GPIO_NR(3, 13)
51#define EFIKAMX_GREEN_LED (2*32 + 14) 51#define EFIKAMX_GREEN_LED IMX_GPIO_NR(3, 14)
52#define EFIKAMX_RED_LED (2*32 + 15) 52#define EFIKAMX_RED_LED IMX_GPIO_NR(3, 15)
53 53
54#define EFIKAMX_POWER_KEY (1*32 + 31) 54#define EFIKAMX_POWER_KEY IMX_GPIO_NR(2, 31)
55 55
56#define EFIKAMX_SPI_CS0 (3*32 + 24) 56#define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24)
57#define EFIKAMX_SPI_CS1 (3*32 + 25) 57#define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25)
58 58
59/* board 1.1 doesn't have same reset gpio */ 59/* board 1.1 doesn't have same reset gpio */
60#define EFIKAMX_RESET1_1 (2*32 + 2) 60#define EFIKAMX_RESET1_1 IMX_GPIO_NR(3, 2)
61#define EFIKAMX_RESET (0*32 + 4) 61#define EFIKAMX_RESET IMX_GPIO_NR(1, 4)
62 62
63/* the pci ids pin have pull up. they're driven low according to board id */ 63/* the pci ids pin have pull up. they're driven low according to board id */
64#define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP) 64#define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)