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authorArnd Bergmann <arnd@arndb.de>2011-10-07 15:57:31 -0400
committerArnd Bergmann <arnd@arndb.de>2011-10-07 15:57:31 -0400
commit526b264163068f77c5f2409031f5e25caf3900a9 (patch)
tree196e7581f1546e48ba392ff099f369e5c622636b /arch/arm/mach-mx5/board-cpuimx51.c
parent4c4cbce68f57555cddb9d77da333bf50875148ce (diff)
parent05d900c9d8ce536c6792efb323c82b1c97b54bf9 (diff)
Merge branch 'imx/cleanup' into imx/devel
This helps resolve the conflicts between the imx cleanups and the new code that has gone into the imx tree. Conflict resolution was originally done by Sascha Hauer. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-mx5/board-cpuimx51.c')
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51.c27
1 files changed, 12 insertions, 15 deletions
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index a7a6682560b7..e28d0e165e5c 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -22,21 +22,18 @@
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/irq.h>
26 25
27#include <mach/eukrea-baseboards.h> 26#include <mach/eukrea-baseboards.h>
28#include <mach/common.h> 27#include <mach/common.h>
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30#include <mach/iomux-mx51.h> 29#include <mach/iomux-mx51.h>
31 30
32#include <asm/irq.h>
33#include <asm/setup.h> 31#include <asm/setup.h>
34#include <asm/mach-types.h> 32#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
36#include <asm/mach/time.h> 34#include <asm/mach/time.h>
37 35
38#include "devices-imx51.h" 36#include "devices-imx51.h"
39#include "devices.h"
40 37
41#define CPUIMX51_USBH1_STP IMX_GPIO_NR(1, 27) 38#define CPUIMX51_USBH1_STP IMX_GPIO_NR(1, 27)
42#define CPUIMX51_QUARTA_GPIO IMX_GPIO_NR(3, 28) 39#define CPUIMX51_QUARTA_GPIO IMX_GPIO_NR(3, 28)
@@ -57,7 +54,7 @@
57static struct plat_serial8250_port serial_platform_data[] = { 54static struct plat_serial8250_port serial_platform_data[] = {
58 { 55 {
59 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000), 56 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),
60 .irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO), 57 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTA_GPIO),
61 .irqflags = IRQF_TRIGGER_HIGH, 58 .irqflags = IRQF_TRIGGER_HIGH,
62 .uartclk = CPUIMX51_QUART_XTAL, 59 .uartclk = CPUIMX51_QUART_XTAL,
63 .regshift = CPUIMX51_QUART_REGSHIFT, 60 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -65,7 +62,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
65 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 62 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
66 }, { 63 }, {
67 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000), 64 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),
68 .irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO), 65 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTB_GPIO),
69 .irqflags = IRQF_TRIGGER_HIGH, 66 .irqflags = IRQF_TRIGGER_HIGH,
70 .uartclk = CPUIMX51_QUART_XTAL, 67 .uartclk = CPUIMX51_QUART_XTAL,
71 .regshift = CPUIMX51_QUART_REGSHIFT, 68 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -73,7 +70,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
73 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 70 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
74 }, { 71 }, {
75 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000), 72 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),
76 .irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO), 73 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTC_GPIO),
77 .irqflags = IRQF_TRIGGER_HIGH, 74 .irqflags = IRQF_TRIGGER_HIGH,
78 .uartclk = CPUIMX51_QUART_XTAL, 75 .uartclk = CPUIMX51_QUART_XTAL,
79 .regshift = CPUIMX51_QUART_REGSHIFT, 76 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -81,7 +78,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
81 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 78 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
82 }, { 79 }, {
83 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), 80 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
84 .irq = gpio_to_irq(CPUIMX51_QUARTD_GPIO), 81 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTD_GPIO),
85 .irqflags = IRQF_TRIGGER_HIGH, 82 .irqflags = IRQF_TRIGGER_HIGH,
86 .uartclk = CPUIMX51_QUART_XTAL, 83 .uartclk = CPUIMX51_QUART_XTAL,
87 .regshift = CPUIMX51_QUART_REGSHIFT, 84 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -167,7 +164,7 @@ static int initialize_otg_port(struct platform_device *pdev)
167 void __iomem *usb_base; 164 void __iomem *usb_base;
168 void __iomem *usbother_base; 165 void __iomem *usbother_base;
169 166
170 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 167 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
171 if (!usb_base) 168 if (!usb_base)
172 return -ENOMEM; 169 return -ENOMEM;
173 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 170 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -190,7 +187,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
190 void __iomem *usb_base; 187 void __iomem *usb_base;
191 void __iomem *usbother_base; 188 void __iomem *usbother_base;
192 189
193 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 190 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
194 if (!usb_base) 191 if (!usb_base)
195 return -ENOMEM; 192 return -ENOMEM;
196 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 193 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -206,17 +203,17 @@ static int initialize_usbh1_port(struct platform_device *pdev)
206 MXC_EHCI_ITC_NO_THRESHOLD); 203 MXC_EHCI_ITC_NO_THRESHOLD);
207} 204}
208 205
209static struct mxc_usbh_platform_data dr_utmi_config = { 206static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
210 .init = initialize_otg_port, 207 .init = initialize_otg_port,
211 .portsc = MXC_EHCI_UTMI_16BIT, 208 .portsc = MXC_EHCI_UTMI_16BIT,
212}; 209};
213 210
214static struct fsl_usb2_platform_data usb_pdata = { 211static const struct fsl_usb2_platform_data usb_pdata __initconst = {
215 .operating_mode = FSL_USB2_DR_DEVICE, 212 .operating_mode = FSL_USB2_DR_DEVICE,
216 .phy_mode = FSL_USB2_PHY_UTMI_WIDE, 213 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
217}; 214};
218 215
219static struct mxc_usbh_platform_data usbh1_config = { 216static const struct mxc_usbh_platform_data usbh1_config __initconst = {
220 .init = initialize_usbh1_port, 217 .init = initialize_usbh1_port,
221 .portsc = MXC_EHCI_MODE_ULPI, 218 .portsc = MXC_EHCI_MODE_ULPI,
222}; 219};
@@ -270,12 +267,12 @@ static void __init eukrea_cpuimx51_init(void)
270 ARRAY_SIZE(eukrea_cpuimx51_i2c_devices)); 267 ARRAY_SIZE(eukrea_cpuimx51_i2c_devices));
271 268
272 if (otg_mode_host) 269 if (otg_mode_host)
273 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 270 imx51_add_mxc_ehci_otg(&dr_utmi_config);
274 else { 271 else {
275 initialize_otg_port(NULL); 272 initialize_otg_port(NULL);
276 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata); 273 imx51_add_fsl_usb2_udc(&usb_pdata);
277 } 274 }
278 mxc_register_device(&mxc_usbh1_device, &usbh1_config); 275 imx51_add_mxc_ehci_hs(1, &usbh1_config);
279 276
280#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD 277#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD
281 eukrea_mbimx51_baseboard_init(); 278 eukrea_mbimx51_baseboard_init();