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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-09-01 05:08:50 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-09-01 05:08:50 -0400
commitb6d17c1a8e64e8b7f58dde3d353de664a492908a (patch)
tree160c175e9c3ab65a7221effadee78eba24e7d2f4 /arch/arm/mach-mx3
parent1fd317076caf1ee22ddb6a7853a0ca462f0233c5 (diff)
parent14f0f512ba6f4eccc9b7cf67be47439ed2917afb (diff)
Merge branch 'imx-for-2.6.36' of git://git.pengutronix.de/git/imx/linux-2.6
Diffstat (limited to 'arch/arm/mach-mx3')
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c77
-rw-r--r--arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c2
-rw-r--r--arch/arm/mach-mx3/mach-cpuimx35.c4
3 files changed, 58 insertions, 25 deletions
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index d3af0fdf8475..7a62e744a8b0 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -155,7 +155,7 @@ static unsigned long get_rate_arm(void)
155 155
156 aad = &clk_consumer[(pdr0 >> 16) & 0xf]; 156 aad = &clk_consumer[(pdr0 >> 16) & 0xf];
157 if (aad->sel) 157 if (aad->sel)
158 fref = fref * 2 / 3; 158 fref = fref * 3 / 4;
159 159
160 return fref / aad->arm; 160 return fref / aad->arm;
161} 161}
@@ -164,7 +164,7 @@ static unsigned long get_rate_ahb(struct clk *clk)
164{ 164{
165 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 165 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
166 struct arm_ahb_div *aad; 166 struct arm_ahb_div *aad;
167 unsigned long fref = get_rate_mpll(); 167 unsigned long fref = get_rate_arm();
168 168
169 aad = &clk_consumer[(pdr0 >> 16) & 0xf]; 169 aad = &clk_consumer[(pdr0 >> 16) & 0xf];
170 170
@@ -176,16 +176,11 @@ static unsigned long get_rate_ipg(struct clk *clk)
176 return get_rate_ahb(NULL) >> 1; 176 return get_rate_ahb(NULL) >> 1;
177} 177}
178 178
179static unsigned long get_3_3_div(unsigned long in)
180{
181 return (((in >> 3) & 0x7) + 1) * ((in & 0x7) + 1);
182}
183
184static unsigned long get_rate_uart(struct clk *clk) 179static unsigned long get_rate_uart(struct clk *clk)
185{ 180{
186 unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); 181 unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3);
187 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); 182 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
188 unsigned long div = get_3_3_div(pdr4 >> 10); 183 unsigned long div = ((pdr4 >> 10) & 0x3f) + 1;
189 184
190 if (pdr3 & (1 << 14)) 185 if (pdr3 & (1 << 14))
191 return get_rate_arm() / div; 186 return get_rate_arm() / div;
@@ -216,7 +211,7 @@ static unsigned long get_rate_sdhc(struct clk *clk)
216 break; 211 break;
217 } 212 }
218 213
219 return rate / get_3_3_div(div); 214 return rate / (div + 1);
220} 215}
221 216
222static unsigned long get_rate_mshc(struct clk *clk) 217static unsigned long get_rate_mshc(struct clk *clk)
@@ -270,7 +265,7 @@ static unsigned long get_rate_csi(struct clk *clk)
270 else 265 else
271 rate = get_rate_ppll(); 266 rate = get_rate_ppll();
272 267
273 return rate / get_3_3_div((pdr2 >> 16) & 0x3f); 268 return rate / (((pdr2 >> 16) & 0x3f) + 1);
274} 269}
275 270
276static unsigned long get_rate_otg(struct clk *clk) 271static unsigned long get_rate_otg(struct clk *clk)
@@ -283,25 +278,51 @@ static unsigned long get_rate_otg(struct clk *clk)
283 else 278 else
284 rate = get_rate_ppll(); 279 rate = get_rate_ppll();
285 280
286 return rate / get_3_3_div((pdr4 >> 22) & 0x3f); 281 return rate / (((pdr4 >> 22) & 0x3f) + 1);
287} 282}
288 283
289static unsigned long get_rate_ipg_per(struct clk *clk) 284static unsigned long get_rate_ipg_per(struct clk *clk)
290{ 285{
291 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 286 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
292 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); 287 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
293 unsigned long div1, div2; 288 unsigned long div;
294 289
295 if (pdr0 & (1 << 26)) { 290 if (pdr0 & (1 << 26)) {
296 div1 = (pdr4 >> 19) & 0x7; 291 div = (pdr4 >> 16) & 0x3f;
297 div2 = (pdr4 >> 16) & 0x7; 292 return get_rate_arm() / (div + 1);
298 return get_rate_arm() / ((div1 + 1) * (div2 + 1));
299 } else { 293 } else {
300 div1 = (pdr0 >> 12) & 0x7; 294 div = (pdr0 >> 12) & 0x7;
301 return get_rate_ahb(NULL) / div1; 295 return get_rate_ahb(NULL) / (div + 1);
302 } 296 }
303} 297}
304 298
299static unsigned long get_rate_hsp(struct clk *clk)
300{
301 unsigned long hsp_podf = (__raw_readl(CCM_BASE + CCM_PDR0) >> 20) & 0x03;
302 unsigned long fref = get_rate_mpll();
303
304 if (fref > 400 * 1000 * 1000) {
305 switch (hsp_podf) {
306 case 0:
307 return fref >> 2;
308 case 1:
309 return fref >> 3;
310 case 2:
311 return fref / 3;
312 }
313 } else {
314 switch (hsp_podf) {
315 case 0:
316 case 2:
317 return fref / 3;
318 case 1:
319 return fref / 6;
320 }
321 }
322
323 return 0;
324}
325
305static int clk_cgr_enable(struct clk *clk) 326static int clk_cgr_enable(struct clk *clk)
306{ 327{
307 u32 reg; 328 u32 reg;
@@ -359,7 +380,7 @@ DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL);
359DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL); 380DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL);
360DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL); 381DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL);
361DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL); 382DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL);
362DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_ahb, NULL); 383DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_hsp, NULL);
363DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL); 384DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL);
364DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL); 385DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL);
365DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL); 386DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL);
@@ -485,10 +506,10 @@ static struct clk_lookup lookups[] = {
485 506
486int __init mx35_clocks_init() 507int __init mx35_clocks_init()
487{ 508{
488 unsigned int ll = 0; 509 unsigned int cgr2 = 3 << 26, cgr3 = 0;
489 510
490#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) 511#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
491 ll = (3 << 16); 512 cgr2 |= 3 << 16;
492#endif 513#endif
493 514
494 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 515 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
@@ -499,8 +520,20 @@ int __init mx35_clocks_init()
499 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); 520 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
500 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), 521 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
501 CCM_BASE + CCM_CGR1); 522 CCM_BASE + CCM_CGR1);
502 __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); 523
503 __raw_writel(0, CCM_BASE + CCM_CGR3); 524 /*
525 * Check if we came up in internal boot mode. If yes, we need some
526 * extra clocks turned on, otherwise the MX35 boot ROM code will
527 * hang after a watchdog reset.
528 */
529 if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
530 /* Additionally turn on UART1, SCC, and IIM clocks */
531 cgr2 |= 3 << 16 | 3 << 4;
532 cgr3 |= 3 << 2;
533 }
534
535 __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
536 __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
504 537
505 mxc_timer_init(&gpt_clk, 538 mxc_timer_init(&gpt_clk,
506 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT); 539 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
index 1dc5004df866..f8f15e3ac7a0 100644
--- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
@@ -216,7 +216,7 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = {
216 * Add platform devices present on this baseboard and init 216 * Add platform devices present on this baseboard and init
217 * them from CPU side as far as required to use them later on 217 * them from CPU side as far as required to use them later on
218 */ 218 */
219void __init eukrea_mbimxsd_baseboard_init(void) 219void __init eukrea_mbimxsd35_baseboard_init(void)
220{ 220{
221 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads, 221 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
222 ARRAY_SIZE(eukrea_mbimxsd_pads))) 222 ARRAY_SIZE(eukrea_mbimxsd_pads)))
diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c
index 9770a6a973be..2a4f8b781ba4 100644
--- a/arch/arm/mach-mx3/mach-cpuimx35.c
+++ b/arch/arm/mach-mx3/mach-cpuimx35.c
@@ -201,8 +201,8 @@ static void __init mxc_board_init(void)
201 if (!otg_mode_host) 201 if (!otg_mode_host)
202 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 202 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
203 203
204#ifdef CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD 204#ifdef CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD
205 eukrea_mbimxsd_baseboard_init(); 205 eukrea_mbimxsd35_baseboard_init();
206#endif 206#endif
207} 207}
208 208