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authorLinus Torvalds <torvalds@linux-foundation.org>2009-12-08 11:12:43 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2009-12-08 11:12:43 -0500
commit79c9601c2e0dbbe69895d302de4d19f3a31fbd30 (patch)
tree78d4be2df851b2b4106adcfd736622a90cecf9e9 /arch/arm/mach-mx3
parent41440ffe21f29bdb985cab76b2d0b06d83e63b19 (diff)
parent3d14b5beba35250c548d3851a2b84fce742d8311 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (272 commits) Fix soc_common PCMCIA configuration ARM: 5827/1: SA1100: h3100/h3600: emit messages on failed gpio_request ARM: 5826/1: SA1100: h3100/h3600: always build htc-egpio driver ARM: 5825/1: SA1100: h3600: update defconfig ARM: 5824/1: SA1100: reuse h3600 PCMCIA driver on h3100 ARM: 5823/1: SA1100: h3100/h3600: add support for gpio-keys ARM: 5822/1: SA1100: h3100/h3600: clean up #includes ARM: 5821/1: SA1100: h3100/h3600: revise copyright boilerplates ARM: 5820/1: SA1100: h3100/h3600: split h3600.c ARM: 5819/1: SA1100: h3100/h3600: merge h3600.h and h3600_gpio.h into h3xxx.h ARM: 5818/1: SA1100: h3100/h3600: drop old GPIO definitions ARM: 5817/1: SA1100: h3100/h3600: configure all unused gpios as inputs ARM: 5816/1: SA1100: h3600: remove IRQ_GPIO_* definitions ARM: 5815/1: SA1100: h3100/h3600: remove now unused assign_h3600_egpio handlers ARM: 5814/1: SA1100: h3100/h3600: convert all users of assign_h3600_egpio to gpiolib ARM: 5813/1: SA1100: h3100/h3600: add htc-egpio driver ARM: 5812/1: SA1100: h3100/h3600: separate machine-specific LCD helpers ARM: 5811/2: pcmcia: convert sa1100_h3600 driver to gpiolib ARM: 5799/1: SA1100: h3600: stop setting direction for LCD pins ARM: 5798/1: SA1100: h3600: remove unused cruft from h3600.h ...
Diffstat (limited to 'arch/arm/mach-mx3')
-rw-r--r--arch/arm/mach-mx3/Kconfig11
-rw-r--r--arch/arm/mach-mx3/Makefile5
-rw-r--r--arch/arm/mach-mx3/armadillo5x0.c60
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c46
-rw-r--r--arch/arm/mach-mx3/clock.c6
-rw-r--r--arch/arm/mach-mx3/cpu.c57
-rw-r--r--arch/arm/mach-mx3/devices.c44
-rw-r--r--arch/arm/mach-mx3/devices.h2
-rw-r--r--arch/arm/mach-mx3/kzmarm11.c268
-rw-r--r--arch/arm/mach-mx3/mx31lilly-db.c10
-rw-r--r--arch/arm/mach-mx3/mx31lilly.c57
-rw-r--r--arch/arm/mach-mx3/mx31lite-db.c198
-rw-r--r--arch/arm/mach-mx3/mx31lite.c175
-rw-r--r--arch/arm/mach-mx3/mx31moboard-devboard.c86
-rw-r--r--arch/arm/mach-mx3/mx31moboard-marxbot.c192
-rw-r--r--arch/arm/mach-mx3/mx31moboard.c249
-rw-r--r--arch/arm/mach-mx3/mx35pdk.c12
-rw-r--r--arch/arm/mach-mx3/pcm043.c7
18 files changed, 1441 insertions, 44 deletions
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index 851f2458bf65..ea8ed109a7c2 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -2,11 +2,13 @@ if ARCH_MX3
2 2
3config ARCH_MX31 3config ARCH_MX31
4 select ARCH_HAS_RNGA 4 select ARCH_HAS_RNGA
5 select ARCH_MXC_AUDMUX_V2
5 bool 6 bool
6 7
7config ARCH_MX35 8config ARCH_MX35
8 bool 9 bool
9 select ARCH_MXC_IOMUX_V3 10 select ARCH_MXC_IOMUX_V3
11 select ARCH_MXC_AUDMUX_V2
10 12
11comment "MX3 platforms:" 13comment "MX3 platforms:"
12 14
@@ -61,6 +63,7 @@ config MACH_MX31_3DS
61config MACH_MX31MOBOARD 63config MACH_MX31MOBOARD
62 bool "Support mx31moboard platforms (EPFL Mobots group)" 64 bool "Support mx31moboard platforms (EPFL Mobots group)"
63 select ARCH_MX31 65 select ARCH_MX31
66 select MXC_ULPI
64 help 67 help
65 Include support for mx31moboard platform. This includes specific 68 Include support for mx31moboard platform. This includes specific
66 configurations for the board and its peripherals. 69 configurations for the board and its peripherals.
@@ -100,4 +103,12 @@ config MACH_MX35_3DS
100 help 103 help
101 Include support for MX35PDK platform. This includes specific 104 Include support for MX35PDK platform. This includes specific
102 configurations for the board and its peripherals. 105 configurations for the board and its peripherals.
106
107config MACH_KZM_ARM11_01
108 bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
109 select ARCH_MX31
110 help
111 Include support for KZM-ARM11-01. This includes specific
112 configurations for the board and its peripherals.
113
103endif 114endif
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 6b9775471be6..93c7b296be6a 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -4,12 +4,12 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := mm.o devices.o 7obj-y := mm.o devices.o cpu.o
8obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o 8obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o
9obj-$(CONFIG_ARCH_MX35) += clock-imx35.o 9obj-$(CONFIG_ARCH_MX35) += clock-imx35.o
10obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o 10obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o
11obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o 11obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o
12obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o 12obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o mx31lite-db.o
13obj-$(CONFIG_MACH_PCM037) += pcm037.o 13obj-$(CONFIG_MACH_PCM037) += pcm037.o
14obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o 14obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o
15obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o 15obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o
@@ -19,3 +19,4 @@ obj-$(CONFIG_MACH_QONG) += qong.o
19obj-$(CONFIG_MACH_PCM043) += pcm043.o 19obj-$(CONFIG_MACH_PCM043) += pcm043.o
20obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o 20obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o
21obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o 21obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o
22obj-$(CONFIG_MACH_KZM_ARM11_01) += kzmarm11.o
diff --git a/arch/arm/mach-mx3/armadillo5x0.c b/arch/arm/mach-mx3/armadillo5x0.c
index 776c0ee1b3cd..54aab401dbdf 100644
--- a/arch/arm/mach-mx3/armadillo5x0.c
+++ b/arch/arm/mach-mx3/armadillo5x0.c
@@ -33,6 +33,9 @@
33#include <linux/irq.h> 33#include <linux/irq.h>
34#include <linux/mtd/physmap.h> 34#include <linux/mtd/physmap.h>
35#include <linux/io.h> 35#include <linux/io.h>
36#include <linux/input.h>
37#include <linux/gpio_keys.h>
38#include <linux/i2c.h>
36 39
37#include <mach/hardware.h> 40#include <mach/hardware.h>
38#include <asm/mach-types.h> 41#include <asm/mach-types.h>
@@ -97,6 +100,47 @@ static int armadillo5x0_pins[] = {
97 MX31_PIN_FPSHIFT__FPSHIFT, 100 MX31_PIN_FPSHIFT__FPSHIFT,
98 MX31_PIN_DRDY0__DRDY0, 101 MX31_PIN_DRDY0__DRDY0,
99 IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/ 102 IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
103 /* I2C2 */
104 MX31_PIN_CSPI2_MOSI__SCL,
105 MX31_PIN_CSPI2_MISO__SDA,
106};
107
108/* RTC over I2C*/
109#define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
110
111static struct i2c_board_info armadillo5x0_i2c_rtc = {
112 I2C_BOARD_INFO("s35390a", 0x30),
113};
114
115/* GPIO BUTTONS */
116static struct gpio_keys_button armadillo5x0_buttons[] = {
117 {
118 .code = KEY_ENTER, /*28*/
119 .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
120 .active_low = 1,
121 .desc = "menu",
122 .wakeup = 1,
123 }, {
124 .code = KEY_BACK, /*158*/
125 .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
126 .active_low = 1,
127 .desc = "back",
128 .wakeup = 1,
129 }
130};
131
132static struct gpio_keys_platform_data armadillo5x0_button_data = {
133 .buttons = armadillo5x0_buttons,
134 .nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
135};
136
137static struct platform_device armadillo5x0_button_device = {
138 .name = "gpio-keys",
139 .id = -1,
140 .num_resources = 0,
141 .dev = {
142 .platform_data = &armadillo5x0_button_data,
143 }
100}; 144};
101 145
102/* 146/*
@@ -278,7 +322,7 @@ static struct resource armadillo5x0_smc911x_resources[] = {
278}; 322};
279 323
280static struct smsc911x_platform_config smsc911x_info = { 324static struct smsc911x_platform_config smsc911x_info = {
281 .flags = SMSC911X_USE_32BIT, 325 .flags = SMSC911X_USE_16BIT,
282 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 326 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
283 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, 327 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
284}; 328};
@@ -300,6 +344,8 @@ static struct imxuart_platform_data uart_pdata = {
300 344
301static struct platform_device *devices[] __initdata = { 345static struct platform_device *devices[] __initdata = {
302 &armadillo5x0_smc911x_device, 346 &armadillo5x0_smc911x_device,
347 &mxc_i2c_device1,
348 &armadillo5x0_button_device,
303}; 349};
304 350
305/* 351/*
@@ -335,6 +381,18 @@ static void __init armadillo5x0_init(void)
335 381
336 /* set NAND page size to 2k if not configured via boot mode pins */ 382 /* set NAND page size to 2k if not configured via boot mode pins */
337 __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); 383 __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
384
385 /* RTC */
386 /* Get RTC IRQ and register the chip */
387 if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
388 if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
389 armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
390 else
391 gpio_free(ARMADILLO5X0_RTC_GPIO);
392 }
393 if (armadillo5x0_i2c_rtc.irq == 0)
394 pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
395 i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
338} 396}
339 397
340static void __init armadillo5x0_timer_init(void) 398static void __init armadillo5x0_timer_init(void)
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index c595260ec1f9..7584b4c6c556 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -335,7 +335,7 @@ static void clk_cgr_disable(struct clk *clk)
335 335
336DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL); 336DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL);
337DEFINE_CLOCK(ata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL); 337DEFINE_CLOCK(ata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL);
338DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); 338/* DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); */
339DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL); 339DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL);
340DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL); 340DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL);
341DEFINE_CLOCK(cspi1_clk, 0, CCM_CGR0, 10, get_rate_ipg, NULL); 341DEFINE_CLOCK(cspi1_clk, 0, CCM_CGR0, 10, get_rate_ipg, NULL);
@@ -381,12 +381,43 @@ DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL);
381DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL); 381DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL);
382DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); 382DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL);
383DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); 383DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL);
384DEFINE_CLOCK(admux_clk, 0, CCM_CGR2, 30, NULL, NULL); 384DEFINE_CLOCK(audmux_clk, 0, CCM_CGR2, 30, NULL, NULL);
385 385
386DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL); 386DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL);
387DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL); 387DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL);
388DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL); 388DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL);
389 389
390DEFINE_CLOCK(usbahb_clk, 0, 0, 0, get_rate_ahb, NULL);
391
392static int clk_dummy_enable(struct clk *clk)
393{
394 return 0;
395}
396
397static void clk_dummy_disable(struct clk *clk)
398{
399}
400
401static unsigned long get_rate_nfc(struct clk *clk)
402{
403 unsigned long div1;
404
405 div1 = (__raw_readl(CCM_BASE + CCM_PDR4) >> 28) + 1;
406
407 return get_rate_ahb(NULL) / div1;
408}
409
410/* NAND Controller: It seems it can't be disabled */
411static struct clk nfc_clk = {
412 .id = 0,
413 .enable_reg = 0,
414 .enable_shift = 0,
415 .get_rate = get_rate_nfc,
416 .set_rate = NULL, /* set_rate_nfc, */
417 .enable = clk_dummy_enable,
418 .disable = clk_dummy_disable
419};
420
390#define _REGISTER_CLOCK(d, n, c) \ 421#define _REGISTER_CLOCK(d, n, c) \
391 { \ 422 { \
392 .dev_id = d, \ 423 .dev_id = d, \
@@ -397,7 +428,6 @@ DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL);
397static struct clk_lookup lookups[] = { 428static struct clk_lookup lookups[] = {
398 _REGISTER_CLOCK(NULL, "asrc", asrc_clk) 429 _REGISTER_CLOCK(NULL, "asrc", asrc_clk)
399 _REGISTER_CLOCK(NULL, "ata", ata_clk) 430 _REGISTER_CLOCK(NULL, "ata", ata_clk)
400 _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
401 _REGISTER_CLOCK(NULL, "can", can1_clk) 431 _REGISTER_CLOCK(NULL, "can", can1_clk)
402 _REGISTER_CLOCK(NULL, "can", can2_clk) 432 _REGISTER_CLOCK(NULL, "can", can2_clk)
403 _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) 433 _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk)
@@ -434,8 +464,8 @@ static struct clk_lookup lookups[] = {
434 _REGISTER_CLOCK(NULL, "sdma", sdma_clk) 464 _REGISTER_CLOCK(NULL, "sdma", sdma_clk)
435 _REGISTER_CLOCK(NULL, "spba", spba_clk) 465 _REGISTER_CLOCK(NULL, "spba", spba_clk)
436 _REGISTER_CLOCK(NULL, "spdif", spdif_clk) 466 _REGISTER_CLOCK(NULL, "spdif", spdif_clk)
437 _REGISTER_CLOCK(NULL, "ssi", ssi1_clk) 467 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
438 _REGISTER_CLOCK(NULL, "ssi", ssi2_clk) 468 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
439 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) 469 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
440 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) 470 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
441 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) 471 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
@@ -443,12 +473,14 @@ static struct clk_lookup lookups[] = {
443 _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk) 473 _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
444 _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk) 474 _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
445 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk) 475 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
476 _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usbahb_clk)
446 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk) 477 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
447 _REGISTER_CLOCK(NULL, "max", max_clk) 478 _REGISTER_CLOCK(NULL, "max", max_clk)
448 _REGISTER_CLOCK(NULL, "admux", admux_clk) 479 _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
449 _REGISTER_CLOCK(NULL, "csi", csi_clk) 480 _REGISTER_CLOCK(NULL, "csi", csi_clk)
450 _REGISTER_CLOCK(NULL, "iim", iim_clk) 481 _REGISTER_CLOCK(NULL, "iim", iim_clk)
451 _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk) 482 _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk)
483 _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
452}; 484};
453 485
454int __init mx35_clocks_init() 486int __init mx35_clocks_init()
@@ -456,7 +488,7 @@ int __init mx35_clocks_init()
456 int i; 488 int i;
457 unsigned int ll = 0; 489 unsigned int ll = 0;
458 490
459#ifdef CONFIG_DEBUG_LL_CONSOLE 491#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
460 ll = (3 << 16); 492 ll = (3 << 16);
461#endif 493#endif
462 494
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index b2a3bcf8266e..27a318af0d20 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -558,8 +558,8 @@ static struct clk_lookup lookups[] = {
558 _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk) 558 _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk)
559 _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) 559 _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)
560 _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) 560 _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)
561 _REGISTER_CLOCK(NULL, "ssi", ssi1_clk) 561 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
562 _REGISTER_CLOCK(NULL, "ssi", ssi2_clk) 562 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
563 _REGISTER_CLOCK(NULL, "firi", firi_clk) 563 _REGISTER_CLOCK(NULL, "firi", firi_clk)
564 _REGISTER_CLOCK(NULL, "ata", ata_clk) 564 _REGISTER_CLOCK(NULL, "ata", ata_clk)
565 _REGISTER_CLOCK(NULL, "rtic", rtic_clk) 565 _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
@@ -616,6 +616,8 @@ int __init mx31_clocks_init(unsigned long fref)
616 616
617 clk_enable(&serial_pll_clk); 617 clk_enable(&serial_pll_clk);
618 618
619 mx31_read_cpu_rev();
620
619 if (mx31_revision() >= CHIP_REV_2_0) { 621 if (mx31_revision() >= CHIP_REV_2_0) {
620 reg = __raw_readl(MXC_CCM_PMCR1); 622 reg = __raw_readl(MXC_CCM_PMCR1);
621 /* No PLL restart on DVFS switch; enable auto EMI handshake */ 623 /* No PLL restart on DVFS switch; enable auto EMI handshake */
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
new file mode 100644
index 000000000000..db828809c675
--- /dev/null
+++ b/arch/arm/mach-mx3/cpu.c
@@ -0,0 +1,57 @@
1/*
2 * MX3 CPU type detection
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/io.h>
14#include <mach/hardware.h>
15#include <mach/iim.h>
16
17unsigned int mx31_cpu_rev;
18EXPORT_SYMBOL(mx31_cpu_rev);
19
20struct mx3_cpu_type {
21 u8 srev;
22 const char *name;
23 const char *v;
24 unsigned int rev;
25};
26
27static struct mx3_cpu_type mx31_cpu_type[] __initdata = {
28 { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = CHIP_REV_1_0 },
29 { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = CHIP_REV_1_1 },
30 { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = CHIP_REV_1_1 },
31 { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = CHIP_REV_1_1 },
32 { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = CHIP_REV_1_1 },
33 { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = CHIP_REV_1_2 },
34 { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = CHIP_REV_1_2 },
35 { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = CHIP_REV_2_0 },
36 { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = CHIP_REV_2_0 },
37};
38
39void __init mx31_read_cpu_rev(void)
40{
41 u32 i, srev;
42
43 /* read SREV register from IIM module */
44 srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR) + MXC_IIMSREV);
45
46 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
47 if (srev == mx31_cpu_type[i].srev) {
48 printk(KERN_INFO
49 "CPU identified as %s, silicon rev %s\n",
50 mx31_cpu_type[i].name, mx31_cpu_type[i].v);
51
52 mx31_cpu_rev = mx31_cpu_type[i].rev;
53 return;
54 }
55
56 printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
57}
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index e6abe181b967..6adb586515ea 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -537,6 +537,44 @@ struct platform_device mxc_fec_device = {
537}; 537};
538#endif 538#endif
539 539
540static struct resource imx_ssi_resources0[] = {
541 {
542 .start = SSI1_BASE_ADDR,
543 .end = SSI1_BASE_ADDR + 0xfff,
544 .flags = IORESOURCE_MEM,
545 }, {
546 .start = MX31_INT_SSI1,
547 .end = MX31_INT_SSI1,
548 .flags = IORESOURCE_IRQ,
549 },
550};
551
552static struct resource imx_ssi_resources1[] = {
553 {
554 .start = SSI2_BASE_ADDR,
555 .end = SSI2_BASE_ADDR + 0xfff,
556 .flags = IORESOURCE_MEM
557 }, {
558 .start = MX31_INT_SSI2,
559 .end = MX31_INT_SSI2,
560 .flags = IORESOURCE_IRQ,
561 },
562};
563
564struct platform_device imx_ssi_device0 = {
565 .name = "imx-ssi",
566 .id = 0,
567 .num_resources = ARRAY_SIZE(imx_ssi_resources0),
568 .resource = imx_ssi_resources0,
569};
570
571struct platform_device imx_ssi_device1 = {
572 .name = "imx-ssi",
573 .id = 1,
574 .num_resources = ARRAY_SIZE(imx_ssi_resources1),
575 .resource = imx_ssi_resources1,
576};
577
540static int mx3_devices_init(void) 578static int mx3_devices_init(void)
541{ 579{
542 if (cpu_is_mx31()) { 580 if (cpu_is_mx31()) {
@@ -546,7 +584,7 @@ static int mx3_devices_init(void)
546 } 584 }
547 if (cpu_is_mx35()) { 585 if (cpu_is_mx35()) {
548 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; 586 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
549 mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; 587 mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0x1fff;
550 otg_resources[0].start = MX35_OTG_BASE_ADDR; 588 otg_resources[0].start = MX35_OTG_BASE_ADDR;
551 otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; 589 otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff;
552 otg_resources[1].start = MXC_INT_USBOTG; 590 otg_resources[1].start = MXC_INT_USBOTG;
@@ -555,6 +593,10 @@ static int mx3_devices_init(void)
555 mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; 593 mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff;
556 mxc_usbh1_resources[1].start = MXC_INT_USBHS; 594 mxc_usbh1_resources[1].start = MXC_INT_USBHS;
557 mxc_usbh1_resources[1].end = MXC_INT_USBHS; 595 mxc_usbh1_resources[1].end = MXC_INT_USBHS;
596 imx_ssi_resources0[1].start = MX35_INT_SSI1;
597 imx_ssi_resources0[1].end = MX35_INT_SSI1;
598 imx_ssi_resources1[1].start = MX35_INT_SSI2;
599 imx_ssi_resources1[1].end = MX35_INT_SSI2;
558 } 600 }
559 601
560 return 0; 602 return 0;
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index ab87419dc9a0..42cf175eac6b 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -23,4 +23,6 @@ extern struct platform_device mxc_rnga_device;
23extern struct platform_device mxc_spi_device0; 23extern struct platform_device mxc_spi_device0;
24extern struct platform_device mxc_spi_device1; 24extern struct platform_device mxc_spi_device1;
25extern struct platform_device mxc_spi_device2; 25extern struct platform_device mxc_spi_device2;
26extern struct platform_device imx_ssi_device0;
27extern struct platform_device imx_ssi_device1;
26 28
diff --git a/arch/arm/mach-mx3/kzmarm11.c b/arch/arm/mach-mx3/kzmarm11.c
new file mode 100644
index 000000000000..6fa99ce3008a
--- /dev/null
+++ b/arch/arm/mach-mx3/kzmarm11.c
@@ -0,0 +1,268 @@
1/*
2 * KZM-ARM11-01 support
3 * Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org>
4 *
5 * based on code for MX31ADS,
6 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
8 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25#include <linux/gpio.h>
26#include <linux/init.h>
27#include <linux/platform_device.h>
28#include <linux/serial_8250.h>
29#include <linux/smsc911x.h>
30#include <linux/types.h>
31
32#include <asm/irq.h>
33#include <asm/mach-types.h>
34#include <asm/setup.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/irq.h>
37#include <asm/mach/map.h>
38#include <asm/mach/time.h>
39
40#include <mach/board-kzmarm11.h>
41#include <mach/clock.h>
42#include <mach/common.h>
43#include <mach/imx-uart.h>
44#include <mach/iomux-mx3.h>
45#include <mach/memory.h>
46
47#include "devices.h"
48
49#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
50/*
51 * KZM-ARM11-01 has an external UART on FPGA
52 */
53static struct plat_serial8250_port serial_platform_data[] = {
54 {
55 .membase = IO_ADDRESS(KZM_ARM11_16550),
56 .mapbase = KZM_ARM11_16550,
57 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
58 .irqflags = IRQ_TYPE_EDGE_RISING,
59 .uartclk = 14745600,
60 .regshift = 0,
61 .iotype = UPIO_MEM,
62 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
63 UPF_BUGGY_UART,
64 },
65 {},
66};
67
68static struct resource serial8250_resources[] = {
69 {
70 .start = KZM_ARM11_16550,
71 .end = KZM_ARM11_16550 + 0x10,
72 .flags = IORESOURCE_MEM,
73 },
74 {
75 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
76 .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
81static struct platform_device serial_device = {
82 .name = "serial8250",
83 .id = PLAT8250_DEV_PLATFORM,
84 .dev = {
85 .platform_data = serial_platform_data,
86 },
87 .num_resources = ARRAY_SIZE(serial8250_resources),
88 .resource = serial8250_resources,
89};
90
91static int __init kzm_init_ext_uart(void)
92{
93 u8 tmp;
94
95 /*
96 * GPIO 1-1: external UART interrupt line
97 */
98 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
99 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
100 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
101
102 /*
103 * Unmask UART interrupt
104 */
105 tmp = __raw_readb(IO_ADDRESS(KZM_ARM11_CTL1));
106 tmp |= 0x2;
107 __raw_writeb(tmp, IO_ADDRESS(KZM_ARM11_CTL1));
108
109 return platform_device_register(&serial_device);
110}
111#else
112static inline int kzm_init_ext_uart(void)
113{
114 return 0;
115}
116#endif
117
118/*
119 * SMSC LAN9118
120 */
121#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
122static struct smsc911x_platform_config kzm_smsc9118_config = {
123 .phy_interface = PHY_INTERFACE_MODE_MII,
124 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
125 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
126 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
127};
128
129static struct resource kzm_smsc9118_resources[] = {
130 {
131 .start = CS5_BASE_ADDR,
132 .end = CS5_BASE_ADDR + SZ_128K - 1,
133 .flags = IORESOURCE_MEM,
134 },
135 {
136 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
137 .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
138 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
139 },
140};
141
142static struct platform_device kzm_smsc9118_device = {
143 .name = "smsc911x",
144 .id = -1,
145 .num_resources = ARRAY_SIZE(kzm_smsc9118_resources),
146 .resource = kzm_smsc9118_resources,
147 .dev = {
148 .platform_data = &kzm_smsc9118_config,
149 },
150};
151
152static int __init kzm_init_smsc9118(void)
153{
154 /*
155 * GPIO 1-2: SMSC9118 interrupt line
156 */
157 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
158 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
159 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
160
161 return platform_device_register(&kzm_smsc9118_device);
162}
163#else
164static inline int kzm_init_smsc9118(void)
165{
166 return 0;
167}
168#endif
169
170#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
171static struct imxuart_platform_data uart_pdata = {
172 .flags = IMXUART_HAVE_RTSCTS,
173};
174
175static void __init kzm_init_imx_uart(void)
176{
177 mxc_register_device(&mxc_uart_device0, &uart_pdata);
178
179 mxc_register_device(&mxc_uart_device1, &uart_pdata);
180}
181#else
182static inline void kzm_init_imx_uart(void)
183{
184}
185#endif
186
187static int kzm_pins[] __initdata = {
188 MX31_PIN_CTS1__CTS1,
189 MX31_PIN_RTS1__RTS1,
190 MX31_PIN_TXD1__TXD1,
191 MX31_PIN_RXD1__RXD1,
192 MX31_PIN_DCD_DCE1__DCD_DCE1,
193 MX31_PIN_RI_DCE1__RI_DCE1,
194 MX31_PIN_DSR_DCE1__DSR_DCE1,
195 MX31_PIN_DTR_DCE1__DTR_DCE1,
196 MX31_PIN_CTS2__CTS2,
197 MX31_PIN_RTS2__RTS2,
198 MX31_PIN_TXD2__TXD2,
199 MX31_PIN_RXD2__RXD2,
200 MX31_PIN_DCD_DTE1__DCD_DTE2,
201 MX31_PIN_RI_DTE1__RI_DTE2,
202 MX31_PIN_DSR_DTE1__DSR_DTE2,
203 MX31_PIN_DTR_DTE1__DTR_DTE2,
204};
205
206/*
207 * Board specific initialization.
208 */
209static void __init kzm_board_init(void)
210{
211 mxc_iomux_setup_multiple_pins(kzm_pins,
212 ARRAY_SIZE(kzm_pins), "kzm");
213 kzm_init_ext_uart();
214 kzm_init_smsc9118();
215 kzm_init_imx_uart();
216
217 pr_info("Clock input source is 26MHz\n");
218}
219
220/*
221 * This structure defines static mappings for the kzm-arm11-01 board.
222 */
223static struct map_desc kzm_io_desc[] __initdata = {
224 {
225 .virtual = CS4_BASE_ADDR_VIRT,
226 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
227 .length = CS4_SIZE,
228 .type = MT_DEVICE
229 },
230 {
231 .virtual = CS5_BASE_ADDR_VIRT,
232 .pfn = __phys_to_pfn(CS5_BASE_ADDR),
233 .length = CS5_SIZE,
234 .type = MT_DEVICE
235 },
236};
237
238/*
239 * Set up static virtual mappings.
240 */
241static void __init kzm_map_io(void)
242{
243 mx31_map_io();
244 iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
245}
246
247static void __init kzm_timer_init(void)
248{
249 mx31_clocks_init(26000000);
250}
251
252static struct sys_timer kzm_timer = {
253 .init = kzm_timer_init,
254};
255
256/*
257 * The following uses standard kernel macros define in arch.h in order to
258 * initialize __mach_desc_KZM_ARM11_01 data structure.
259 */
260MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
261 .phys_io = AIPS1_BASE_ADDR,
262 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
263 .boot_params = PHYS_OFFSET + 0x100,
264 .map_io = kzm_map_io,
265 .init_irq = mx31_init_irq,
266 .init_machine = kzm_board_init,
267 .timer = &kzm_timer,
268MACHINE_END
diff --git a/arch/arm/mach-mx3/mx31lilly-db.c b/arch/arm/mach-mx3/mx31lilly-db.c
index 3b3a78f49c23..7aebd74a12e8 100644
--- a/arch/arm/mach-mx3/mx31lilly-db.c
+++ b/arch/arm/mach-mx3/mx31lilly-db.c
@@ -109,6 +109,9 @@ static int mxc_mmc1_get_ro(struct device *dev)
109 109
110static int gpio_det, gpio_wp; 110static int gpio_det, gpio_wp;
111 111
112#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
113 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
114
112static int mxc_mmc1_init(struct device *dev, 115static int mxc_mmc1_init(struct device *dev,
113 irq_handler_t detect_irq, void *data) 116 irq_handler_t detect_irq, void *data)
114{ 117{
@@ -117,6 +120,13 @@ static int mxc_mmc1_init(struct device *dev,
117 gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1); 120 gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1);
118 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0); 121 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0);
119 122
123 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
124 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
125 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
126 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
127 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
128 mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
129
120 ret = gpio_request(gpio_det, "MMC detect"); 130 ret = gpio_request(gpio_det, "MMC detect");
121 if (ret) 131 if (ret)
122 return ret; 132 return ret;
diff --git a/arch/arm/mach-mx3/mx31lilly.c b/arch/arm/mach-mx3/mx31lilly.c
index 423025150f6f..9ce029f554b9 100644
--- a/arch/arm/mach-mx3/mx31lilly.c
+++ b/arch/arm/mach-mx3/mx31lilly.c
@@ -31,6 +31,8 @@
31#include <linux/interrupt.h> 31#include <linux/interrupt.h>
32#include <linux/smsc911x.h> 32#include <linux/smsc911x.h>
33#include <linux/mtd/physmap.h> 33#include <linux/mtd/physmap.h>
34#include <linux/spi/spi.h>
35#include <linux/mfd/mc13783.h>
34 36
35#include <asm/mach-types.h> 37#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
@@ -41,6 +43,7 @@
41#include <mach/common.h> 43#include <mach/common.h>
42#include <mach/iomux-mx3.h> 44#include <mach/iomux-mx3.h>
43#include <mach/board-mx31lilly.h> 45#include <mach/board-mx31lilly.h>
46#include <mach/spi.h>
44 47
45#include "devices.h" 48#include "devices.h"
46 49
@@ -108,7 +111,36 @@ static struct platform_device physmap_flash_device = {
108static struct platform_device *devices[] __initdata = { 111static struct platform_device *devices[] __initdata = {
109 &smsc91x_device, 112 &smsc91x_device,
110 &physmap_flash_device, 113 &physmap_flash_device,
111 &mxc_i2c_device1, 114};
115
116/* SPI */
117
118static int spi_internal_chipselect[] = {
119 MXC_SPI_CS(0),
120 MXC_SPI_CS(1),
121 MXC_SPI_CS(2),
122};
123
124static struct spi_imx_master spi0_pdata = {
125 .chipselect = spi_internal_chipselect,
126 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
127};
128
129static struct spi_imx_master spi1_pdata = {
130 .chipselect = spi_internal_chipselect,
131 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
132};
133
134static struct mc13783_platform_data mc13783_pdata __initdata = {
135 .flags = MC13783_USE_RTC | MC13783_USE_TOUCHSCREEN,
136};
137
138static struct spi_board_info mc13783_dev __initdata = {
139 .modalias = "mc13783",
140 .max_speed_hz = 1000000,
141 .bus_num = 1,
142 .chip_select = 0,
143 .platform_data = &mc13783_pdata,
112}; 144};
113 145
114static int mx31lilly_baseboard; 146static int mx31lilly_baseboard;
@@ -128,8 +160,27 @@ static void __init mx31lilly_board_init(void)
128 } 160 }
129 161
130 mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS"); 162 mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
131 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__SCL, "I2C SCL"); 163
132 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__SDA, "I2C SDA"); 164 /* SPI */
165 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
166 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
167 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
168 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
169 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
170 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
171 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
172
173 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
174 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
175 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
176 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
177 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
178 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
179 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
180
181 mxc_register_device(&mxc_spi_device0, &spi0_pdata);
182 mxc_register_device(&mxc_spi_device1, &spi1_pdata);
183 spi_register_board_info(&mc13783_dev, 1);
133 184
134 platform_add_devices(devices, ARRAY_SIZE(devices)); 185 platform_add_devices(devices, ARRAY_SIZE(devices));
135} 186}
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c
new file mode 100644
index 000000000000..694611d6b057
--- /dev/null
+++ b/arch/arm/mach-mx3/mx31lite-db.c
@@ -0,0 +1,198 @@
1/*
2 * LogicPD i.MX31 SOM-LV development board support
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * based on code for other MX31 boards,
7 *
8 * Copyright 2005-2007 Freescale Semiconductor
9 * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
10 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <linux/kernel.h>
28#include <linux/types.h>
29#include <linux/init.h>
30#include <linux/gpio.h>
31#include <linux/platform_device.h>
32#include <linux/leds.h>
33#include <linux/platform_device.h>
34
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/mach/map.h>
38
39#include <mach/hardware.h>
40#include <mach/common.h>
41#include <mach/imx-uart.h>
42#include <mach/iomux-mx3.h>
43#include <mach/board-mx31lite.h>
44#include <mach/mmc.h>
45#include <mach/spi.h>
46
47#include "devices.h"
48
49/*
50 * This file contains board-specific initialization routines for the
51 * LogicPD i.MX31 SOM-LV development board, aka 'LiteKit'.
52 * If you design an own baseboard for the module, use this file as base
53 * for support code.
54 */
55
56static unsigned int litekit_db_board_pins[] __initdata = {
57 /* UART1 */
58 MX31_PIN_CTS1__CTS1,
59 MX31_PIN_RTS1__RTS1,
60 MX31_PIN_TXD1__TXD1,
61 MX31_PIN_RXD1__RXD1,
62 /* SPI 0 */
63 MX31_PIN_CSPI1_SCLK__SCLK,
64 MX31_PIN_CSPI1_MOSI__MOSI,
65 MX31_PIN_CSPI1_MISO__MISO,
66 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
67 MX31_PIN_CSPI1_SS0__SS0,
68 MX31_PIN_CSPI1_SS1__SS1,
69 MX31_PIN_CSPI1_SS2__SS2,
70};
71
72/* UART */
73static struct imxuart_platform_data uart_pdata __initdata = {
74 .flags = IMXUART_HAVE_RTSCTS,
75};
76
77/* MMC */
78
79static int gpio_det, gpio_wp;
80
81#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
82 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
83
84static int mxc_mmc1_get_ro(struct device *dev)
85{
86 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
87}
88
89static int mxc_mmc1_init(struct device *dev,
90 irq_handler_t detect_irq, void *data)
91{
92 int ret;
93
94 gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1);
95 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6);
96
97 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
98 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
99 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
100 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
101 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
102 mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
103
104 ret = gpio_request(gpio_det, "MMC detect");
105 if (ret)
106 return ret;
107
108 ret = gpio_request(gpio_wp, "MMC w/p");
109 if (ret)
110 goto exit_free_det;
111
112 gpio_direction_input(gpio_det);
113 gpio_direction_input(gpio_wp);
114
115 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq,
116 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
117 "MMC detect", data);
118 if (ret)
119 goto exit_free_wp;
120
121 return 0;
122
123exit_free_wp:
124 gpio_free(gpio_wp);
125
126exit_free_det:
127 gpio_free(gpio_det);
128
129 return ret;
130}
131
132static void mxc_mmc1_exit(struct device *dev, void *data)
133{
134 gpio_free(gpio_det);
135 gpio_free(gpio_wp);
136 free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data);
137}
138
139static struct imxmmc_platform_data mmc_pdata = {
140 .get_ro = mxc_mmc1_get_ro,
141 .init = mxc_mmc1_init,
142 .exit = mxc_mmc1_exit,
143};
144
145/* SPI */
146
147static int spi_internal_chipselect[] = {
148 MXC_SPI_CS(0),
149 MXC_SPI_CS(1),
150 MXC_SPI_CS(2),
151};
152
153static struct spi_imx_master spi0_pdata = {
154 .chipselect = spi_internal_chipselect,
155 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
156};
157
158/* GPIO LEDs */
159
160static struct gpio_led litekit_leds[] = {
161 {
162 .name = "GPIO0",
163 .gpio = IOMUX_TO_GPIO(MX31_PIN_COMPARE),
164 .active_low = 1,
165 .default_state = LEDS_GPIO_DEFSTATE_OFF,
166 },
167 {
168 .name = "GPIO1",
169 .gpio = IOMUX_TO_GPIO(MX31_PIN_CAPTURE),
170 .active_low = 1,
171 .default_state = LEDS_GPIO_DEFSTATE_OFF,
172 }
173};
174
175static struct gpio_led_platform_data litekit_led_platform_data = {
176 .leds = litekit_leds,
177 .num_leds = ARRAY_SIZE(litekit_leds),
178};
179
180static struct platform_device litekit_led_device = {
181 .name = "leds-gpio",
182 .id = -1,
183 .dev = {
184 .platform_data = &litekit_led_platform_data,
185 },
186};
187
188void __init mx31lite_db_init(void)
189{
190 mxc_iomux_setup_multiple_pins(litekit_db_board_pins,
191 ARRAY_SIZE(litekit_db_board_pins),
192 "development board pins");
193 mxc_register_device(&mxc_uart_device0, &uart_pdata);
194 mxc_register_device(&mxcsdhc_device0, &mmc_pdata);
195 mxc_register_device(&mxc_spi_device0, &spi0_pdata);
196 platform_device_register(&litekit_led_device);
197}
198
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c
index a8d57decdfdb..def6b6736594 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mx31lite.c
@@ -2,6 +2,7 @@
2 * Copyright (C) 2000 Deep Blue Solutions Ltd 2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com) 3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. 4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
@@ -25,38 +26,47 @@
25#include <linux/platform_device.h> 26#include <linux/platform_device.h>
26#include <linux/gpio.h> 27#include <linux/gpio.h>
27#include <linux/smsc911x.h> 28#include <linux/smsc911x.h>
29#include <linux/mfd/mc13783.h>
30#include <linux/spi/spi.h>
31#include <linux/usb/otg.h>
32#include <linux/usb/ulpi.h>
33#include <linux/mtd/physmap.h>
28 34
29#include <mach/hardware.h>
30#include <asm/mach-types.h> 35#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
32#include <asm/mach/time.h> 37#include <asm/mach/time.h>
33#include <asm/mach/map.h> 38#include <asm/mach/map.h>
34#include <mach/common.h>
35#include <asm/page.h> 39#include <asm/page.h>
36#include <asm/setup.h> 40#include <asm/setup.h>
41
42#include <mach/hardware.h>
43#include <mach/common.h>
37#include <mach/board-mx31lite.h> 44#include <mach/board-mx31lite.h>
38#include <mach/imx-uart.h> 45#include <mach/imx-uart.h>
39#include <mach/iomux-mx3.h> 46#include <mach/iomux-mx3.h>
40#include <mach/irqs.h> 47#include <mach/irqs.h>
41#include <mach/mxc_nand.h> 48#include <mach/mxc_nand.h>
49#include <mach/spi.h>
50#include <mach/mxc_ehci.h>
51#include <mach/ulpi.h>
52
42#include "devices.h" 53#include "devices.h"
43 54
44/* 55/*
45 * This file contains the board-specific initialization routines. 56 * This file contains the module-specific initialization routines.
46 */ 57 */
47 58
48static unsigned int mx31lite_pins[] = { 59static unsigned int mx31lite_pins[] = {
49 /* UART1 */
50 MX31_PIN_CTS1__CTS1,
51 MX31_PIN_RTS1__RTS1,
52 MX31_PIN_TXD1__TXD1,
53 MX31_PIN_RXD1__RXD1,
54 /* LAN9117 IRQ pin */ 60 /* LAN9117 IRQ pin */
55 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), 61 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
56}; 62 /* SPI 1 */
57 63 MX31_PIN_CSPI2_SCLK__SCLK,
58static struct imxuart_platform_data uart_pdata = { 64 MX31_PIN_CSPI2_MOSI__MOSI,
59 .flags = IMXUART_HAVE_RTSCTS, 65 MX31_PIN_CSPI2_MISO__MISO,
66 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
67 MX31_PIN_CSPI2_SS0__SS0,
68 MX31_PIN_CSPI2_SS1__SS1,
69 MX31_PIN_CSPI2_SS2__SS2,
60}; 70};
61 71
62static struct mxc_nand_platform_data mx31lite_nand_board_info = { 72static struct mxc_nand_platform_data mx31lite_nand_board_info = {
@@ -93,6 +103,111 @@ static struct platform_device smsc911x_device = {
93}; 103};
94 104
95/* 105/*
106 * SPI
107 *
108 * The MC13783 is the only hard-wired SPI device on the module.
109 */
110
111static int spi_internal_chipselect[] = {
112 MXC_SPI_CS(0),
113};
114
115static struct spi_imx_master spi1_pdata = {
116 .chipselect = spi_internal_chipselect,
117 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
118};
119
120static struct mc13783_platform_data mc13783_pdata __initdata = {
121 .flags = MC13783_USE_RTC |
122 MC13783_USE_REGULATOR,
123};
124
125static struct spi_board_info mc13783_spi_dev __initdata = {
126 .modalias = "mc13783",
127 .max_speed_hz = 1000000,
128 .bus_num = 1,
129 .chip_select = 0,
130 .platform_data = &mc13783_pdata,
131 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
132};
133
134/*
135 * USB
136 */
137
138#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
139 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
140
141static int usbh2_init(struct platform_device *pdev)
142{
143 int pins[] = {
144 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
145 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
146 MX31_PIN_USBH2_CLK__USBH2_CLK,
147 MX31_PIN_USBH2_DIR__USBH2_DIR,
148 MX31_PIN_USBH2_NXT__USBH2_NXT,
149 MX31_PIN_USBH2_STP__USBH2_STP,
150 };
151
152 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
153
154 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
156 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
157 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
158 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
159 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
160 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
161 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
162 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
163 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
164 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
165 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
166
167 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
168
169 /* chip select */
170 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
171 "USBH2_CS");
172 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
173 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
174
175 return 0;
176}
177
178static struct mxc_usbh_platform_data usbh2_pdata = {
179 .init = usbh2_init,
180 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
181 .flags = MXC_EHCI_POWER_PINS_ENABLED,
182};
183
184/*
185 * NOR flash
186 */
187
188static struct physmap_flash_data nor_flash_data = {
189 .width = 2,
190};
191
192static struct resource nor_flash_resource = {
193 .start = 0xa0000000,
194 .end = 0xa1ffffff,
195 .flags = IORESOURCE_MEM,
196};
197
198static struct platform_device physmap_flash_device = {
199 .name = "physmap-flash",
200 .id = 0,
201 .dev = {
202 .platform_data = &nor_flash_data,
203 },
204 .resource = &nor_flash_resource,
205 .num_resources = 1,
206};
207
208
209
210/*
96 * This structure defines the MX31 memory map. 211 * This structure defines the MX31 memory map.
97 */ 212 */
98static struct map_desc mx31lite_io_desc[] __initdata = { 213static struct map_desc mx31lite_io_desc[] __initdata = {
@@ -118,19 +233,40 @@ void __init mx31lite_map_io(void)
118 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc)); 233 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
119} 234}
120 235
121/* 236static int mx31lite_baseboard;
122 * Board specific initialization. 237core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
123 */ 238
124static void __init mxc_board_init(void) 239static void __init mxc_board_init(void)
125{ 240{
126 int ret; 241 int ret;
127 242
243 switch (mx31lite_baseboard) {
244 case MX31LITE_NOBOARD:
245 break;
246 case MX31LITE_DB:
247 mx31lite_db_init();
248 break;
249 default:
250 printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n",
251 mx31lite_baseboard);
252 }
253
128 mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins), 254 mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
129 "mx31lite"); 255 "mx31lite");
130 256
131 mxc_register_device(&mxc_uart_device0, &uart_pdata); 257 /* NOR and NAND flash */
258 platform_device_register(&physmap_flash_device);
132 mxc_register_device(&mxc_nand_device, &mx31lite_nand_board_info); 259 mxc_register_device(&mxc_nand_device, &mx31lite_nand_board_info);
133 260
261 mxc_register_device(&mxc_spi_device1, &spi1_pdata);
262 spi_register_board_info(&mc13783_spi_dev, 1);
263
264 /* USB */
265 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
266 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
267
268 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
269
134 /* SMSC9117 IRQ pin */ 270 /* SMSC9117 IRQ pin */
135 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); 271 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
136 if (ret) 272 if (ret)
@@ -150,12 +286,7 @@ struct sys_timer mx31lite_timer = {
150 .init = mx31lite_timer_init, 286 .init = mx31lite_timer_init,
151}; 287};
152 288
153/* 289MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
154 * The following uses standard kernel macros defined in arch.h in order to
155 * initialize __mach_desc_MX31LITE data structure.
156 */
157
158MACHINE_START(MX31LITE, "LogicPD MX31 LITEKIT")
159 /* Maintainer: Freescale Semiconductor, Inc. */ 290 /* Maintainer: Freescale Semiconductor, Inc. */
160 .phys_io = AIPS1_BASE_ADDR, 291 .phys_io = AIPS1_BASE_ADDR,
161 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 292 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c
index 5592cdb8d0ad..8fc624f141cb 100644
--- a/arch/arm/mach-mx3/mx31moboard-devboard.c
+++ b/arch/arm/mach-mx3/mx31moboard-devboard.c
@@ -22,11 +22,15 @@
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/types.h> 23#include <linux/types.h>
24 24
25#include <linux/usb/otg.h>
26
25#include <mach/common.h> 27#include <mach/common.h>
26#include <mach/imx-uart.h> 28#include <mach/imx-uart.h>
27#include <mach/iomux-mx3.h> 29#include <mach/iomux-mx3.h>
28#include <mach/hardware.h> 30#include <mach/hardware.h>
29#include <mach/mmc.h> 31#include <mach/mmc.h>
32#include <mach/mxc_ehci.h>
33#include <mach/ulpi.h>
30 34
31#include "devices.h" 35#include "devices.h"
32 36
@@ -39,6 +43,12 @@ static unsigned int devboard_pins[] = {
39 MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0, 43 MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
40 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, 44 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
41 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, 45 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
46 /* USB H1 */
47 MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
48 MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
49 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
50 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
51 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
42}; 52};
43 53
44static struct imxuart_platform_data uart_pdata = { 54static struct imxuart_platform_data uart_pdata = {
@@ -98,6 +108,80 @@ static struct imxmmc_platform_data sdhc2_pdata = {
98 .exit = devboard_sdhc2_exit, 108 .exit = devboard_sdhc2_exit,
99}; 109};
100 110
111#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
112 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
113
114static int devboard_usbh1_hw_init(struct platform_device *pdev)
115{
116 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
117
118 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
119 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
120 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
121 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
122 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
123 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
124 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
125 mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
126
127 return 0;
128}
129
130#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
131#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
132
133static int devboard_isp1105_init(struct otg_transceiver *otg)
134{
135 int ret = gpio_request(USBH1_MODE, "usbh1-mode");
136 if (ret)
137 return ret;
138 /* single ended */
139 gpio_direction_output(USBH1_MODE, 0);
140
141 ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
142 if (ret) {
143 gpio_free(USBH1_MODE);
144 return ret;
145 }
146 gpio_direction_output(USBH1_VBUSEN_B, 1);
147
148 return 0;
149}
150
151
152static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
153{
154 if (on)
155 gpio_set_value(USBH1_VBUSEN_B, 0);
156 else
157 gpio_set_value(USBH1_VBUSEN_B, 1);
158
159 return 0;
160}
161
162static struct mxc_usbh_platform_data usbh1_pdata = {
163 .init = devboard_usbh1_hw_init,
164 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
165 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
166};
167
168static int __init devboard_usbh1_init(void)
169{
170 struct otg_transceiver *otg;
171
172 otg = kzalloc(sizeof(*otg), GFP_KERNEL);
173 if (!otg)
174 return -ENOMEM;
175
176 otg->label = "ISP1105";
177 otg->init = devboard_isp1105_init;
178 otg->set_vbus = devboard_isp1105_set_vbus;
179
180 usbh1_pdata.otg = otg;
181
182 return mxc_register_device(&mx31_usbh1, &usbh1_pdata);
183}
184
101/* 185/*
102 * system init for baseboard usage. Will be called by mx31moboard init. 186 * system init for baseboard usage. Will be called by mx31moboard init.
103 */ 187 */
@@ -111,4 +195,6 @@ void __init mx31moboard_devboard_init(void)
111 mxc_register_device(&mxc_uart_device1, &uart_pdata); 195 mxc_register_device(&mxc_uart_device1, &uart_pdata);
112 196
113 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); 197 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
198
199 devboard_usbh1_init();
114} 200}
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 2bfaffb344f0..85184a35e674 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -16,17 +16,26 @@
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 17 */
18 18
19#include <linux/delay.h>
19#include <linux/gpio.h> 20#include <linux/gpio.h>
20#include <linux/init.h> 21#include <linux/init.h>
21#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/i2c.h>
24#include <linux/spi/spi.h>
22#include <linux/platform_device.h> 25#include <linux/platform_device.h>
23#include <linux/types.h> 26#include <linux/types.h>
24 27
28#include <linux/usb/otg.h>
29
25#include <mach/common.h> 30#include <mach/common.h>
26#include <mach/hardware.h> 31#include <mach/hardware.h>
27#include <mach/imx-uart.h> 32#include <mach/imx-uart.h>
28#include <mach/iomux-mx3.h> 33#include <mach/iomux-mx3.h>
29#include <mach/mmc.h> 34#include <mach/mmc.h>
35#include <mach/mxc_ehci.h>
36#include <mach/ulpi.h>
37
38#include <media/soc_camera.h>
30 39
31#include "devices.h" 40#include "devices.h"
32 41
@@ -37,7 +46,6 @@ static unsigned int marxbot_pins[] = {
37 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, 46 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
38 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, 47 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
39 /* CSI */ 48 /* CSI */
40 MX31_PIN_CSI_D4__CSI_D4, MX31_PIN_CSI_D5__CSI_D5,
41 MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7, 49 MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7,
42 MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9, 50 MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9,
43 MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11, 51 MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11,
@@ -45,10 +53,19 @@ static unsigned int marxbot_pins[] = {
45 MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15, 53 MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15,
46 MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK, 54 MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK,
47 MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC, 55 MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC,
56 MX31_PIN_CSI_D4__GPIO3_4, MX31_PIN_CSI_D5__GPIO3_5,
48 MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1, 57 MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1,
49 MX31_PIN_TXD2__GPIO1_28, 58 MX31_PIN_TXD2__GPIO1_28,
50 /* dsPIC resets */ 59 /* dsPIC resets */
51 MX31_PIN_STXD5__GPIO1_21, MX31_PIN_SRXD5__GPIO1_22, 60 MX31_PIN_STXD5__GPIO1_21, MX31_PIN_SRXD5__GPIO1_22,
61 /*battery detection */
62 MX31_PIN_LCS0__GPIO3_23,
63 /* USB H1 */
64 MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
65 MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
66 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
67 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
68 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
52}; 69};
53 70
54#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) 71#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
@@ -120,6 +137,166 @@ static void dspics_resets_init(void)
120 } 137 }
121} 138}
122 139
140static struct spi_board_info marxbot_spi_board_info[] __initdata = {
141 {
142 .modalias = "spidev",
143 .max_speed_hz = 300000,
144 .bus_num = 1,
145 .chip_select = 1, /* according spi1_cs[] ! */
146 },
147};
148
149#define TURRETCAM_POWER IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
150#define BASECAM_POWER IOMUX_TO_GPIO(MX31_PIN_CSI_D5)
151#define TURRETCAM_RST_B IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
152#define BASECAM_RST_B IOMUX_TO_GPIO(MX31_PIN_CSI_D4)
153#define CAM_CHOICE IOMUX_TO_GPIO(MX31_PIN_TXD2)
154
155static int marxbot_basecam_power(struct device *dev, int on)
156{
157 gpio_set_value(BASECAM_POWER, !on);
158 return 0;
159}
160
161static int marxbot_basecam_reset(struct device *dev)
162{
163 gpio_set_value(BASECAM_RST_B, 0);
164 udelay(100);
165 gpio_set_value(BASECAM_RST_B, 1);
166 return 0;
167}
168
169static struct i2c_board_info marxbot_i2c_devices[] = {
170 {
171 I2C_BOARD_INFO("mt9t031", 0x5d),
172 },
173};
174
175static struct soc_camera_link base_iclink = {
176 .bus_id = 0, /* Must match with the camera ID */
177 .power = marxbot_basecam_power,
178 .reset = marxbot_basecam_reset,
179 .board_info = &marxbot_i2c_devices[0],
180 .i2c_adapter_id = 0,
181 .module_name = "mt9t031",
182};
183
184static struct platform_device marxbot_camera[] = {
185 {
186 .name = "soc-camera-pdrv",
187 .id = 0,
188 .dev = {
189 .platform_data = &base_iclink,
190 },
191 },
192};
193
194static struct platform_device *marxbot_cameras[] __initdata = {
195 &marxbot_camera[0],
196};
197
198static int __init marxbot_cam_init(void)
199{
200 int ret = gpio_request(CAM_CHOICE, "cam-choice");
201 if (ret)
202 return ret;
203 gpio_direction_output(CAM_CHOICE, 1);
204
205 ret = gpio_request(BASECAM_RST_B, "basecam-reset");
206 if (ret)
207 return ret;
208 gpio_direction_output(BASECAM_RST_B, 1);
209 ret = gpio_request(BASECAM_POWER, "basecam-standby");
210 if (ret)
211 return ret;
212 gpio_direction_output(BASECAM_POWER, 0);
213
214 ret = gpio_request(TURRETCAM_RST_B, "turretcam-reset");
215 if (ret)
216 return ret;
217 gpio_direction_output(TURRETCAM_RST_B, 1);
218 ret = gpio_request(TURRETCAM_POWER, "turretcam-standby");
219 if (ret)
220 return ret;
221 gpio_direction_output(TURRETCAM_POWER, 0);
222
223 return 0;
224}
225
226#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
227 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
228
229static int marxbot_usbh1_hw_init(struct platform_device *pdev)
230{
231 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
232
233 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
234 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
235 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
236 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
237 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
238 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
239 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
240 mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
241
242 return 0;
243}
244
245#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
246#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
247
248static int marxbot_isp1105_init(struct otg_transceiver *otg)
249{
250 int ret = gpio_request(USBH1_MODE, "usbh1-mode");
251 if (ret)
252 return ret;
253 /* single ended */
254 gpio_direction_output(USBH1_MODE, 0);
255
256 ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
257 if (ret) {
258 gpio_free(USBH1_MODE);
259 return ret;
260 }
261 gpio_direction_output(USBH1_VBUSEN_B, 1);
262
263 return 0;
264}
265
266
267static int marxbot_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
268{
269 if (on)
270 gpio_set_value(USBH1_VBUSEN_B, 0);
271 else
272 gpio_set_value(USBH1_VBUSEN_B, 1);
273
274 return 0;
275}
276
277static struct mxc_usbh_platform_data usbh1_pdata = {
278 .init = marxbot_usbh1_hw_init,
279 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
280 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
281};
282
283static int __init marxbot_usbh1_init(void)
284{
285 struct otg_transceiver *otg;
286
287 otg = kzalloc(sizeof(*otg), GFP_KERNEL);
288 if (!otg)
289 return -ENOMEM;
290
291 otg->label = "ISP1105";
292 otg->init = marxbot_isp1105_init;
293 otg->set_vbus = marxbot_isp1105_set_vbus;
294
295 usbh1_pdata.otg = otg;
296
297 return mxc_register_device(&mx31_usbh1, &usbh1_pdata);
298}
299
123/* 300/*
124 * system init for baseboard usage. Will be called by mx31moboard init. 301 * system init for baseboard usage. Will be called by mx31moboard init.
125 */ 302 */
@@ -133,4 +310,17 @@ void __init mx31moboard_marxbot_init(void)
133 dspics_resets_init(); 310 dspics_resets_init();
134 311
135 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); 312 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
313
314 spi_register_board_info(marxbot_spi_board_info,
315 ARRAY_SIZE(marxbot_spi_board_info));
316
317 marxbot_cam_init();
318 platform_add_devices(marxbot_cameras, ARRAY_SIZE(marxbot_cameras));
319
320 /* battery present pin */
321 gpio_request(IOMUX_TO_GPIO(MX31_PIN_LCS0), "bat-present");
322 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0));
323 gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false);
324
325 marxbot_usbh1_init();
136} 326}
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c
index 9243de54041a..b70529145936 100644
--- a/arch/arm/mach-mx3/mx31moboard.c
+++ b/arch/arm/mach-mx3/mx31moboard.c
@@ -17,6 +17,7 @@
17 */ 17 */
18 18
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/dma-mapping.h>
20#include <linux/fsl_devices.h> 21#include <linux/fsl_devices.h>
21#include <linux/gpio.h> 22#include <linux/gpio.h>
22#include <linux/init.h> 23#include <linux/init.h>
@@ -26,8 +27,14 @@
26#include <linux/mtd/physmap.h> 27#include <linux/mtd/physmap.h>
27#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
28#include <linux/platform_device.h> 29#include <linux/platform_device.h>
30#include <linux/regulator/machine.h>
31#include <linux/mfd/mc13783.h>
32#include <linux/spi/spi.h>
29#include <linux/types.h> 33#include <linux/types.h>
30 34
35#include <linux/usb/otg.h>
36#include <linux/usb/ulpi.h>
37
31#include <asm/mach-types.h> 38#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
33#include <asm/mach/time.h> 40#include <asm/mach/time.h>
@@ -37,16 +44,20 @@
37#include <mach/hardware.h> 44#include <mach/hardware.h>
38#include <mach/imx-uart.h> 45#include <mach/imx-uart.h>
39#include <mach/iomux-mx3.h> 46#include <mach/iomux-mx3.h>
47#include <mach/ipu.h>
40#include <mach/i2c.h> 48#include <mach/i2c.h>
41#include <mach/mmc.h> 49#include <mach/mmc.h>
42#include <mach/mx31.h> 50#include <mach/mxc_ehci.h>
51#include <mach/mx3_camera.h>
52#include <mach/spi.h>
53#include <mach/ulpi.h>
43 54
44#include "devices.h" 55#include "devices.h"
45 56
46static unsigned int moboard_pins[] = { 57static unsigned int moboard_pins[] = {
47 /* UART0 */ 58 /* UART0 */
48 MX31_PIN_CTS1__CTS1, MX31_PIN_RTS1__RTS1,
49 MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, 59 MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1,
60 MX31_PIN_CTS1__GPIO2_7,
50 /* UART4 */ 61 /* UART4 */
51 MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, 62 MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5,
52 MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, 63 MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5,
@@ -73,12 +84,31 @@ static unsigned int moboard_pins[] = {
73 MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, 84 MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
74 MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, 85 MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
75 MX31_PIN_USB_OC__GPIO1_30, 86 MX31_PIN_USB_OC__GPIO1_30,
87 /* USB H2 */
88 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
89 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
90 MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3,
91 MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5,
92 MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7,
93 MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR,
94 MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP,
95 MX31_PIN_SCK6__GPIO1_25,
76 /* LEDs */ 96 /* LEDs */
77 MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, 97 MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
78 MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, 98 MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
79 /* SEL */ 99 /* SEL */
80 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9, 100 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
81 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11, 101 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
102 /* SPI1 */
103 MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO,
104 MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
105 MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2,
106 /* Atlas IRQ */
107 MX31_PIN_GPIO1_3__GPIO1_3,
108 /* SPI2 */
109 MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO,
110 MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY,
111 MX31_PIN_CSPI2_SS1__CSPI3_SS1,
82}; 112};
83 113
84static struct physmap_flash_data mx31moboard_flash_data = { 114static struct physmap_flash_data mx31moboard_flash_data = {
@@ -101,7 +131,18 @@ static struct platform_device mx31moboard_flash = {
101 .num_resources = 1, 131 .num_resources = 1,
102}; 132};
103 133
104static struct imxuart_platform_data uart_pdata = { 134static int moboard_uart0_init(struct platform_device *pdev)
135{
136 gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack");
137 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0);
138 return 0;
139}
140
141static struct imxuart_platform_data uart0_pdata = {
142 .init = moboard_uart0_init,
143};
144
145static struct imxuart_platform_data uart4_pdata = {
105 .flags = IMXUART_HAVE_RTSCTS, 146 .flags = IMXUART_HAVE_RTSCTS,
106}; 147};
107 148
@@ -113,6 +154,103 @@ static struct imxi2c_platform_data moboard_i2c1_pdata = {
113 .bitrate = 100000, 154 .bitrate = 100000,
114}; 155};
115 156
157static int moboard_spi1_cs[] = {
158 MXC_SPI_CS(0),
159 MXC_SPI_CS(2),
160};
161
162static struct spi_imx_master moboard_spi1_master = {
163 .chipselect = moboard_spi1_cs,
164 .num_chipselect = ARRAY_SIZE(moboard_spi1_cs),
165};
166
167static struct regulator_consumer_supply sdhc_consumers[] = {
168 {
169 .dev = &mxcsdhc_device0.dev,
170 .supply = "sdhc0_vcc",
171 },
172 {
173 .dev = &mxcsdhc_device1.dev,
174 .supply = "sdhc1_vcc",
175 },
176};
177
178static struct regulator_init_data sdhc_vreg_data = {
179 .constraints = {
180 .min_uV = 2700000,
181 .max_uV = 3000000,
182 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
183 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
184 .valid_modes_mask = REGULATOR_MODE_NORMAL |
185 REGULATOR_MODE_FAST,
186 .always_on = 0,
187 .boot_on = 1,
188 },
189 .num_consumer_supplies = ARRAY_SIZE(sdhc_consumers),
190 .consumer_supplies = sdhc_consumers,
191};
192
193static struct regulator_consumer_supply cam_consumers[] = {
194 {
195 .dev = &mx3_camera.dev,
196 .supply = "cam_vcc",
197 },
198};
199
200static struct regulator_init_data cam_vreg_data = {
201 .constraints = {
202 .min_uV = 2700000,
203 .max_uV = 3000000,
204 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
205 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
206 .valid_modes_mask = REGULATOR_MODE_NORMAL |
207 REGULATOR_MODE_FAST,
208 .always_on = 0,
209 .boot_on = 1,
210 },
211 .num_consumer_supplies = ARRAY_SIZE(cam_consumers),
212 .consumer_supplies = cam_consumers,
213};
214
215static struct mc13783_regulator_init_data moboard_regulators[] = {
216 {
217 .id = MC13783_REGU_VMMC1,
218 .init_data = &sdhc_vreg_data,
219 },
220 {
221 .id = MC13783_REGU_VCAM,
222 .init_data = &cam_vreg_data,
223 },
224};
225
226static struct mc13783_platform_data moboard_pmic = {
227 .regulators = moboard_regulators,
228 .num_regulators = ARRAY_SIZE(moboard_regulators),
229 .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC |
230 MC13783_USE_ADC,
231};
232
233static struct spi_board_info moboard_spi_board_info[] __initdata = {
234 {
235 .modalias = "mc13783",
236 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
237 .max_speed_hz = 300000,
238 .bus_num = 1,
239 .chip_select = 0,
240 .platform_data = &moboard_pmic,
241 .mode = SPI_CS_HIGH,
242 },
243};
244
245static int moboard_spi2_cs[] = {
246 MXC_SPI_CS(1),
247};
248
249static struct spi_imx_master moboard_spi2_master = {
250 .chipselect = moboard_spi2_cs,
251 .num_chipselect = ARRAY_SIZE(moboard_spi2_cs),
252};
253
116#define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) 254#define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0)
117#define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) 255#define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1)
118 256
@@ -208,6 +346,56 @@ static struct fsl_usb2_platform_data usb_pdata = {
208 .phy_mode = FSL_USB2_PHY_ULPI, 346 .phy_mode = FSL_USB2_PHY_ULPI,
209}; 347};
210 348
349#define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6)
350
351static int moboard_usbh2_hw_init(struct platform_device *pdev)
352{
353 int ret = gpio_request(USBH2_EN_B, "usbh2-en");
354 if (ret)
355 return ret;
356
357 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
358
359 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
360 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
361 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
362 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
363 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
364 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
365 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
366 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
367 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
368 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
369 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
370 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
371
372 gpio_direction_output(USBH2_EN_B, 0);
373
374 return 0;
375}
376
377static int moboard_usbh2_hw_exit(struct platform_device *pdev)
378{
379 gpio_free(USBH2_EN_B);
380 return 0;
381}
382
383static struct mxc_usbh_platform_data usbh2_pdata = {
384 .init = moboard_usbh2_hw_init,
385 .exit = moboard_usbh2_hw_exit,
386 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
387 .flags = MXC_EHCI_POWER_PINS_ENABLED,
388};
389
390static int __init moboard_usbh2_init(void)
391{
392 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
393 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
394
395 return mxc_register_device(&mx31_usbh2, &usbh2_pdata);
396}
397
398
211static struct gpio_led mx31moboard_leds[] = { 399static struct gpio_led mx31moboard_leds[] = {
212 { 400 {
213 .name = "coreboard-led-0:red:running", 401 .name = "coreboard-led-0:red:running",
@@ -266,11 +454,48 @@ static void mx31moboard_init_sel_gpios(void)
266 } 454 }
267} 455}
268 456
457static struct ipu_platform_data mx3_ipu_data = {
458 .irq_base = MXC_IPU_IRQ_START,
459};
460
269static struct platform_device *devices[] __initdata = { 461static struct platform_device *devices[] __initdata = {
270 &mx31moboard_flash, 462 &mx31moboard_flash,
271 &mx31moboard_leds_device, 463 &mx31moboard_leds_device,
272}; 464};
273 465
466static struct mx3_camera_pdata camera_pdata = {
467 .dma_dev = &mx3_ipu.dev,
468 .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
469 .mclk_10khz = 4800,
470};
471
472#define CAMERA_BUF_SIZE (4*1024*1024)
473
474static int __init mx31moboard_cam_alloc_dma(const size_t buf_size)
475{
476 dma_addr_t dma_handle;
477 void *buf;
478 int dma;
479
480 if (buf_size < 2 * 1024 * 1024)
481 return -EINVAL;
482
483 buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
484 if (!buf) {
485 pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
486 return -ENOMEM;
487 }
488
489 memset(buf, 0, buf_size);
490
491 dma = dma_declare_coherent_memory(&mx3_camera.dev,
492 dma_handle, dma_handle, buf_size,
493 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
494
495 /* The way we call dma_declare_coherent_memory only a malloc can fail */
496 return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
497}
498
274static int mx31moboard_baseboard; 499static int mx31moboard_baseboard;
275core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); 500core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444);
276 501
@@ -284,20 +509,34 @@ static void __init mxc_board_init(void)
284 509
285 platform_add_devices(devices, ARRAY_SIZE(devices)); 510 platform_add_devices(devices, ARRAY_SIZE(devices));
286 511
287 mxc_register_device(&mxc_uart_device0, &uart_pdata); 512 mxc_register_device(&mxc_uart_device0, &uart0_pdata);
288 mxc_register_device(&mxc_uart_device4, &uart_pdata); 513
514 mxc_register_device(&mxc_uart_device4, &uart4_pdata);
289 515
290 mx31moboard_init_sel_gpios(); 516 mx31moboard_init_sel_gpios();
291 517
292 mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); 518 mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata);
293 mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); 519 mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata);
294 520
521 mxc_register_device(&mxc_spi_device1, &moboard_spi1_master);
522 mxc_register_device(&mxc_spi_device2, &moboard_spi2_master);
523
524 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq");
525 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
526 spi_register_board_info(moboard_spi_board_info,
527 ARRAY_SIZE(moboard_spi_board_info));
528
295 mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); 529 mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata);
296 530
531 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
532 if (!mx31moboard_cam_alloc_dma(CAMERA_BUF_SIZE))
533 mxc_register_device(&mx3_camera, &camera_pdata);
534
297 usb_xcvr_reset(); 535 usb_xcvr_reset();
298 536
299 moboard_usbotg_init(); 537 moboard_usbotg_init();
300 mxc_register_device(&mxc_otg_udc_device, &usb_pdata); 538 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
539 moboard_usbh2_init();
301 540
302 switch (mx31moboard_baseboard) { 541 switch (mx31moboard_baseboard) {
303 case MX31NOBOARD: 542 case MX31NOBOARD:
diff --git a/arch/arm/mach-mx3/mx35pdk.c b/arch/arm/mach-mx3/mx35pdk.c
index 6ff186e46ceb..0bbc65ea23c8 100644
--- a/arch/arm/mach-mx3/mx35pdk.c
+++ b/arch/arm/mach-mx3/mx35pdk.c
@@ -23,6 +23,7 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/memory.h> 24#include <linux/memory.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/fsl_devices.h>
26 27
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
@@ -69,6 +70,15 @@ static struct pad_desc mx35pdk_pads[] = {
69 MX35_PAD_FEC_TDATA2__FEC_TDATA_2, 70 MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
70 MX35_PAD_FEC_RDATA3__FEC_RDATA_3, 71 MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
71 MX35_PAD_FEC_TDATA3__FEC_TDATA_3, 72 MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
73 /* USBOTG */
74 MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
75 MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
76};
77
78/* OTG config */
79static struct fsl_usb2_platform_data usb_pdata = {
80 .operating_mode = FSL_USB2_DR_DEVICE,
81 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
72}; 82};
73 83
74/* 84/*
@@ -81,6 +91,8 @@ static void __init mxc_board_init(void)
81 platform_add_devices(devices, ARRAY_SIZE(devices)); 91 platform_add_devices(devices, ARRAY_SIZE(devices));
82 92
83 mxc_register_device(&mxc_uart_device0, &uart_pdata); 93 mxc_register_device(&mxc_uart_device0, &uart_pdata);
94
95 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
84} 96}
85 97
86static void __init mx35pdk_timer_init(void) 98static void __init mx35pdk_timer_init(void)
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/pcm043.c
index e18a224671fa..e3aa829be586 100644
--- a/arch/arm/mach-mx3/pcm043.c
+++ b/arch/arm/mach-mx3/pcm043.c
@@ -43,6 +43,7 @@
43#include <mach/iomux-mx35.h> 43#include <mach/iomux-mx35.h>
44#include <mach/ipu.h> 44#include <mach/ipu.h>
45#include <mach/mx3fb.h> 45#include <mach/mx3fb.h>
46#include <mach/mxc_nand.h>
46 47
47#include "devices.h" 48#include "devices.h"
48 49
@@ -206,6 +207,11 @@ static struct pad_desc pcm043_pads[] = {
206 MX35_PAD_ATA_CS0__GPIO2_6, 207 MX35_PAD_ATA_CS0__GPIO2_6,
207}; 208};
208 209
210static struct mxc_nand_platform_data pcm037_nand_board_info = {
211 .width = 1,
212 .hw_ecc = 1,
213};
214
209/* 215/*
210 * Board specific initialization. 216 * Board specific initialization.
211 */ 217 */
@@ -216,6 +222,7 @@ static void __init mxc_board_init(void)
216 platform_add_devices(devices, ARRAY_SIZE(devices)); 222 platform_add_devices(devices, ARRAY_SIZE(devices));
217 223
218 mxc_register_device(&mxc_uart_device0, &uart_pdata); 224 mxc_register_device(&mxc_uart_device0, &uart_pdata);
225 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
219 226
220 mxc_register_device(&mxc_uart_device1, &uart_pdata); 227 mxc_register_device(&mxc_uart_device1, &uart_pdata);
221 228
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 16:11:24 -0500