diff options
author | Juergen Beisert <j.beisert@pengutronix.de> | 2008-07-05 04:02:50 -0400 |
---|---|---|
committer | Robert Schwebel <r.schwebel@pengutronix.de> | 2008-07-05 04:02:50 -0400 |
commit | d0f349fbce2905607e0473d2358f97f48866e52c (patch) | |
tree | 7b6892554648c4ab2eae4b29a054787399a49094 /arch/arm/mach-mx3 | |
parent | 90292ea60f1c730efb9fea02b2e12676da89ebef (diff) |
i.MXC family: Adding timer support
This patch adds timer support for the i.MX machine family. This code can
be used on the following machs:
- i.MX1 (tested)
- i.MX2 (i.MX21 (to be tested), i.MX27 (tested))
- i.MX3 (i.MX31 (tested))
TODO: It seems impossible to build a kernel for more than one CPU because the
timer do not follow the platform device rules. So it does only work if
timer 1 can be accessed on all CPUs at the same address.
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3')
-rw-r--r-- | arch/arm/mach-mx3/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx31ads.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-mx3/time.c | 148 |
3 files changed, 13 insertions, 150 deletions
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile index 68f062b70d33..562c75d2e379 100644 --- a/arch/arm/mach-mx3/Makefile +++ b/arch/arm/mach-mx3/Makefile | |||
@@ -4,5 +4,5 @@ | |||
4 | 4 | ||
5 | # Object file lists. | 5 | # Object file lists. |
6 | 6 | ||
7 | obj-y := mm.o time.o clock.o devices.o iomux.o | 7 | obj-y := mm.o clock.o devices.o iomux.o |
8 | obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o | 8 | obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o |
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index 5addbb7f711c..eba3e0cd4283 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/hardware.h> | 26 | #include <asm/hardware.h> |
27 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
28 | #include <asm/mach/arch.h> | 28 | #include <asm/mach/arch.h> |
29 | #include <asm/mach/time.h> | ||
29 | #include <asm/memory.h> | 30 | #include <asm/memory.h> |
30 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
31 | #include <asm/arch/common.h> | 32 | #include <asm/arch/common.h> |
@@ -127,6 +128,16 @@ static void __init mxc_board_init(void) | |||
127 | mxc_init_extuart(); | 128 | mxc_init_extuart(); |
128 | } | 129 | } |
129 | 130 | ||
131 | static void __init mx31ads_timer_init(void) | ||
132 | { | ||
133 | mxc_clocks_init(26000000); | ||
134 | mxc_timer_init("ipg_clk.0"); | ||
135 | } | ||
136 | |||
137 | struct sys_timer mx31ads_timer = { | ||
138 | .init = mx31ads_timer_init, | ||
139 | }; | ||
140 | |||
130 | /* | 141 | /* |
131 | * The following uses standard kernel macros defined in arch.h in order to | 142 | * The following uses standard kernel macros defined in arch.h in order to |
132 | * initialize __mach_desc_MX31ADS data structure. | 143 | * initialize __mach_desc_MX31ADS data structure. |
@@ -139,5 +150,5 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS") | |||
139 | .map_io = mx31ads_map_io, | 150 | .map_io = mx31ads_map_io, |
140 | .init_irq = mxc_init_irq, | 151 | .init_irq = mxc_init_irq, |
141 | .init_machine = mxc_board_init, | 152 | .init_machine = mxc_board_init, |
142 | .timer = &mxc_timer, | 153 | .timer = &mx31ads_timer, |
143 | MACHINE_END | 154 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/time.c b/arch/arm/mach-mx3/time.c deleted file mode 100644 index fb565c98dbfb..000000000000 --- a/arch/arm/mach-mx3/time.c +++ /dev/null | |||
@@ -1,148 +0,0 @@ | |||
1 | /* | ||
2 | * System Timer Interrupt reconfigured to run in free-run mode. | ||
3 | * Author: Vitaly Wool | ||
4 | * Copyright 2004 MontaVista Software Inc. | ||
5 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
6 | */ | ||
7 | |||
8 | /* | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | /*! | ||
15 | * @file time.c | ||
16 | * @brief This file contains OS tick and wdog timer implementations. | ||
17 | * | ||
18 | * This file contains OS tick and wdog timer implementations. | ||
19 | * | ||
20 | * @ingroup Timers | ||
21 | */ | ||
22 | |||
23 | #include <linux/module.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/interrupt.h> | ||
26 | #include <linux/irq.h> | ||
27 | #include <asm/hardware.h> | ||
28 | #include <asm/mach/time.h> | ||
29 | #include <asm/io.h> | ||
30 | #include <asm/arch/common.h> | ||
31 | |||
32 | /*! | ||
33 | * This is the timer interrupt service routine to do required tasks. | ||
34 | * It also services the WDOG timer at the frequency of twice per WDOG | ||
35 | * timeout value. For example, if the WDOG's timeout value is 4 (2 | ||
36 | * seconds since the WDOG runs at 0.5Hz), it will be serviced once | ||
37 | * every 2/2=1 second. | ||
38 | * | ||
39 | * @param irq GPT interrupt source number (not used) | ||
40 | * @param dev_id this parameter is not used | ||
41 | * @return always returns \b IRQ_HANDLED as defined in | ||
42 | * include/linux/interrupt.h. | ||
43 | */ | ||
44 | static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) | ||
45 | { | ||
46 | unsigned int next_match; | ||
47 | |||
48 | if (__raw_readl(MXC_GPT_GPTSR) & GPTSR_OF1) { | ||
49 | do { | ||
50 | timer_tick(); | ||
51 | next_match = __raw_readl(MXC_GPT_GPTOCR1) + LATCH; | ||
52 | __raw_writel(GPTSR_OF1, MXC_GPT_GPTSR); | ||
53 | __raw_writel(next_match, MXC_GPT_GPTOCR1); | ||
54 | } while ((signed long)(next_match - | ||
55 | __raw_readl(MXC_GPT_GPTCNT)) <= 0); | ||
56 | } | ||
57 | |||
58 | return IRQ_HANDLED; | ||
59 | } | ||
60 | |||
61 | /*! | ||
62 | * This function is used to obtain the number of microseconds since the last | ||
63 | * timer interrupt. Note that interrupts is disabled by do_gettimeofday(). | ||
64 | * | ||
65 | * @return the number of microseconds since the last timer interrupt. | ||
66 | */ | ||
67 | static unsigned long mxc_gettimeoffset(void) | ||
68 | { | ||
69 | unsigned long ticks_to_match, elapsed, usec, tick_usec, i; | ||
70 | |||
71 | /* Get ticks before next timer match */ | ||
72 | ticks_to_match = | ||
73 | __raw_readl(MXC_GPT_GPTOCR1) - __raw_readl(MXC_GPT_GPTCNT); | ||
74 | |||
75 | /* We need elapsed ticks since last match */ | ||
76 | elapsed = LATCH - ticks_to_match; | ||
77 | |||
78 | /* Now convert them to usec */ | ||
79 | /* Insure no overflow when calculating the usec below */ | ||
80 | for (i = 1, tick_usec = tick_nsec / 1000;; i *= 2) { | ||
81 | tick_usec /= i; | ||
82 | if ((0xFFFFFFFF / tick_usec) > elapsed) | ||
83 | break; | ||
84 | } | ||
85 | usec = (unsigned long)(elapsed * tick_usec) / (LATCH / i); | ||
86 | |||
87 | return usec; | ||
88 | } | ||
89 | |||
90 | /*! | ||
91 | * The OS tick timer interrupt structure. | ||
92 | */ | ||
93 | static struct irqaction timer_irq = { | ||
94 | .name = "MXC Timer Tick", | ||
95 | .flags = IRQF_DISABLED | IRQF_TIMER, | ||
96 | .handler = mxc_timer_interrupt | ||
97 | }; | ||
98 | |||
99 | /*! | ||
100 | * This function is used to initialize the GPT to produce an interrupt | ||
101 | * based on HZ. It is called by start_kernel() during system startup. | ||
102 | */ | ||
103 | void __init mxc_init_time(void) | ||
104 | { | ||
105 | u32 reg, v; | ||
106 | reg = __raw_readl(MXC_GPT_GPTCR); | ||
107 | reg &= ~GPTCR_ENABLE; | ||
108 | __raw_writel(reg, MXC_GPT_GPTCR); | ||
109 | reg |= GPTCR_SWR; | ||
110 | __raw_writel(reg, MXC_GPT_GPTCR); | ||
111 | |||
112 | while ((__raw_readl(MXC_GPT_GPTCR) & GPTCR_SWR) != 0) | ||
113 | cpu_relax(); | ||
114 | |||
115 | reg = GPTCR_FRR | GPTCR_CLKSRC_HIGHFREQ; | ||
116 | __raw_writel(reg, MXC_GPT_GPTCR); | ||
117 | |||
118 | /* TODO: get timer rate from clk driver */ | ||
119 | v = 66500000; | ||
120 | |||
121 | __raw_writel((v / CLOCK_TICK_RATE) - 1, MXC_GPT_GPTPR); | ||
122 | |||
123 | if ((v % CLOCK_TICK_RATE) != 0) { | ||
124 | pr_info("\nWARNING: Can't generate CLOCK_TICK_RATE at %d Hz\n", | ||
125 | CLOCK_TICK_RATE); | ||
126 | } | ||
127 | pr_info("Actual CLOCK_TICK_RATE is %d Hz\n", | ||
128 | v / ((__raw_readl(MXC_GPT_GPTPR) & 0xFFF) + 1)); | ||
129 | |||
130 | reg = __raw_readl(MXC_GPT_GPTCNT); | ||
131 | reg += LATCH; | ||
132 | __raw_writel(reg, MXC_GPT_GPTOCR1); | ||
133 | |||
134 | setup_irq(MXC_INT_GPT, &timer_irq); | ||
135 | |||
136 | reg = __raw_readl(MXC_GPT_GPTCR); | ||
137 | reg = | ||
138 | GPTCR_FRR | GPTCR_CLKSRC_HIGHFREQ | GPTCR_STOPEN | GPTCR_DOZEN | | ||
139 | GPTCR_WAITEN | GPTCR_ENMOD | GPTCR_ENABLE; | ||
140 | __raw_writel(reg, MXC_GPT_GPTCR); | ||
141 | |||
142 | __raw_writel(GPTIR_OF1IE, MXC_GPT_GPTIR); | ||
143 | } | ||
144 | |||
145 | struct sys_timer mxc_timer = { | ||
146 | .init = mxc_init_time, | ||
147 | .offset = mxc_gettimeoffset, | ||
148 | }; | ||