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authorAlberto Panizzo <alberto@amarulasolutions.com>2011-03-07 05:46:38 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2011-03-08 07:24:21 -0500
commite42010e0e129cc31a83ce9d8d1c7e1d50ba155f3 (patch)
tree389282470f9d3bf54e4c63af860f1615c20dc794 /arch/arm/mach-mx3
parent0ce88b34ea5a1b48438848739a72da6b4fe7a5fa (diff)
mach-mx31_3ds: Add support for framebuffer and LCD
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3')
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c130
1 files changed, 130 insertions, 0 deletions
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index cff920696e79..d760a06c9e3c 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -21,6 +21,7 @@
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/mfd/mc13783.h> 22#include <linux/mfd/mc13783.h>
23#include <linux/spi/spi.h> 23#include <linux/spi/spi.h>
24#include <linux/spi/l4f00242t03.h>
24#include <linux/regulator/machine.h> 25#include <linux/regulator/machine.h>
25#include <linux/usb/otg.h> 26#include <linux/usb/otg.h>
26#include <linux/usb/ulpi.h> 27#include <linux/usb/ulpi.h>
@@ -36,6 +37,8 @@
36#include <mach/3ds_debugboard.h> 37#include <mach/3ds_debugboard.h>
37#include <mach/ulpi.h> 38#include <mach/ulpi.h>
38#include <mach/mmc.h> 39#include <mach/mmc.h>
40#include <mach/ipu.h>
41#include <mach/mx3fb.h>
39 42
40#include "devices-imx31.h" 43#include "devices-imx31.h"
41#include "devices.h" 44#include "devices.h"
@@ -50,6 +53,12 @@ static int mx31_3ds_pins[] = {
50 MX31_PIN_TXD1__TXD1, 53 MX31_PIN_TXD1__TXD1,
51 MX31_PIN_RXD1__RXD1, 54 MX31_PIN_RXD1__RXD1,
52 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), 55 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
56 /*SPI0*/
57 MX31_PIN_CSPI1_SCLK__SCLK,
58 MX31_PIN_CSPI1_MOSI__MOSI,
59 MX31_PIN_CSPI1_MISO__MISO,
60 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
61 MX31_PIN_CSPI1_SS2__SS2, /* CS for LCD */
53 /* SPI 1 */ 62 /* SPI 1 */
54 MX31_PIN_CSPI2_SCLK__SCLK, 63 MX31_PIN_CSPI2_SCLK__SCLK,
55 MX31_PIN_CSPI2_MOSI__MOSI, 64 MX31_PIN_CSPI2_MOSI__MOSI,
@@ -109,6 +118,70 @@ static int mx31_3ds_pins[] = {
109 MX31_PIN_SD1_CMD__SD1_CMD, 118 MX31_PIN_SD1_CMD__SD1_CMD,
110 MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */ 119 MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */
111 MX31_PIN_GPIO3_0__GPIO3_0, /* OE */ 120 MX31_PIN_GPIO3_0__GPIO3_0, /* OE */
121 /* Framebuffer */
122 MX31_PIN_LD0__LD0,
123 MX31_PIN_LD1__LD1,
124 MX31_PIN_LD2__LD2,
125 MX31_PIN_LD3__LD3,
126 MX31_PIN_LD4__LD4,
127 MX31_PIN_LD5__LD5,
128 MX31_PIN_LD6__LD6,
129 MX31_PIN_LD7__LD7,
130 MX31_PIN_LD8__LD8,
131 MX31_PIN_LD9__LD9,
132 MX31_PIN_LD10__LD10,
133 MX31_PIN_LD11__LD11,
134 MX31_PIN_LD12__LD12,
135 MX31_PIN_LD13__LD13,
136 MX31_PIN_LD14__LD14,
137 MX31_PIN_LD15__LD15,
138 MX31_PIN_LD16__LD16,
139 MX31_PIN_LD17__LD17,
140 MX31_PIN_VSYNC3__VSYNC3,
141 MX31_PIN_HSYNC__HSYNC,
142 MX31_PIN_FPSHIFT__FPSHIFT,
143 MX31_PIN_CONTRAST__CONTRAST,
144};
145
146/*
147 * FB support
148 */
149static const struct fb_videomode fb_modedb[] = {
150 { /* 480x640 @ 60 Hz */
151 .name = "Epson-VGA",
152 .refresh = 60,
153 .xres = 480,
154 .yres = 640,
155 .pixclock = 41701,
156 .left_margin = 20,
157 .right_margin = 41,
158 .upper_margin = 10,
159 .lower_margin = 5,
160 .hsync_len = 20,
161 .vsync_len = 10,
162 .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
163 .vmode = FB_VMODE_NONINTERLACED,
164 .flag = 0,
165 },
166};
167
168static struct ipu_platform_data mx3_ipu_data = {
169 .irq_base = MXC_IPU_IRQ_START,
170};
171
172static struct mx3fb_platform_data mx3fb_pdata = {
173 .dma_dev = &mx3_ipu.dev,
174 .name = "Epson-VGA",
175 .mode = fb_modedb,
176 .num_modes = ARRAY_SIZE(fb_modedb),
177};
178
179/* LCD */
180static struct l4f00242t03_pdata mx31_3ds_l4f00242t03_pdata = {
181 .reset_gpio = IOMUX_TO_GPIO(MX31_PIN_LCS1),
182 .data_enable_gpio = IOMUX_TO_GPIO(MX31_PIN_SER_RS),
183 .core_supply = "lcd_2v8",
184 .io_supply = "vdd_lcdio",
112}; 185};
113 186
114/* 187/*
@@ -232,6 +305,38 @@ static struct regulator_init_data vmmc2_init = {
232 .consumer_supplies = vmmc2_consumers, 305 .consumer_supplies = vmmc2_consumers,
233}; 306};
234 307
308static struct regulator_consumer_supply vmmc1_consumers[] = {
309 REGULATOR_SUPPLY("lcd_2v8", NULL),
310};
311
312static struct regulator_init_data vmmc1_init = {
313 .constraints = {
314 .min_uV = 2800000,
315 .max_uV = 2800000,
316 .apply_uV = 1,
317 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
318 REGULATOR_CHANGE_STATUS,
319 },
320 .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
321 .consumer_supplies = vmmc1_consumers,
322};
323
324static struct regulator_consumer_supply vgen_consumers[] = {
325 REGULATOR_SUPPLY("vdd_lcdio", NULL),
326};
327
328static struct regulator_init_data vgen_init = {
329 .constraints = {
330 .min_uV = 1800000,
331 .max_uV = 1800000,
332 .apply_uV = 1,
333 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
334 REGULATOR_CHANGE_STATUS,
335 },
336 .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
337 .consumer_supplies = vgen_consumers,
338};
339
235static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = { 340static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
236 { 341 {
237 .id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */ 342 .id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
@@ -249,6 +354,12 @@ static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
249 }, { 354 }, {
250 .id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */ 355 .id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */
251 .init_data = &vmmc2_init, 356 .init_data = &vmmc2_init,
357 }, {
358 .id = MC13783_REG_VMMC1, /* Power LCD, CMOS, FM, GPS, Accel. */
359 .init_data = &vmmc1_init,
360 }, {
361 .id = MC13783_REG_VGEN, /* Power LCD */
362 .init_data = &vgen_init,
252 }, 363 },
253}; 364};
254 365
@@ -260,6 +371,15 @@ static struct mc13xxx_platform_data mc13783_pdata __initdata = {
260}; 371};
261 372
262/* SPI */ 373/* SPI */
374static int spi0_internal_chipselect[] = {
375 MXC_SPI_CS(2),
376};
377
378static const struct spi_imx_master spi0_pdata __initconst = {
379 .chipselect = spi0_internal_chipselect,
380 .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
381};
382
263static int spi1_internal_chipselect[] = { 383static int spi1_internal_chipselect[] = {
264 MXC_SPI_CS(0), 384 MXC_SPI_CS(0),
265 MXC_SPI_CS(2), 385 MXC_SPI_CS(2),
@@ -279,6 +399,12 @@ static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
279 .platform_data = &mc13783_pdata, 399 .platform_data = &mc13783_pdata,
280 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), 400 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
281 .mode = SPI_CS_HIGH, 401 .mode = SPI_CS_HIGH,
402 }, {
403 .modalias = "l4f00242t03",
404 .max_speed_hz = 5000000,
405 .bus_num = 0,
406 .chip_select = 0, /* SS2 */
407 .platform_data = &mx31_3ds_l4f00242t03_pdata,
282 }, 408 },
283}; 409};
284 410
@@ -461,6 +587,10 @@ static void __init mx31_3ds_init(void)
461 imx31_add_imx2_wdt(NULL); 587 imx31_add_imx2_wdt(NULL);
462 imx31_add_imx_i2c0(&mx31_3ds_i2c0_data); 588 imx31_add_imx_i2c0(&mx31_3ds_i2c0_data);
463 imx31_add_mxc_mmc(0, &sdhc1_pdata); 589 imx31_add_mxc_mmc(0, &sdhc1_pdata);
590
591 imx31_add_spi_imx0(&spi0_pdata);
592 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
593 mxc_register_device(&mx3_fb, &mx3fb_pdata);
464} 594}
465 595
466static void __init mx31_3ds_timer_init(void) 596static void __init mx31_3ds_timer_init(void)