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authorMark Brown <broonie@opensource.wolfsonmicro.com>2009-01-15 11:14:30 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2009-03-13 05:34:05 -0400
commitfe7316bff119a11e68f895ecf9a5a713ed30004c (patch)
treee7e25be8d53dc6d9b87ad23145e24c4cfd989a94 /arch/arm/mach-mx3
parentbab389c8750d7f41f499517b308600f13bd2788d (diff)
mx31ads: Initial support for Wolfson Microelectronics 1133-EV1 module
The i.MX31ADS supports pluggable PMU modules, including the WM835x based Wolfson Microelectronics 1133-EV1. These boards provide power, audio, RTC and watchdiog services to the system. This patch adds initial support for those boards in I2C mode. Currently support is limited by the available support for the features of the i.MX31 in the mainline kernel. Some further work will be needed once other PMU modules are supported and once there is SPI support. Many of the regulator constraints will be sharable with other PMU boards. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3')
-rw-r--r--arch/arm/mach-mx3/Kconfig9
-rw-r--r--arch/arm/mach-mx3/mx31ads.c294
2 files changed, 303 insertions, 0 deletions
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index e79659e8176e..6fea54196324 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -8,6 +8,15 @@ config MACH_MX31ADS
8 Include support for MX31ADS platform. This includes specific 8 Include support for MX31ADS platform. This includes specific
9 configurations for the board and its peripherals. 9 configurations for the board and its peripherals.
10 10
11config MACH_MX31ADS_WM1133_EV1
12 bool "Support Wolfson Microelectronics 1133-EV1 module"
13 depends on MACH_MX31ADS
14 select MFD_WM8350_CONFIG_MODE_0
15 select MFD_WM8352_CONFIG_MODE_0
16 help
17 Include support for the Wolfson Microelectronics 1133-EV1 PMU
18 and audio module for the MX31ADS platform.
19
11config MACH_PCM037 20config MACH_PCM037
12 bool "Support Phytec pcm037 platforms" 21 bool "Support Phytec pcm037 platforms"
13 help 22 help
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
index 7941db3caf6f..5c76ac5ba0fe 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -22,6 +22,8 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/serial_8250.h> 24#include <linux/serial_8250.h>
25#include <linux/gpio.h>
26#include <linux/i2c.h>
25#include <linux/irq.h> 27#include <linux/irq.h>
26 28
27#include <mach/hardware.h> 29#include <mach/hardware.h>
@@ -35,6 +37,12 @@
35#include <mach/imx-uart.h> 37#include <mach/imx-uart.h>
36#include <mach/iomux-mx3.h> 38#include <mach/iomux-mx3.h>
37 39
40#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
41#include <linux/mfd/wm8350/audio.h>
42#include <linux/mfd/wm8350/core.h>
43#include <linux/mfd/wm8350/pmic.h>
44#endif
45
38#include "devices.h" 46#include "devices.h"
39 47
40/*! 48/*!
@@ -194,6 +202,291 @@ static void __init mx31ads_init_expio(void)
194 set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); 202 set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
195} 203}
196 204
205#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
206/* This section defines setup for the Wolfson Microelectronics
207 * 1133-EV1 PMU/audio board. When other PMU boards are supported the
208 * regulator definitions may be shared with them, but for now they can
209 * only be used with this board so would generate warnings about
210 * unused statics and some of the configuration is specific to this
211 * module.
212 */
213
214/* CPU */
215static struct regulator_consumer_supply sw1a_consumers[] = {
216 {
217 .supply = "cpu_vcc",
218 }
219};
220
221static struct regulator_init_data sw1a_data = {
222 .constraints = {
223 .name = "SW1A",
224 .min_uV = 1275000,
225 .max_uV = 1600000,
226 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
227 REGULATOR_CHANGE_MODE,
228 .valid_modes_mask = REGULATOR_MODE_NORMAL |
229 REGULATOR_MODE_FAST,
230 .state_mem = {
231 .uV = 1400000,
232 .mode = REGULATOR_MODE_NORMAL,
233 .enabled = 1,
234 },
235 .initial_state = PM_SUSPEND_MEM,
236 .always_on = 1,
237 .boot_on = 1,
238 },
239 .num_consumer_supplies = ARRAY_SIZE(sw1a_consumers),
240 .consumer_supplies = sw1a_consumers,
241};
242
243/* System IO - High */
244static struct regulator_init_data viohi_data = {
245 .constraints = {
246 .name = "VIOHO",
247 .min_uV = 2800000,
248 .max_uV = 2800000,
249 .state_mem = {
250 .uV = 2800000,
251 .mode = REGULATOR_MODE_NORMAL,
252 .enabled = 1,
253 },
254 .initial_state = PM_SUSPEND_MEM,
255 .always_on = 1,
256 .boot_on = 1,
257 },
258};
259
260/* System IO - Low */
261static struct regulator_init_data violo_data = {
262 .constraints = {
263 .name = "VIOLO",
264 .min_uV = 1800000,
265 .max_uV = 1800000,
266 .state_mem = {
267 .uV = 1800000,
268 .mode = REGULATOR_MODE_NORMAL,
269 .enabled = 1,
270 },
271 .initial_state = PM_SUSPEND_MEM,
272 .always_on = 1,
273 .boot_on = 1,
274 },
275};
276
277/* DDR RAM */
278static struct regulator_init_data sw2a_data = {
279 .constraints = {
280 .name = "SW2A",
281 .min_uV = 1800000,
282 .max_uV = 1800000,
283 .valid_modes_mask = REGULATOR_MODE_NORMAL,
284 .state_mem = {
285 .uV = 1800000,
286 .mode = REGULATOR_MODE_NORMAL,
287 .enabled = 1,
288 },
289 .state_disk = {
290 .mode = REGULATOR_MODE_NORMAL,
291 .enabled = 0,
292 },
293 .always_on = 1,
294 .boot_on = 1,
295 .initial_state = PM_SUSPEND_MEM,
296 },
297};
298
299static struct regulator_init_data ldo1_data = {
300 .constraints = {
301 .name = "VCAM/VMMC1/VMMC2",
302 .min_uV = 2800000,
303 .max_uV = 2800000,
304 .valid_modes_mask = REGULATOR_MODE_NORMAL,
305 .apply_uV = 1,
306 },
307};
308
309static struct regulator_consumer_supply ldo2_consumers[] = {
310 {
311 .supply = "AVDD",
312 },
313 {
314 .supply = "HPVDD",
315 },
316};
317
318/* CODEC and SIM */
319static struct regulator_init_data ldo2_data = {
320 .constraints = {
321 .name = "VESIM/VSIM/AVDD",
322 .min_uV = 3300000,
323 .max_uV = 3300000,
324 .valid_modes_mask = REGULATOR_MODE_NORMAL,
325 .apply_uV = 1,
326 },
327 .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
328 .consumer_supplies = ldo2_consumers,
329};
330
331/* General */
332static struct regulator_init_data vdig_data = {
333 .constraints = {
334 .name = "VDIG",
335 .min_uV = 1500000,
336 .max_uV = 1500000,
337 .valid_modes_mask = REGULATOR_MODE_NORMAL,
338 .apply_uV = 1,
339 .always_on = 1,
340 .boot_on = 1,
341 },
342};
343
344/* Tranceivers */
345static struct regulator_init_data ldo4_data = {
346 .constraints = {
347 .name = "VRF1/CVDD_2.775",
348 .min_uV = 2500000,
349 .max_uV = 2500000,
350 .valid_modes_mask = REGULATOR_MODE_NORMAL,
351 .apply_uV = 1,
352 .always_on = 1,
353 .boot_on = 1,
354 },
355};
356
357static struct wm8350_led_platform_data wm8350_led_data = {
358 .name = "wm8350:white",
359 .default_trigger = "heartbeat",
360 .max_uA = 27899,
361};
362
363static struct wm8350_audio_platform_data imx32ads_wm8350_setup = {
364 .vmid_discharge_msecs = 1000,
365 .drain_msecs = 30,
366 .cap_discharge_msecs = 700,
367 .vmid_charge_msecs = 700,
368 .vmid_s_curve = WM8350_S_CURVE_SLOW,
369 .dis_out4 = WM8350_DISCHARGE_SLOW,
370 .dis_out3 = WM8350_DISCHARGE_SLOW,
371 .dis_out2 = WM8350_DISCHARGE_SLOW,
372 .dis_out1 = WM8350_DISCHARGE_SLOW,
373 .vroi_out4 = WM8350_TIE_OFF_500R,
374 .vroi_out3 = WM8350_TIE_OFF_500R,
375 .vroi_out2 = WM8350_TIE_OFF_500R,
376 .vroi_out1 = WM8350_TIE_OFF_500R,
377 .vroi_enable = 0,
378 .codec_current_on = WM8350_CODEC_ISEL_1_0,
379 .codec_current_standby = WM8350_CODEC_ISEL_0_5,
380 .codec_current_charge = WM8350_CODEC_ISEL_1_5,
381};
382
383static int mx31_wm8350_init(struct wm8350 *wm8350)
384{
385 int i;
386
387 wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN,
388 WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW,
389 WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF,
390 WM8350_GPIO_DEBOUNCE_ON);
391
392 wm8350_gpio_config(wm8350, 3, WM8350_GPIO_DIR_IN,
393 WM8350_GPIO3_PWR_OFF_IN, WM8350_GPIO_ACTIVE_HIGH,
394 WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF,
395 WM8350_GPIO_DEBOUNCE_ON);
396
397 wm8350_gpio_config(wm8350, 4, WM8350_GPIO_DIR_IN,
398 WM8350_GPIO4_MR_IN, WM8350_GPIO_ACTIVE_HIGH,
399 WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF,
400 WM8350_GPIO_DEBOUNCE_OFF);
401
402 wm8350_gpio_config(wm8350, 7, WM8350_GPIO_DIR_IN,
403 WM8350_GPIO7_HIBERNATE_IN, WM8350_GPIO_ACTIVE_HIGH,
404 WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF,
405 WM8350_GPIO_DEBOUNCE_OFF);
406
407 wm8350_gpio_config(wm8350, 6, WM8350_GPIO_DIR_OUT,
408 WM8350_GPIO6_SDOUT_OUT, WM8350_GPIO_ACTIVE_HIGH,
409 WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF,
410 WM8350_GPIO_DEBOUNCE_OFF);
411
412 wm8350_gpio_config(wm8350, 8, WM8350_GPIO_DIR_OUT,
413 WM8350_GPIO8_VCC_FAULT_OUT, WM8350_GPIO_ACTIVE_LOW,
414 WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF,
415 WM8350_GPIO_DEBOUNCE_OFF);
416
417 wm8350_gpio_config(wm8350, 9, WM8350_GPIO_DIR_OUT,
418 WM8350_GPIO9_BATT_FAULT_OUT, WM8350_GPIO_ACTIVE_LOW,
419 WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF,
420 WM8350_GPIO_DEBOUNCE_OFF);
421
422 /* Fix up for our own supplies. */
423 for (i = 0; i < ARRAY_SIZE(ldo2_consumers); i++)
424 ldo2_consumers[i].dev = wm8350->dev;
425
426 wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data);
427 wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data);
428 wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data);
429 wm8350_register_regulator(wm8350, WM8350_DCDC_6, &sw2a_data);
430 wm8350_register_regulator(wm8350, WM8350_LDO_1, &ldo1_data);
431 wm8350_register_regulator(wm8350, WM8350_LDO_2, &ldo2_data);
432 wm8350_register_regulator(wm8350, WM8350_LDO_3, &vdig_data);
433 wm8350_register_regulator(wm8350, WM8350_LDO_4, &ldo4_data);
434
435 /* LEDs */
436 wm8350_dcdc_set_slot(wm8350, WM8350_DCDC_5, 1, 1,
437 WM8350_DC5_ERRACT_SHUTDOWN_CONV);
438 wm8350_isink_set_flash(wm8350, WM8350_ISINK_A,
439 WM8350_ISINK_FLASH_DISABLE,
440 WM8350_ISINK_FLASH_TRIG_BIT,
441 WM8350_ISINK_FLASH_DUR_32MS,
442 WM8350_ISINK_FLASH_ON_INSTANT,
443 WM8350_ISINK_FLASH_OFF_INSTANT,
444 WM8350_ISINK_FLASH_MODE_EN);
445 wm8350_dcdc25_set_mode(wm8350, WM8350_DCDC_5,
446 WM8350_ISINK_MODE_BOOST,
447 WM8350_ISINK_ILIM_NORMAL,
448 WM8350_DC5_RMP_20V,
449 WM8350_DC5_FBSRC_ISINKA);
450 wm8350_register_led(wm8350, 0, WM8350_DCDC_5, WM8350_ISINK_A,
451 &wm8350_led_data);
452
453 wm8350->codec.platform_data = &imx32ads_wm8350_setup;
454
455 return 0;
456}
457
458static struct wm8350_platform_data __initdata mx31_wm8350_pdata = {
459 .init = mx31_wm8350_init,
460};
461#endif
462
463#if defined(CONFIG_I2C_IMX) || defined(CONFIG_I2C_IMX_MODULE)
464static struct i2c_board_info __initdata mx31ads_i2c1_devices[] = {
465#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
466 {
467 I2C_BOARD_INFO("wm8350", 0x1a),
468 .platform_data = &mx31_wm8350_pdata,
469 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
470 },
471#endif
472};
473
474static void mxc_init_i2c(void)
475{
476 i2c_register_board_info(1, mx31ads_i2c1_devices,
477 ARRAY_SIZE(mx31ads_i2c1_devices));
478
479 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_ALT1));
480 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_ALT1));
481
482 mxc_register_device(&mxc_i2c_device1, NULL);
483}
484#else
485static void mxc_init_i2c(void)
486{
487}
488#endif
489
197/*! 490/*!
198 * This structure defines static mappings for the i.MX31ADS board. 491 * This structure defines static mappings for the i.MX31ADS board.
199 */ 492 */
@@ -243,6 +536,7 @@ static void __init mxc_board_init(void)
243{ 536{
244 mxc_init_extuart(); 537 mxc_init_extuart();
245 mxc_init_imx_uart(); 538 mxc_init_imx_uart();
539 mxc_init_i2c();
246} 540}
247 541
248static void __init mx31ads_timer_init(void) 542static void __init mx31ads_timer_init(void)