aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-mx3
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2009-01-26 09:41:16 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2009-03-13 05:33:46 -0400
commita2865197a5dad23c619c84f44b7fdf7fdbef3f9c (patch)
treee62afa2bf72a8bad1cbfd400f79b92a13617fac6 /arch/arm/mach-mx3
parent5512e88f3a1f1b498fd07181f14596ee117b3471 (diff)
[ARM] MXC: Use a single function for decoding a PLL
We had 3 versions of this function in clock support for MX1/2/3 Use a single one instead. I picked the one from the MX3 as it seems to calculate more accurate as the other ones. Also, on MX27 and MX31 mfn can be negative, this hasn't been handled correctly on MX27 since now. This patch has been tested on MX27 and MX31 and produces the same clock frequencies for me. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3')
-rw-r--r--arch/arm/mach-mx3/clock.c26
1 files changed, 2 insertions, 24 deletions
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index b1746aae1f89..8486ea46d6c1 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -158,10 +158,8 @@ static int _clk_pll_set_rate(struct clk *clk, unsigned long rate)
158 158
159static unsigned long _clk_pll_get_rate(struct clk *clk) 159static unsigned long _clk_pll_get_rate(struct clk *clk)
160{ 160{
161 long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;
162 unsigned long reg, ccmr; 161 unsigned long reg, ccmr;
163 s64 temp; 162 unsigned int prcs, ref_clk;
164 unsigned int prcs;
165 163
166 ccmr = __raw_readl(MXC_CCM_CCMR); 164 ccmr = __raw_readl(MXC_CCM_CCMR);
167 prcs = (ccmr & MXC_CCM_CCMR_PRCS_MASK) >> MXC_CCM_CCMR_PRCS_OFFSET; 165 prcs = (ccmr & MXC_CCM_CCMR_PRCS_MASK) >> MXC_CCM_CCMR_PRCS_OFFSET;
@@ -185,27 +183,7 @@ static unsigned long _clk_pll_get_rate(struct clk *clk)
185 return 0; 183 return 0;
186 } 184 }
187 185
188 pdf = (reg & MXC_CCM_PCTL_PD_MASK) >> MXC_CCM_PCTL_PD_OFFSET; 186 return mxc_decode_pll(reg, ref_clk);
189 mfd = (reg & MXC_CCM_PCTL_MFD_MASK) >> MXC_CCM_PCTL_MFD_OFFSET;
190 mfi = (reg & MXC_CCM_PCTL_MFI_MASK) >> MXC_CCM_PCTL_MFI_OFFSET;
191 mfi = (mfi <= 5) ? 5 : mfi;
192 mfn = mfn_abs = reg & MXC_CCM_PCTL_MFN_MASK;
193
194 if (mfn >= 0x200) {
195 mfn |= 0xFFFFFE00;
196 mfn_abs = -mfn;
197 }
198
199 ref_clk *= 2;
200 ref_clk /= pdf + 1;
201
202 temp = (u64) ref_clk * mfn_abs;
203 do_div(temp, mfd + 1);
204 if (mfn < 0)
205 temp = -temp;
206 temp = (ref_clk * mfi) + temp;
207
208 return temp;
209} 187}
210 188
211static int _clk_usb_pll_enable(struct clk *clk) 189static int _clk_usb_pll_enable(struct clk *clk)