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authorSascha Hauer <s.hauer@pengutronix.de>2009-03-13 14:52:41 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2009-05-07 10:15:21 -0400
commit01ac7d584d7299c787bb64067231a06d3b5e52e3 (patch)
treec96340fab50b4f260030d3e9637a2729c87e2ef4 /arch/arm/mach-mx3/pcm037.c
parentd16caf69ce26dbd2ec3ae4e0072c2a60f1896c89 (diff)
pcm037: setup all pins at once and not in init functions
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3/pcm037.c')
-rw-r--r--arch/arm/mach-mx3/pcm037.c124
1 files changed, 75 insertions, 49 deletions
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index b5227d837b2f..c26919d05b1e 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -46,6 +46,76 @@
46 46
47#include "devices.h" 47#include "devices.h"
48 48
49static unsigned int pcm037_pins[] = {
50 /* I2C */
51 MX31_PIN_CSPI2_MOSI__SCL,
52 MX31_PIN_CSPI2_MISO__SDA,
53 /* SDHC1 */
54 MX31_PIN_SD1_DATA3__SD1_DATA3,
55 MX31_PIN_SD1_DATA2__SD1_DATA2,
56 MX31_PIN_SD1_DATA1__SD1_DATA1,
57 MX31_PIN_SD1_DATA0__SD1_DATA0,
58 MX31_PIN_SD1_CLK__SD1_CLK,
59 MX31_PIN_SD1_CMD__SD1_CMD,
60 IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
61 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
62 /* SPI1 */
63 MX31_PIN_CSPI1_MOSI__MOSI,
64 MX31_PIN_CSPI1_MISO__MISO,
65 MX31_PIN_CSPI1_SCLK__SCLK,
66 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
67 MX31_PIN_CSPI1_SS0__SS0,
68 MX31_PIN_CSPI1_SS1__SS1,
69 MX31_PIN_CSPI1_SS2__SS2,
70 /* UART1 */
71 MX31_PIN_CTS1__CTS1,
72 MX31_PIN_RTS1__RTS1,
73 MX31_PIN_TXD1__TXD1,
74 MX31_PIN_RXD1__RXD1,
75 /* UART2 */
76 MX31_PIN_TXD2__TXD2,
77 MX31_PIN_RXD2__RXD2,
78 MX31_PIN_CTS2__CTS2,
79 MX31_PIN_RTS2__RTS2,
80 /* UART3 */
81 MX31_PIN_CSPI3_MOSI__RXD3,
82 MX31_PIN_CSPI3_MISO__TXD3,
83 MX31_PIN_CSPI3_SCLK__RTS3,
84 MX31_PIN_CSPI3_SPI_RDY__CTS3,
85 /* LAN9217 irq pin */
86 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
87 /* Onewire */
88 MX31_PIN_BATT_LINE__OWIRE,
89 /* Framebuffer */
90 MX31_PIN_LD0__LD0,
91 MX31_PIN_LD1__LD1,
92 MX31_PIN_LD2__LD2,
93 MX31_PIN_LD3__LD3,
94 MX31_PIN_LD4__LD4,
95 MX31_PIN_LD5__LD5,
96 MX31_PIN_LD6__LD6,
97 MX31_PIN_LD7__LD7,
98 MX31_PIN_LD8__LD8,
99 MX31_PIN_LD9__LD9,
100 MX31_PIN_LD10__LD10,
101 MX31_PIN_LD11__LD11,
102 MX31_PIN_LD12__LD12,
103 MX31_PIN_LD13__LD13,
104 MX31_PIN_LD14__LD14,
105 MX31_PIN_LD15__LD15,
106 MX31_PIN_LD16__LD16,
107 MX31_PIN_LD17__LD17,
108 MX31_PIN_VSYNC3__VSYNC3,
109 MX31_PIN_HSYNC__HSYNC,
110 MX31_PIN_FPSHIFT__FPSHIFT,
111 MX31_PIN_DRDY0__DRDY0,
112 MX31_PIN_D3_REV__D3_REV,
113 MX31_PIN_CONTRAST__CONTRAST,
114 MX31_PIN_D3_SPL__D3_SPL,
115 MX31_PIN_D3_CLS__D3_CLS,
116 MX31_PIN_LCS0__GPI03_23,
117};
118
49static struct physmap_flash_data pcm037_flash_data = { 119static struct physmap_flash_data pcm037_flash_data = {
50 .width = 2, 120 .width = 2,
51}; 121};
@@ -127,26 +197,8 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = {
127}; 197};
128 198
129#ifdef CONFIG_I2C_IMX 199#ifdef CONFIG_I2C_IMX
130static int i2c_1_pins[] = {
131 MX31_PIN_CSPI2_MOSI__SCL,
132 MX31_PIN_CSPI2_MISO__SDA,
133};
134
135static int pcm037_i2c_1_init(struct device *dev)
136{
137 return mxc_iomux_setup_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins),
138 "i2c-1");
139}
140
141static void pcm037_i2c_1_exit(struct device *dev)
142{
143 mxc_iomux_release_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins));
144}
145
146static struct imxi2c_platform_data pcm037_i2c_1_data = { 200static struct imxi2c_platform_data pcm037_i2c_1_data = {
147 .bitrate = 100000, 201 .bitrate = 100000,
148 .init = pcm037_i2c_1_init,
149 .exit = pcm037_i2c_1_exit,
150}; 202};
151 203
152static struct at24_platform_data board_eeprom = { 204static struct at24_platform_data board_eeprom = {
@@ -166,24 +218,13 @@ static struct i2c_board_info pcm037_i2c_devices[] = {
166}; 218};
167#endif 219#endif
168 220
169static int sdhc1_pins[] = {
170 MX31_PIN_SD1_DATA3__SD1_DATA3,
171 MX31_PIN_SD1_DATA2__SD1_DATA2,
172 MX31_PIN_SD1_DATA1__SD1_DATA1,
173 MX31_PIN_SD1_DATA0__SD1_DATA0,
174 MX31_PIN_SD1_CLK__SD1_CLK,
175 MX31_PIN_SD1_CMD__SD1_CMD,
176};
177
178static int pcm970_sdhc1_init(struct device *dev, irq_handler_t h, void *data) 221static int pcm970_sdhc1_init(struct device *dev, irq_handler_t h, void *data)
179{ 222{
180 return mxc_iomux_setup_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins), 223 return 0;
181 "sdhc-1");
182} 224}
183 225
184static void pcm970_sdhc1_exit(struct device *dev, void *data) 226static void pcm970_sdhc1_exit(struct device *dev, void *data)
185{ 227{
186 mxc_iomux_release_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins));
187} 228}
188 229
189/* No card and rw detection at the moment */ 230/* No card and rw detection at the moment */
@@ -198,38 +239,23 @@ static struct platform_device *devices[] __initdata = {
198 &pcm037_sram_device, 239 &pcm037_sram_device,
199}; 240};
200 241
201static int uart0_pins[] = {
202 MX31_PIN_CTS1__CTS1,
203 MX31_PIN_RTS1__RTS1,
204 MX31_PIN_TXD1__TXD1,
205 MX31_PIN_RXD1__RXD1
206};
207
208static int uart2_pins[] = {
209 MX31_PIN_CSPI3_MOSI__RXD3,
210 MX31_PIN_CSPI3_MISO__TXD3
211};
212
213/* 242/*
214 * Board specific initialization. 243 * Board specific initialization.
215 */ 244 */
216static void __init mxc_board_init(void) 245static void __init mxc_board_init(void)
217{ 246{
247 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
248 "pcm037");
249
218 platform_add_devices(devices, ARRAY_SIZE(devices)); 250 platform_add_devices(devices, ARRAY_SIZE(devices));
219 251
220 mxc_iomux_setup_multiple_pins(uart0_pins, ARRAY_SIZE(uart0_pins), "uart-0");
221 mxc_register_device(&mxc_uart_device0, &uart_pdata); 252 mxc_register_device(&mxc_uart_device0, &uart_pdata);
222
223 mxc_iomux_setup_multiple_pins(uart2_pins, ARRAY_SIZE(uart2_pins), "uart-2");
224 mxc_register_device(&mxc_uart_device2, &uart_pdata); 253 mxc_register_device(&mxc_uart_device2, &uart_pdata);
225 254
226 mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire");
227 mxc_register_device(&mxc_w1_master_device, NULL); 255 mxc_register_device(&mxc_w1_master_device, NULL);
228 256
229 /* LAN9217 IRQ pin */ 257 /* LAN9217 IRQ pin */
230 if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), 258 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
231 "pcm037-eth"))
232 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
233 259
234#ifdef CONFIG_I2C_IMX 260#ifdef CONFIG_I2C_IMX
235 i2c_register_board_info(1, pcm037_i2c_devices, 261 i2c_register_board_info(1, pcm037_i2c_devices,