diff options
author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2009-12-10 04:41:26 -0500 |
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committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-01-08 10:40:51 -0500 |
commit | 321ed164369bb5e4888eb24d70ebc64c232ffc31 (patch) | |
tree | 41f5b2fddf9199dcf76900a593f9e54d087e1d37 /arch/arm/mach-mx3/mach-mx31moboard.c | |
parent | 386c5cf7a9a1d6856f17bde43174f751fac1bc0b (diff) |
imx/mx3: rename files defining a machine to mach-$mach.c
While at it remove some superfluous parenthesis.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Diffstat (limited to 'arch/arm/mach-mx3/mach-mx31moboard.c')
-rw-r--r-- | arch/arm/mach-mx3/mach-mx31moboard.c | 580 |
1 files changed, 580 insertions, 0 deletions
diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c new file mode 100644 index 000000000000..63f991f8817f --- /dev/null +++ b/arch/arm/mach-mx3/mach-mx31moboard.c | |||
@@ -0,0 +1,580 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
17 | */ | ||
18 | |||
19 | #include <linux/delay.h> | ||
20 | #include <linux/dma-mapping.h> | ||
21 | #include <linux/fsl_devices.h> | ||
22 | #include <linux/gpio.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/interrupt.h> | ||
25 | #include <linux/leds.h> | ||
26 | #include <linux/memory.h> | ||
27 | #include <linux/mtd/physmap.h> | ||
28 | #include <linux/mtd/partitions.h> | ||
29 | #include <linux/platform_device.h> | ||
30 | #include <linux/regulator/machine.h> | ||
31 | #include <linux/mfd/mc13783.h> | ||
32 | #include <linux/spi/spi.h> | ||
33 | #include <linux/types.h> | ||
34 | |||
35 | #include <linux/usb/otg.h> | ||
36 | #include <linux/usb/ulpi.h> | ||
37 | |||
38 | #include <asm/mach-types.h> | ||
39 | #include <asm/mach/arch.h> | ||
40 | #include <asm/mach/time.h> | ||
41 | #include <asm/mach/map.h> | ||
42 | #include <mach/board-mx31moboard.h> | ||
43 | #include <mach/common.h> | ||
44 | #include <mach/hardware.h> | ||
45 | #include <mach/imx-uart.h> | ||
46 | #include <mach/iomux-mx3.h> | ||
47 | #include <mach/ipu.h> | ||
48 | #include <mach/i2c.h> | ||
49 | #include <mach/mmc.h> | ||
50 | #include <mach/mxc_ehci.h> | ||
51 | #include <mach/mx3_camera.h> | ||
52 | #include <mach/spi.h> | ||
53 | #include <mach/ulpi.h> | ||
54 | |||
55 | #include "devices.h" | ||
56 | |||
57 | static unsigned int moboard_pins[] = { | ||
58 | /* UART0 */ | ||
59 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, | ||
60 | MX31_PIN_CTS1__GPIO2_7, | ||
61 | /* UART4 */ | ||
62 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | ||
63 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | ||
64 | /* I2C0 */ | ||
65 | MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL, | ||
66 | /* I2C1 */ | ||
67 | MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL, | ||
68 | /* SDHC1 */ | ||
69 | MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2, | ||
70 | MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, | ||
71 | MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, | ||
72 | MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, | ||
73 | /* USB reset */ | ||
74 | MX31_PIN_GPIO1_0__GPIO1_0, | ||
75 | /* USB OTG */ | ||
76 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
77 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
78 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
79 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
80 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
81 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
82 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
83 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
84 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
85 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
86 | MX31_PIN_USB_OC__GPIO1_30, | ||
87 | /* USB H2 */ | ||
88 | MX31_PIN_USBH2_DATA0__USBH2_DATA0, | ||
89 | MX31_PIN_USBH2_DATA1__USBH2_DATA1, | ||
90 | MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3, | ||
91 | MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5, | ||
92 | MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7, | ||
93 | MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR, | ||
94 | MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP, | ||
95 | MX31_PIN_SCK6__GPIO1_25, | ||
96 | /* LEDs */ | ||
97 | MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, | ||
98 | MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, | ||
99 | /* SEL */ | ||
100 | MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9, | ||
101 | MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11, | ||
102 | /* SPI1 */ | ||
103 | MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO, | ||
104 | MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, | ||
105 | MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2, | ||
106 | /* Atlas IRQ */ | ||
107 | MX31_PIN_GPIO1_3__GPIO1_3, | ||
108 | /* SPI2 */ | ||
109 | MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO, | ||
110 | MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY, | ||
111 | MX31_PIN_CSPI2_SS1__CSPI3_SS1, | ||
112 | }; | ||
113 | |||
114 | static struct physmap_flash_data mx31moboard_flash_data = { | ||
115 | .width = 2, | ||
116 | }; | ||
117 | |||
118 | static struct resource mx31moboard_flash_resource = { | ||
119 | .start = 0xa0000000, | ||
120 | .end = 0xa1ffffff, | ||
121 | .flags = IORESOURCE_MEM, | ||
122 | }; | ||
123 | |||
124 | static struct platform_device mx31moboard_flash = { | ||
125 | .name = "physmap-flash", | ||
126 | .id = 0, | ||
127 | .dev = { | ||
128 | .platform_data = &mx31moboard_flash_data, | ||
129 | }, | ||
130 | .resource = &mx31moboard_flash_resource, | ||
131 | .num_resources = 1, | ||
132 | }; | ||
133 | |||
134 | static int moboard_uart0_init(struct platform_device *pdev) | ||
135 | { | ||
136 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack"); | ||
137 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0); | ||
138 | return 0; | ||
139 | } | ||
140 | |||
141 | static struct imxuart_platform_data uart0_pdata = { | ||
142 | .init = moboard_uart0_init, | ||
143 | }; | ||
144 | |||
145 | static struct imxuart_platform_data uart4_pdata = { | ||
146 | .flags = IMXUART_HAVE_RTSCTS, | ||
147 | }; | ||
148 | |||
149 | static struct imxi2c_platform_data moboard_i2c0_pdata = { | ||
150 | .bitrate = 400000, | ||
151 | }; | ||
152 | |||
153 | static struct imxi2c_platform_data moboard_i2c1_pdata = { | ||
154 | .bitrate = 100000, | ||
155 | }; | ||
156 | |||
157 | static int moboard_spi1_cs[] = { | ||
158 | MXC_SPI_CS(0), | ||
159 | MXC_SPI_CS(2), | ||
160 | }; | ||
161 | |||
162 | static struct spi_imx_master moboard_spi1_master = { | ||
163 | .chipselect = moboard_spi1_cs, | ||
164 | .num_chipselect = ARRAY_SIZE(moboard_spi1_cs), | ||
165 | }; | ||
166 | |||
167 | static struct regulator_consumer_supply sdhc_consumers[] = { | ||
168 | { | ||
169 | .dev = &mxcsdhc_device0.dev, | ||
170 | .supply = "sdhc0_vcc", | ||
171 | }, | ||
172 | { | ||
173 | .dev = &mxcsdhc_device1.dev, | ||
174 | .supply = "sdhc1_vcc", | ||
175 | }, | ||
176 | }; | ||
177 | |||
178 | static struct regulator_init_data sdhc_vreg_data = { | ||
179 | .constraints = { | ||
180 | .min_uV = 2700000, | ||
181 | .max_uV = 3000000, | ||
182 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
183 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | ||
184 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | ||
185 | REGULATOR_MODE_FAST, | ||
186 | .always_on = 0, | ||
187 | .boot_on = 1, | ||
188 | }, | ||
189 | .num_consumer_supplies = ARRAY_SIZE(sdhc_consumers), | ||
190 | .consumer_supplies = sdhc_consumers, | ||
191 | }; | ||
192 | |||
193 | static struct regulator_consumer_supply cam_consumers[] = { | ||
194 | { | ||
195 | .dev = &mx3_camera.dev, | ||
196 | .supply = "cam_vcc", | ||
197 | }, | ||
198 | }; | ||
199 | |||
200 | static struct regulator_init_data cam_vreg_data = { | ||
201 | .constraints = { | ||
202 | .min_uV = 2700000, | ||
203 | .max_uV = 3000000, | ||
204 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
205 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | ||
206 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | ||
207 | REGULATOR_MODE_FAST, | ||
208 | .always_on = 0, | ||
209 | .boot_on = 1, | ||
210 | }, | ||
211 | .num_consumer_supplies = ARRAY_SIZE(cam_consumers), | ||
212 | .consumer_supplies = cam_consumers, | ||
213 | }; | ||
214 | |||
215 | static struct mc13783_regulator_init_data moboard_regulators[] = { | ||
216 | { | ||
217 | .id = MC13783_REGU_VMMC1, | ||
218 | .init_data = &sdhc_vreg_data, | ||
219 | }, | ||
220 | { | ||
221 | .id = MC13783_REGU_VCAM, | ||
222 | .init_data = &cam_vreg_data, | ||
223 | }, | ||
224 | }; | ||
225 | |||
226 | static struct mc13783_platform_data moboard_pmic = { | ||
227 | .regulators = moboard_regulators, | ||
228 | .num_regulators = ARRAY_SIZE(moboard_regulators), | ||
229 | .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC | | ||
230 | MC13783_USE_ADC, | ||
231 | }; | ||
232 | |||
233 | static struct spi_board_info moboard_spi_board_info[] __initdata = { | ||
234 | { | ||
235 | .modalias = "mc13783", | ||
236 | .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), | ||
237 | .max_speed_hz = 300000, | ||
238 | .bus_num = 1, | ||
239 | .chip_select = 0, | ||
240 | .platform_data = &moboard_pmic, | ||
241 | .mode = SPI_CS_HIGH, | ||
242 | }, | ||
243 | }; | ||
244 | |||
245 | static int moboard_spi2_cs[] = { | ||
246 | MXC_SPI_CS(1), | ||
247 | }; | ||
248 | |||
249 | static struct spi_imx_master moboard_spi2_master = { | ||
250 | .chipselect = moboard_spi2_cs, | ||
251 | .num_chipselect = ARRAY_SIZE(moboard_spi2_cs), | ||
252 | }; | ||
253 | |||
254 | #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) | ||
255 | #define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) | ||
256 | |||
257 | static int moboard_sdhc1_get_ro(struct device *dev) | ||
258 | { | ||
259 | return !gpio_get_value(SDHC1_WP); | ||
260 | } | ||
261 | |||
262 | static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | ||
263 | void *data) | ||
264 | { | ||
265 | int ret; | ||
266 | |||
267 | ret = gpio_request(SDHC1_CD, "sdhc-detect"); | ||
268 | if (ret) | ||
269 | return ret; | ||
270 | |||
271 | gpio_direction_input(SDHC1_CD); | ||
272 | |||
273 | ret = gpio_request(SDHC1_WP, "sdhc-wp"); | ||
274 | if (ret) | ||
275 | goto err_gpio_free; | ||
276 | gpio_direction_input(SDHC1_WP); | ||
277 | |||
278 | ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq, | ||
279 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
280 | "sdhc1-card-detect", data); | ||
281 | if (ret) | ||
282 | goto err_gpio_free_2; | ||
283 | |||
284 | return 0; | ||
285 | |||
286 | err_gpio_free_2: | ||
287 | gpio_free(SDHC1_WP); | ||
288 | err_gpio_free: | ||
289 | gpio_free(SDHC1_CD); | ||
290 | |||
291 | return ret; | ||
292 | } | ||
293 | |||
294 | static void moboard_sdhc1_exit(struct device *dev, void *data) | ||
295 | { | ||
296 | free_irq(gpio_to_irq(SDHC1_CD), data); | ||
297 | gpio_free(SDHC1_WP); | ||
298 | gpio_free(SDHC1_CD); | ||
299 | } | ||
300 | |||
301 | static struct imxmmc_platform_data sdhc1_pdata = { | ||
302 | .get_ro = moboard_sdhc1_get_ro, | ||
303 | .init = moboard_sdhc1_init, | ||
304 | .exit = moboard_sdhc1_exit, | ||
305 | }; | ||
306 | |||
307 | /* | ||
308 | * this pin is dedicated for all mx31moboard systems, so we do it here | ||
309 | */ | ||
310 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) | ||
311 | |||
312 | static void usb_xcvr_reset(void) | ||
313 | { | ||
314 | gpio_request(USB_RESET_B, "usb-reset"); | ||
315 | gpio_direction_output(USB_RESET_B, 0); | ||
316 | mdelay(1); | ||
317 | gpio_set_value(USB_RESET_B, 1); | ||
318 | } | ||
319 | |||
320 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
321 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
322 | |||
323 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | ||
324 | |||
325 | static void moboard_usbotg_init(void) | ||
326 | { | ||
327 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | ||
328 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | ||
329 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | ||
330 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | ||
331 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | ||
332 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | ||
333 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | ||
334 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | ||
335 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | ||
336 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | ||
337 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | ||
338 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | ||
339 | |||
340 | gpio_request(OTG_EN_B, "usb-udc-en"); | ||
341 | gpio_direction_output(OTG_EN_B, 0); | ||
342 | } | ||
343 | |||
344 | static struct fsl_usb2_platform_data usb_pdata = { | ||
345 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
346 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
347 | }; | ||
348 | |||
349 | #if defined(CONFIG_USB_ULPI) | ||
350 | |||
351 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) | ||
352 | |||
353 | static int moboard_usbh2_hw_init(struct platform_device *pdev) | ||
354 | { | ||
355 | int ret = gpio_request(USBH2_EN_B, "usbh2-en"); | ||
356 | if (ret) | ||
357 | return ret; | ||
358 | |||
359 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | ||
360 | |||
361 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); | ||
362 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); | ||
363 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); | ||
364 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); | ||
365 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); | ||
366 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); | ||
367 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); | ||
368 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); | ||
369 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); | ||
370 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); | ||
371 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); | ||
372 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); | ||
373 | |||
374 | gpio_direction_output(USBH2_EN_B, 0); | ||
375 | |||
376 | return 0; | ||
377 | } | ||
378 | |||
379 | static int moboard_usbh2_hw_exit(struct platform_device *pdev) | ||
380 | { | ||
381 | gpio_free(USBH2_EN_B); | ||
382 | return 0; | ||
383 | } | ||
384 | |||
385 | static struct mxc_usbh_platform_data usbh2_pdata = { | ||
386 | .init = moboard_usbh2_hw_init, | ||
387 | .exit = moboard_usbh2_hw_exit, | ||
388 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | ||
389 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | ||
390 | }; | ||
391 | |||
392 | static int __init moboard_usbh2_init(void) | ||
393 | { | ||
394 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | ||
395 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | ||
396 | |||
397 | return mxc_register_device(&mxc_usbh2, &usbh2_pdata); | ||
398 | } | ||
399 | #else | ||
400 | static inline int moboard_usbh2_init(void) { return 0; } | ||
401 | #endif | ||
402 | |||
403 | |||
404 | static struct gpio_led mx31moboard_leds[] = { | ||
405 | { | ||
406 | .name = "coreboard-led-0:red:running", | ||
407 | .default_trigger = "heartbeat", | ||
408 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0), | ||
409 | }, { | ||
410 | .name = "coreboard-led-1:red", | ||
411 | .gpio = IOMUX_TO_GPIO(MX31_PIN_STX0), | ||
412 | }, { | ||
413 | .name = "coreboard-led-2:red", | ||
414 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0), | ||
415 | }, { | ||
416 | .name = "coreboard-led-3:red", | ||
417 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0), | ||
418 | }, | ||
419 | }; | ||
420 | |||
421 | static struct gpio_led_platform_data mx31moboard_led_pdata = { | ||
422 | .num_leds = ARRAY_SIZE(mx31moboard_leds), | ||
423 | .leds = mx31moboard_leds, | ||
424 | }; | ||
425 | |||
426 | static struct platform_device mx31moboard_leds_device = { | ||
427 | .name = "leds-gpio", | ||
428 | .id = -1, | ||
429 | .dev = { | ||
430 | .platform_data = &mx31moboard_led_pdata, | ||
431 | }, | ||
432 | }; | ||
433 | |||
434 | #define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1) | ||
435 | #define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1) | ||
436 | #define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1) | ||
437 | #define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1) | ||
438 | |||
439 | static void mx31moboard_init_sel_gpios(void) | ||
440 | { | ||
441 | if (!gpio_request(SEL0, "sel0")) { | ||
442 | gpio_direction_input(SEL0); | ||
443 | gpio_export(SEL0, true); | ||
444 | } | ||
445 | |||
446 | if (!gpio_request(SEL1, "sel1")) { | ||
447 | gpio_direction_input(SEL1); | ||
448 | gpio_export(SEL1, true); | ||
449 | } | ||
450 | |||
451 | if (!gpio_request(SEL2, "sel2")) { | ||
452 | gpio_direction_input(SEL2); | ||
453 | gpio_export(SEL2, true); | ||
454 | } | ||
455 | |||
456 | if (!gpio_request(SEL3, "sel3")) { | ||
457 | gpio_direction_input(SEL3); | ||
458 | gpio_export(SEL3, true); | ||
459 | } | ||
460 | } | ||
461 | |||
462 | static struct ipu_platform_data mx3_ipu_data = { | ||
463 | .irq_base = MXC_IPU_IRQ_START, | ||
464 | }; | ||
465 | |||
466 | static struct platform_device *devices[] __initdata = { | ||
467 | &mx31moboard_flash, | ||
468 | &mx31moboard_leds_device, | ||
469 | }; | ||
470 | |||
471 | static struct mx3_camera_pdata camera_pdata = { | ||
472 | .dma_dev = &mx3_ipu.dev, | ||
473 | .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10, | ||
474 | .mclk_10khz = 4800, | ||
475 | }; | ||
476 | |||
477 | #define CAMERA_BUF_SIZE (4*1024*1024) | ||
478 | |||
479 | static int __init mx31moboard_cam_alloc_dma(const size_t buf_size) | ||
480 | { | ||
481 | dma_addr_t dma_handle; | ||
482 | void *buf; | ||
483 | int dma; | ||
484 | |||
485 | if (buf_size < 2 * 1024 * 1024) | ||
486 | return -EINVAL; | ||
487 | |||
488 | buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL); | ||
489 | if (!buf) { | ||
490 | pr_err("%s: cannot allocate camera buffer-memory\n", __func__); | ||
491 | return -ENOMEM; | ||
492 | } | ||
493 | |||
494 | memset(buf, 0, buf_size); | ||
495 | |||
496 | dma = dma_declare_coherent_memory(&mx3_camera.dev, | ||
497 | dma_handle, dma_handle, buf_size, | ||
498 | DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE); | ||
499 | |||
500 | /* The way we call dma_declare_coherent_memory only a malloc can fail */ | ||
501 | return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM; | ||
502 | } | ||
503 | |||
504 | static int mx31moboard_baseboard; | ||
505 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | ||
506 | |||
507 | /* | ||
508 | * Board specific initialization. | ||
509 | */ | ||
510 | static void __init mxc_board_init(void) | ||
511 | { | ||
512 | mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), | ||
513 | "moboard"); | ||
514 | |||
515 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
516 | |||
517 | mxc_register_device(&mxc_uart_device0, &uart0_pdata); | ||
518 | |||
519 | mxc_register_device(&mxc_uart_device4, &uart4_pdata); | ||
520 | |||
521 | mx31moboard_init_sel_gpios(); | ||
522 | |||
523 | mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); | ||
524 | mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); | ||
525 | |||
526 | mxc_register_device(&mxc_spi_device1, &moboard_spi1_master); | ||
527 | mxc_register_device(&mxc_spi_device2, &moboard_spi2_master); | ||
528 | |||
529 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq"); | ||
530 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); | ||
531 | spi_register_board_info(moboard_spi_board_info, | ||
532 | ARRAY_SIZE(moboard_spi_board_info)); | ||
533 | |||
534 | mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); | ||
535 | |||
536 | mxc_register_device(&mx3_ipu, &mx3_ipu_data); | ||
537 | if (!mx31moboard_cam_alloc_dma(CAMERA_BUF_SIZE)) | ||
538 | mxc_register_device(&mx3_camera, &camera_pdata); | ||
539 | |||
540 | usb_xcvr_reset(); | ||
541 | |||
542 | moboard_usbotg_init(); | ||
543 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
544 | moboard_usbh2_init(); | ||
545 | |||
546 | switch (mx31moboard_baseboard) { | ||
547 | case MX31NOBOARD: | ||
548 | break; | ||
549 | case MX31DEVBOARD: | ||
550 | mx31moboard_devboard_init(); | ||
551 | break; | ||
552 | case MX31MARXBOT: | ||
553 | mx31moboard_marxbot_init(); | ||
554 | break; | ||
555 | default: | ||
556 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", | ||
557 | mx31moboard_baseboard); | ||
558 | } | ||
559 | } | ||
560 | |||
561 | static void __init mx31moboard_timer_init(void) | ||
562 | { | ||
563 | mx31_clocks_init(26000000); | ||
564 | } | ||
565 | |||
566 | struct sys_timer mx31moboard_timer = { | ||
567 | .init = mx31moboard_timer_init, | ||
568 | }; | ||
569 | |||
570 | MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") | ||
571 | /* Maintainer: Valentin Longchamp, EPFL Mobots group */ | ||
572 | .phys_io = MX31_AIPS1_BASE_ADDR, | ||
573 | .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, | ||
574 | .boot_params = PHYS_OFFSET + 0x100, | ||
575 | .map_io = mx31_map_io, | ||
576 | .init_irq = mx31_init_irq, | ||
577 | .init_machine = mxc_board_init, | ||
578 | .timer = &mx31moboard_timer, | ||
579 | MACHINE_END | ||
580 | |||