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authorSascha Hauer <s.hauer@pengutronix.de>2009-06-23 06:12:00 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2009-08-07 06:10:55 -0400
commit3f4f54b4f0052e9838f6bb98535746464d0c01c3 (patch)
tree19833e9587f205745cafc7052389104f05b9a4cd /arch/arm/mach-mx3/devices.c
parentbf50bcc242db7f8d2fb6bc099c1693149d9fb5d5 (diff)
mx3: Codingstyle: Let the compiler count arrays
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3/devices.c')
-rw-r--r--arch/arm/mach-mx3/devices.c25
1 files changed, 10 insertions, 15 deletions
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index 9e87e08fb121..7a5c2ef52a48 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -129,19 +129,17 @@ struct platform_device mxc_uart_device4 = {
129 129
130/* GPIO port description */ 130/* GPIO port description */
131static struct mxc_gpio_port imx_gpio_ports[] = { 131static struct mxc_gpio_port imx_gpio_ports[] = {
132 [0] = { 132 {
133 .chip.label = "gpio-0", 133 .chip.label = "gpio-0",
134 .base = IO_ADDRESS(GPIO1_BASE_ADDR), 134 .base = IO_ADDRESS(GPIO1_BASE_ADDR),
135 .irq = MXC_INT_GPIO1, 135 .irq = MXC_INT_GPIO1,
136 .virtual_irq_start = MXC_GPIO_IRQ_START, 136 .virtual_irq_start = MXC_GPIO_IRQ_START,
137 }, 137 }, {
138 [1] = {
139 .chip.label = "gpio-1", 138 .chip.label = "gpio-1",
140 .base = IO_ADDRESS(GPIO2_BASE_ADDR), 139 .base = IO_ADDRESS(GPIO2_BASE_ADDR),
141 .irq = MXC_INT_GPIO2, 140 .irq = MXC_INT_GPIO2,
142 .virtual_irq_start = MXC_GPIO_IRQ_START + 32, 141 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
143 }, 142 }, {
144 [2] = {
145 .chip.label = "gpio-2", 143 .chip.label = "gpio-2",
146 .base = IO_ADDRESS(GPIO3_BASE_ADDR), 144 .base = IO_ADDRESS(GPIO3_BASE_ADDR),
147 .irq = MXC_INT_GPIO3, 145 .irq = MXC_INT_GPIO3,
@@ -173,11 +171,11 @@ static struct resource mxc_nand_resources[] = {
173 { 171 {
174 .start = 0, /* runtime dependent */ 172 .start = 0, /* runtime dependent */
175 .end = 0, 173 .end = 0,
176 .flags = IORESOURCE_MEM 174 .flags = IORESOURCE_MEM,
177 }, { 175 }, {
178 .start = MXC_INT_NANDFC, 176 .start = MXC_INT_NANDFC,
179 .end = MXC_INT_NANDFC, 177 .end = MXC_INT_NANDFC,
180 .flags = IORESOURCE_IRQ 178 .flags = IORESOURCE_IRQ,
181 }, 179 },
182}; 180};
183 181
@@ -193,8 +191,7 @@ static struct resource mxc_i2c0_resources[] = {
193 .start = I2C_BASE_ADDR, 191 .start = I2C_BASE_ADDR,
194 .end = I2C_BASE_ADDR + SZ_4K - 1, 192 .end = I2C_BASE_ADDR + SZ_4K - 1,
195 .flags = IORESOURCE_MEM, 193 .flags = IORESOURCE_MEM,
196 }, 194 }, {
197 {
198 .start = MXC_INT_I2C, 195 .start = MXC_INT_I2C,
199 .end = MXC_INT_I2C, 196 .end = MXC_INT_I2C,
200 .flags = IORESOURCE_IRQ, 197 .flags = IORESOURCE_IRQ,
@@ -213,8 +210,7 @@ static struct resource mxc_i2c1_resources[] = {
213 .start = I2C2_BASE_ADDR, 210 .start = I2C2_BASE_ADDR,
214 .end = I2C2_BASE_ADDR + SZ_4K - 1, 211 .end = I2C2_BASE_ADDR + SZ_4K - 1,
215 .flags = IORESOURCE_MEM, 212 .flags = IORESOURCE_MEM,
216 }, 213 }, {
217 {
218 .start = MXC_INT_I2C2, 214 .start = MXC_INT_I2C2,
219 .end = MXC_INT_I2C2, 215 .end = MXC_INT_I2C2,
220 .flags = IORESOURCE_IRQ, 216 .flags = IORESOURCE_IRQ,
@@ -233,8 +229,7 @@ static struct resource mxc_i2c2_resources[] = {
233 .start = I2C3_BASE_ADDR, 229 .start = I2C3_BASE_ADDR,
234 .end = I2C3_BASE_ADDR + SZ_4K - 1, 230 .end = I2C3_BASE_ADDR + SZ_4K - 1,
235 .flags = IORESOURCE_MEM, 231 .flags = IORESOURCE_MEM,
236 }, 232 }, {
237 {
238 .start = MXC_INT_I2C3, 233 .start = MXC_INT_I2C3,
239 .end = MXC_INT_I2C3, 234 .end = MXC_INT_I2C3,
240 .flags = IORESOURCE_IRQ, 235 .flags = IORESOURCE_IRQ,
@@ -400,11 +395,11 @@ static struct resource mxc_fec_resources[] = {
400 { 395 {
401 .start = MXC_FEC_BASE_ADDR, 396 .start = MXC_FEC_BASE_ADDR,
402 .end = MXC_FEC_BASE_ADDR + 0xfff, 397 .end = MXC_FEC_BASE_ADDR + 0xfff,
403 .flags = IORESOURCE_MEM 398 .flags = IORESOURCE_MEM,
404 }, { 399 }, {
405 .start = MXC_INT_FEC, 400 .start = MXC_INT_FEC,
406 .end = MXC_INT_FEC, 401 .end = MXC_INT_FEC,
407 .flags = IORESOURCE_IRQ 402 .flags = IORESOURCE_IRQ,
408 }, 403 },
409}; 404};
410 405