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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-21 19:42:32 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-21 19:42:32 -0400
commitb5153163ed580e00c67bdfecb02b2e3843817b3e (patch)
treeb8c878601f07f5df8f694435857a5f3dcfd75482 /arch/arm/mach-mx3/devices.c
parenta8cbf22559ceefdcdfac00701e8e6da7518b7e8e (diff)
parent6451d7783ba5ff24eb1a544eaa6665b890f30466 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits) arm: remove machine_desc.io_pg_offst and .phys_io arm: use addruart macro to establish debug mappings arm: return both physical and virtual addresses from addruart arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC ARM: make struct machine_desc definition coherent with its comment eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free cpuimx27: fix compile when ULPI is selected mach-pcm037_eet: fix compile errors Fixing ethernet driver compilation error for i.MX31 ADS board cpuimx51: update board support mx5: add cpuimx51sd module and its baseboard iomux-mx51: fix GPIO_1_xx 's IOMUX configuration imx-esdhc: update devices registration mx51: add resources for SD/MMC on i.MX51 iomux-mx51: fix SD1 and SD2's iomux configuration clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability clock-mx51: factorize clk_set_parent and clk_get_rate eukrea_mbimxsd: add support for DVI displays cpuimx25 & cpuimx35: fix OTG port registration in host mode i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472 ...
Diffstat (limited to 'arch/arm/mach-mx3/devices.c')
-rw-r--r--arch/arm/mach-mx3/devices.c63
1 files changed, 0 insertions, 63 deletions
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index a4fd1a26fc91..f4dff11aaee7 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -281,65 +281,6 @@ struct platform_device mxc_usbh2 = {
281 .num_resources = ARRAY_SIZE(mxc_usbh2_resources), 281 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
282}; 282};
283 283
284#if defined(CONFIG_ARCH_MX35)
285static struct resource mxc_fec_resources[] = {
286 {
287 .start = MXC_FEC_BASE_ADDR,
288 .end = MXC_FEC_BASE_ADDR + 0xfff,
289 .flags = IORESOURCE_MEM,
290 }, {
291 .start = MXC_INT_FEC,
292 .end = MXC_INT_FEC,
293 .flags = IORESOURCE_IRQ,
294 },
295};
296
297struct platform_device mxc_fec_device = {
298 .name = "fec",
299 .id = 0,
300 .num_resources = ARRAY_SIZE(mxc_fec_resources),
301 .resource = mxc_fec_resources,
302};
303#endif
304
305static struct resource imx_ssi_resources0[] = {
306 {
307 .start = SSI1_BASE_ADDR,
308 .end = SSI1_BASE_ADDR + 0xfff,
309 .flags = IORESOURCE_MEM,
310 }, {
311 .start = MX31_INT_SSI1,
312 .end = MX31_INT_SSI1,
313 .flags = IORESOURCE_IRQ,
314 },
315};
316
317static struct resource imx_ssi_resources1[] = {
318 {
319 .start = SSI2_BASE_ADDR,
320 .end = SSI2_BASE_ADDR + 0xfff,
321 .flags = IORESOURCE_MEM
322 }, {
323 .start = MX31_INT_SSI2,
324 .end = MX31_INT_SSI2,
325 .flags = IORESOURCE_IRQ,
326 },
327};
328
329struct platform_device imx_ssi_device0 = {
330 .name = "imx-ssi",
331 .id = 0,
332 .num_resources = ARRAY_SIZE(imx_ssi_resources0),
333 .resource = imx_ssi_resources0,
334};
335
336struct platform_device imx_ssi_device1 = {
337 .name = "imx-ssi",
338 .id = 1,
339 .num_resources = ARRAY_SIZE(imx_ssi_resources1),
340 .resource = imx_ssi_resources1,
341};
342
343static struct resource imx_wdt_resources[] = { 284static struct resource imx_wdt_resources[] = {
344 { 285 {
345 .flags = IORESOURCE_MEM, 286 .flags = IORESOURCE_MEM,
@@ -410,10 +351,6 @@ static int __init mx3_devices_init(void)
410 mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; 351 mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff;
411 mxc_usbh1_resources[1].start = MXC_INT_USBHS; 352 mxc_usbh1_resources[1].start = MXC_INT_USBHS;
412 mxc_usbh1_resources[1].end = MXC_INT_USBHS; 353 mxc_usbh1_resources[1].end = MXC_INT_USBHS;
413 imx_ssi_resources0[1].start = MX35_INT_SSI1;
414 imx_ssi_resources0[1].end = MX35_INT_SSI1;
415 imx_ssi_resources1[1].start = MX35_INT_SSI2;
416 imx_ssi_resources1[1].end = MX35_INT_SSI2;
417 imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR; 354 imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
418 imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff; 355 imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
419 } 356 }