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authorSascha Hauer <s.hauer@pengutronix.de>2009-02-06 09:38:51 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2009-03-13 05:34:28 -0400
commit9536ff33619e13fcc4bd16354faea97dba244f73 (patch)
treeb89802b0f09428263a02ad868121ffd25875f746 /arch/arm/mach-mx3/devices.c
parent2cb536d13cf9fbce029055b7603b3ca4ca1cf407 (diff)
[ARM] MX35 devices support
The i.MX35 basically features the same peripherals as the i.MX31 with some differences: - The i.MX35 has a FEC ethernet controller - The NAND controller base addresses are different - The i.MX35 has only 3 UARTs Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3/devices.c')
-rw-r--r--arch/arm/mach-mx3/devices.c43
1 files changed, 41 insertions, 2 deletions
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index b7d4900b02e4..ab090602cea4 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -84,6 +84,7 @@ struct platform_device mxc_uart_device2 = {
84 .num_resources = ARRAY_SIZE(uart2), 84 .num_resources = ARRAY_SIZE(uart2),
85}; 85};
86 86
87#ifdef CONFIG_ARCH_MX31
87static struct resource uart3[] = { 88static struct resource uart3[] = {
88 { 89 {
89 .start = UART4_BASE_ADDR, 90 .start = UART4_BASE_ADDR,
@@ -121,6 +122,7 @@ struct platform_device mxc_uart_device4 = {
121 .resource = uart4, 122 .resource = uart4,
122 .num_resources = ARRAY_SIZE(uart4), 123 .num_resources = ARRAY_SIZE(uart4),
123}; 124};
125#endif /* CONFIG_ARCH_MX31 */
124 126
125/* GPIO port description */ 127/* GPIO port description */
126static struct mxc_gpio_port imx_gpio_ports[] = { 128static struct mxc_gpio_port imx_gpio_ports[] = {
@@ -166,8 +168,8 @@ struct platform_device mxc_w1_master_device = {
166 168
167static struct resource mxc_nand_resources[] = { 169static struct resource mxc_nand_resources[] = {
168 { 170 {
169 .start = NFC_BASE_ADDR, 171 .start = 0, /* runtime dependent */
170 .end = NFC_BASE_ADDR + 0xfff, 172 .end = 0,
171 .flags = IORESOURCE_MEM 173 .flags = IORESOURCE_MEM
172 }, { 174 }, {
173 .start = MXC_INT_NANDFC, 175 .start = MXC_INT_NANDFC,
@@ -290,3 +292,40 @@ struct platform_device mx3_fb = {
290 .coherent_dma_mask = 0xffffffff, 292 .coherent_dma_mask = 0xffffffff,
291 }, 293 },
292}; 294};
295
296#ifdef CONFIG_ARCH_MX35
297static struct resource mxc_fec_resources[] = {
298 {
299 .start = MXC_FEC_BASE_ADDR,
300 .end = MXC_FEC_BASE_ADDR + 0xfff,
301 .flags = IORESOURCE_MEM
302 }, {
303 .start = MXC_INT_FEC,
304 .end = MXC_INT_FEC,
305 .flags = IORESOURCE_IRQ
306 },
307};
308
309struct platform_device mxc_fec_device = {
310 .name = "fec",
311 .id = 0,
312 .num_resources = ARRAY_SIZE(mxc_fec_resources),
313 .resource = mxc_fec_resources,
314};
315#endif
316
317static int mx3_devices_init(void)
318{
319 if (cpu_is_mx31()) {
320 mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
321 mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
322 }
323 if (cpu_is_mx35()) {
324 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
325 mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff;
326 }
327
328 return 0;
329}
330
331subsys_initcall(mx3_devices_init);