aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-mx3/clock.c
diff options
context:
space:
mode:
authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2009-12-09 05:57:21 -0500
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-01-05 04:10:07 -0500
commitf568dd7f5805bfa9e99f6df866300498b55eb8f4 (patch)
tree4efe659551b4acfa76663fb02240ffde7ec1c1d5 /arch/arm/mach-mx3/clock.c
parent3f35d1f5e4507ea4eb7ff5feaf624737c1b47631 (diff)
imx/mach-mx3: use constants namespaced by the corresponding SOC (easy part)
This just leaves cpu.c, devices.c and mm.c to clean up. As these files are used on more than one SOC they need some more work. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Alberto Panizzo <maramaopercheseimorto@gmail.com> Cc: Valentin Longchamp <valentin.longchamp@epfl.ch> Cc: Daniel Mack <daniel@caiaq.de> Cc: Guennadi Liakhovetski <lg@denx.de> Cc: Yoichi Yuasa <yuasa@linux-mips.org> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Magnus Lilja <lilja.magnus@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Harro Haan <hrhaan@yahoo.com> Cc: Jean Delvare <khali@linux-fr.org> Cc: Luotao Fu <l.fu@pengutronix.de> Cc: Ilya Yanok <yanok@emcraft.com>
Diffstat (limited to 'arch/arm/mach-mx3/clock.c')
-rw-r--r--arch/arm/mach-mx3/clock.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index 27a318af0d20..cc03a61116e2 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -618,14 +618,14 @@ int __init mx31_clocks_init(unsigned long fref)
618 618
619 mx31_read_cpu_rev(); 619 mx31_read_cpu_rev();
620 620
621 if (mx31_revision() >= CHIP_REV_2_0) { 621 if (mx31_revision() >= MX31_CHIP_REV_2_0) {
622 reg = __raw_readl(MXC_CCM_PMCR1); 622 reg = __raw_readl(MXC_CCM_PMCR1);
623 /* No PLL restart on DVFS switch; enable auto EMI handshake */ 623 /* No PLL restart on DVFS switch; enable auto EMI handshake */
624 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN; 624 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN;
625 __raw_writel(reg, MXC_CCM_PMCR1); 625 __raw_writel(reg, MXC_CCM_PMCR1);
626 } 626 }
627 627
628 mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); 628 mxc_timer_init(&ipg_clk, IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT);
629 629
630 return 0; 630 return 0;
631} 631}