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authorSascha Hauer <s.hauer@pengutronix.de>2009-02-16 08:29:10 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2009-03-13 05:33:48 -0400
commite65fb0099fe4fe82d59ffe84f1e88a489218d7f9 (patch)
treeb35665ffe6e939961cc4aaa4f9bf2e1887d3f7a6 /arch/arm/mach-mx2
parent30c730f8f90b08d77a73998d2ee34cf1f56e95cc (diff)
[ARM] MXC: remove _clk suffix from clock names
The context makes it clear already that these are clocks, so there's no need for such a suffix. This patch only changes the clocks actually used in the tree. The remaining clocks are renamed in the subsequent architecture specific patches. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx2')
-rw-r--r--arch/arm/mach-mx2/clock_imx27.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 7b2c1122d9ab..700a22f5ae88 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -685,7 +685,7 @@ static struct clk per_clk[] = {
685 685
686struct clk uart1_clk[] = { 686struct clk uart1_clk[] = {
687 { 687 {
688 .name = "uart_clk", 688 .name = "uart",
689 .id = 0, 689 .id = 0,
690 .parent = &per_clk[0], 690 .parent = &per_clk[0],
691 .secondary = &uart1_clk[1], 691 .secondary = &uart1_clk[1],
@@ -702,7 +702,7 @@ struct clk uart1_clk[] = {
702 702
703struct clk uart2_clk[] = { 703struct clk uart2_clk[] = {
704 { 704 {
705 .name = "uart_clk", 705 .name = "uart",
706 .id = 1, 706 .id = 1,
707 .parent = &per_clk[0], 707 .parent = &per_clk[0],
708 .secondary = &uart2_clk[1], 708 .secondary = &uart2_clk[1],
@@ -719,7 +719,7 @@ struct clk uart2_clk[] = {
719 719
720struct clk uart3_clk[] = { 720struct clk uart3_clk[] = {
721 { 721 {
722 .name = "uart_clk", 722 .name = "uart",
723 .id = 2, 723 .id = 2,
724 .parent = &per_clk[0], 724 .parent = &per_clk[0],
725 .secondary = &uart3_clk[1], 725 .secondary = &uart3_clk[1],
@@ -736,7 +736,7 @@ struct clk uart3_clk[] = {
736 736
737struct clk uart4_clk[] = { 737struct clk uart4_clk[] = {
738 { 738 {
739 .name = "uart_clk", 739 .name = "uart",
740 .id = 3, 740 .id = 3,
741 .parent = &per_clk[0], 741 .parent = &per_clk[0],
742 .secondary = &uart4_clk[1], 742 .secondary = &uart4_clk[1],
@@ -753,7 +753,7 @@ struct clk uart4_clk[] = {
753 753
754struct clk uart5_clk[] = { 754struct clk uart5_clk[] = {
755 { 755 {
756 .name = "uart_clk", 756 .name = "uart",
757 .id = 4, 757 .id = 4,
758 .parent = &per_clk[0], 758 .parent = &per_clk[0],
759 .secondary = &uart5_clk[1], 759 .secondary = &uart5_clk[1],
@@ -770,7 +770,7 @@ struct clk uart5_clk[] = {
770 770
771struct clk uart6_clk[] = { 771struct clk uart6_clk[] = {
772 { 772 {
773 .name = "uart_clk", 773 .name = "uart",
774 .id = 5, 774 .id = 5,
775 .parent = &per_clk[0], 775 .parent = &per_clk[0],
776 .secondary = &uart6_clk[1], 776 .secondary = &uart6_clk[1],
@@ -1110,7 +1110,7 @@ static struct clk ssi2_clk[] = {
1110}; 1110};
1111 1111
1112static struct clk nfc_clk = { 1112static struct clk nfc_clk = {
1113 .name = "nfc_clk", 1113 .name = "nfc",
1114 .parent = &cpu_clk, 1114 .parent = &cpu_clk,
1115 .get_rate = _clk_nfc_recalc, 1115 .get_rate = _clk_nfc_recalc,
1116 .enable = _clk_enable, 1116 .enable = _clk_enable,
@@ -1128,7 +1128,7 @@ static struct clk vpu_clk = {
1128}; 1128};
1129 1129
1130static struct clk dma_clk = { 1130static struct clk dma_clk = {
1131 .name = "dma_clk", 1131 .name = "dma",
1132 .parent = &ahb_clk, 1132 .parent = &ahb_clk,
1133 .enable = _clk_dma_enable, 1133 .enable = _clk_dma_enable,
1134 .disable = _clk_dma_disable, 1134 .disable = _clk_dma_disable,
@@ -1260,7 +1260,7 @@ static struct clk kpp_clk = {
1260}; 1260};
1261 1261
1262static struct clk owire_clk = { 1262static struct clk owire_clk = {
1263 .name = "owire_clk", 1263 .name = "owire",
1264 .parent = &ipg_clk, 1264 .parent = &ipg_clk,
1265 .enable = _clk_enable, 1265 .enable = _clk_enable,
1266 .enable_reg = CCM_PCCR0, 1266 .enable_reg = CCM_PCCR0,