Merge commit 'linus/master' into HEAD

Conflicts:
	MAINTAINERS

Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>

10 files changed, 880 insertions, 343 deletions

diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig
index 42a788842f49..c77da586b71d 100644
--- a/arch/arm/mach-mx2/Kconfig
+++ b/arch/arm/mach-mx2/Kconfig
@@ -18,6 +18,13 @@ endchoice
 
 comment "MX2 platforms:"
 
+config MACH_MX21ADS
+        bool "MX21ADS platform"
+        depends on MACH_MX21
+        help
+          Include support for MX21ADS platform. This includes specific
+          configurations for the board and its peripherals.
+
 config MACH_MX27ADS
         bool "MX27ADS platform"
         depends on MACH_MX27
@@ -46,4 +53,18 @@ config MACH_PCM970_BASEBOARD
 
 endchoice
 
+config MACH_MX27_3DS
+        bool "MX27PDK platform"
+        depends on MACH_MX27
+        help
+          Include support for MX27PDK platform. This includes specific
+          configurations for the board and its peripherals.
+
+config MACH_MX27LITE
+        bool "LogicPD MX27 LITEKIT platform"
+        depends on MACH_MX27
+        help
+          Include support for MX27 LITEKIT platform. This includes specific
+          configurations for the board and its peripherals.
+
 endif
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile
index 950649a91540..b9b1cca4e9bc 100644
--- a/arch/arm/mach-mx2/Makefile
+++ b/arch/arm/mach-mx2/Makefile
@@ -11,6 +11,10 @@ obj-$(CONFIG_MACH_MX21) += clock_imx21.o
 obj-$(CONFIG_MACH_MX27) += cpu_imx27.o
 obj-$(CONFIG_MACH_MX27) += clock_imx27.o
 
+obj-$(CONFIG_MACH_MX21ADS) += mx21ads.o
 obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o
 obj-$(CONFIG_MACH_PCM038) += pcm038.o
 obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
+obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o
+obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o
+
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index e4b08ca804ea..0850fb88ec15 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -48,6 +48,25 @@ static void _clk_disable(struct clk *clk)
         __raw_writel(reg, clk->enable_reg);
 }
 
+static unsigned long _clk_generic_round_rate(struct clk *clk,
+                        unsigned long rate,
+                        u32 max_divisor)
+{
+        u32 div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+        if (parent_rate % rate)
+                div++;
+
+        if (div > max_divisor)
+                div = max_divisor;
+
+        return parent_rate / div;
+}
+
 static int _clk_spll_enable(struct clk *clk)
 {
         u32 reg;
@@ -78,19 +97,7 @@ static void _clk_spll_disable(struct clk *clk)
 static unsigned long _clk_perclkx_round_rate(struct clk *clk,
                                              unsigned long rate)
 {
-        u32 div;
-        unsigned long parent_rate;
-
-        parent_rate = clk_get_rate(clk->parent);
-
-        div = parent_rate / rate;
-        if (parent_rate % rate)
-                div++;
-
-        if (div > 64)
-                div = 64;
-
-        return parent_rate / div;
+        return _clk_generic_round_rate(clk, rate, 64);
 }
 
 static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate)
@@ -130,6 +137,32 @@ static unsigned long _clk_usb_recalc(struct clk *clk)
         return parent_rate / (usb_pdf + 1U);
 }
 
+static unsigned long _clk_usb_round_rate(struct clk *clk,
+                                             unsigned long rate)
+{
+        return _clk_generic_round_rate(clk, rate, 8);
+}
+
+static int _clk_usb_set_rate(struct clk *clk, unsigned long rate)
+{
+        u32 reg;
+        u32 div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+        if (div > 8 || div < 1 || ((parent_rate / div) != rate))
+                return -EINVAL;
+        div--;
+
+        reg = CSCR() & ~CCM_CSCR_USB_MASK;
+        reg |= div << CCM_CSCR_USB_OFFSET;
+        __raw_writel(reg, CCM_CSCR);
+
+        return 0;
+}
+
 static unsigned long _clk_ssix_recalc(struct clk *clk, unsigned long pdf)
 {
         unsigned long parent_rate;
@@ -595,11 +628,14 @@ static struct clk csi_clk[] = {
 static struct clk usb_clk[] = {
         {
                 .parent = &spll_clk,
+                .secondary = &usb_clk[1],
                 .get_rate = _clk_usb_recalc,
                 .enable = _clk_enable,
                 .enable_reg = CCM_PCCR_USBOTG_REG,
                 .enable_shift = CCM_PCCR_USBOTG_OFFSET,
                 .disable = _clk_disable,
+                .round_rate = _clk_usb_round_rate,
+                .set_rate = _clk_usb_set_rate,
         }, {
                 .parent = &hclk_clk,
                 .enable = _clk_enable,
@@ -768,18 +804,7 @@ static struct clk rtc_clk = {
 
 static unsigned long _clk_clko_round_rate(struct clk *clk, unsigned long rate)
 {
-        u32 div;
-        unsigned long parent_rate;
-
-        parent_rate = clk_get_rate(clk->parent);
-        div = parent_rate / rate;
-        if (parent_rate % rate)
-                div++;
-
-        if (div > 8)
-                div = 8;
-
-        return parent_rate / div;
+        return _clk_generic_round_rate(clk, rate, 8);
 }
 
 static int _clk_clko_set_rate(struct clk *clk, unsigned long rate)
@@ -921,7 +946,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2])
         _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk[0])
         _REGISTER_CLOCK(NULL, "csi", csi_clk[0])
-        _REGISTER_CLOCK(NULL, "usb", usb_clk[0])
+        _REGISTER_CLOCK("imx21-hcd.0", NULL, usb_clk[0])
         _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0])
         _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1])
         _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
diff --git a/arch/arm/mach-mx2/generic.c b/arch/arm/mach-mx2/generic.c
index bd51dd04948e..169372f69d8f 100644
--- a/arch/arm/mach-mx2/generic.c
+++ b/arch/arm/mach-mx2/generic.c
@@ -69,7 +69,17 @@ static struct map_desc mxc_io_desc[] __initdata = {
  * system startup to create static physical to virtual
  * memory map for the IO modules.
  */
-void __init mxc_map_io(void)
+void __init mx21_map_io(void)
 {
+        mxc_set_cpu_type(MXC_CPU_MX21);
+
         iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
 }
+
+void __init mx27_map_io(void)
+{
+        mxc_set_cpu_type(MXC_CPU_MX27);
+
+        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+}
+
diff --git a/arch/arm/mach-mx2/mx21ads.c b/arch/arm/mach-mx2/mx21ads.c
new file mode 100644
index 000000000000..a5ee461cb405
--- /dev/null
+++ b/arch/arm/mach-mx2/mx21ads.c
@@ -0,0 +1,286 @@
+/*
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
+ *  Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/physmap.h>
+#include <linux/gpio.h>
+#include <mach/common.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <asm/mach/map.h>
+#include <mach/imx-uart.h>
+#include <mach/imxfb.h>
+#include <mach/iomux.h>
+#include <mach/mxc_nand.h>
+#include <mach/mmc.h>
+#include <mach/board-mx21ads.h>
+
+#include "devices.h"
+
+static unsigned int mx21ads_pins[] = {
+
+        /* CS8900A */
+        (GPIO_PORTE | GPIO_GPIO | GPIO_IN | 11),
+
+        /* UART1 */
+        PE12_PF_UART1_TXD,
+        PE13_PF_UART1_RXD,
+        PE14_PF_UART1_CTS,
+        PE15_PF_UART1_RTS,
+
+        /* UART3 (IrDA) - only TXD and RXD */
+        PE8_PF_UART3_TXD,
+        PE9_PF_UART3_RXD,
+
+        /* UART4 */
+        PB26_AF_UART4_RTS,
+        PB28_AF_UART4_TXD,
+        PB29_AF_UART4_CTS,
+        PB31_AF_UART4_RXD,
+
+        /* LCDC */
+        PA5_PF_LSCLK,
+        PA6_PF_LD0,
+        PA7_PF_LD1,
+        PA8_PF_LD2,
+        PA9_PF_LD3,
+        PA10_PF_LD4,
+        PA11_PF_LD5,
+        PA12_PF_LD6,
+        PA13_PF_LD7,
+        PA14_PF_LD8,
+        PA15_PF_LD9,
+        PA16_PF_LD10,
+        PA17_PF_LD11,
+        PA18_PF_LD12,
+        PA19_PF_LD13,
+        PA20_PF_LD14,
+        PA21_PF_LD15,
+        PA22_PF_LD16,
+        PA24_PF_REV,     /* Sharp panel dedicated signal */
+        PA25_PF_CLS,     /* Sharp panel dedicated signal */
+        PA26_PF_PS,      /* Sharp panel dedicated signal */
+        PA27_PF_SPL_SPR, /* Sharp panel dedicated signal */
+        PA28_PF_HSYNC,
+        PA29_PF_VSYNC,
+        PA30_PF_CONTRAST,
+        PA31_PF_OE_ACD,
+
+        /* MMC/SDHC */
+        PE18_PF_SD1_D0,
+        PE19_PF_SD1_D1,
+        PE20_PF_SD1_D2,
+        PE21_PF_SD1_D3,
+        PE22_PF_SD1_CMD,
+        PE23_PF_SD1_CLK,
+
+        /* NFC */
+        PF0_PF_NRFB,
+        PF1_PF_NFCE,
+        PF2_PF_NFWP,
+        PF3_PF_NFCLE,
+        PF4_PF_NFALE,
+        PF5_PF_NFRE,
+        PF6_PF_NFWE,
+        PF7_PF_NFIO0,
+        PF8_PF_NFIO1,
+        PF9_PF_NFIO2,
+        PF10_PF_NFIO3,
+        PF11_PF_NFIO4,
+        PF12_PF_NFIO5,
+        PF13_PF_NFIO6,
+        PF14_PF_NFIO7,
+};
+
+/* ADS's NOR flash: 2x AM29BDS128HE9VKI on 32-bit bus */
+static struct physmap_flash_data mx21ads_flash_data = {
+        .width = 4,
+};
+
+static struct resource mx21ads_flash_resource = {
+        .start = CS0_BASE_ADDR,
+        .end = CS0_BASE_ADDR + 0x02000000 - 1,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device mx21ads_nor_mtd_device = {
+        .name = "physmap-flash",
+        .id = 0,
+        .dev = {
+                .platform_data = &mx21ads_flash_data,
+        },
+        .num_resources = 1,
+        .resource = &mx21ads_flash_resource,
+};
+
+static struct imxuart_platform_data uart_pdata = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static struct imxuart_platform_data uart_norts_pdata = {
+};
+
+
+static int mx21ads_fb_init(struct platform_device *pdev)
+{
+        u16 tmp;
+
+        tmp = __raw_readw(MX21ADS_IO_REG);
+        tmp |= MX21ADS_IO_LCDON;
+        __raw_writew(tmp, MX21ADS_IO_REG);
+        return 0;
+}
+
+static void mx21ads_fb_exit(struct platform_device *pdev)
+{
+        u16 tmp;
+
+        tmp = __raw_readw(MX21ADS_IO_REG);
+        tmp &= ~MX21ADS_IO_LCDON;
+        __raw_writew(tmp, MX21ADS_IO_REG);
+}
+
+/*
+ * Connected is a portrait Sharp-QVGA display
+ * of type: LQ035Q7DB02
+ */
+static struct imx_fb_platform_data mx21ads_fb_data = {
+        .pixclock       = 188679, /* in ps */
+        .xres           = 240,
+        .yres           = 320,
+
+        .bpp            = 16,
+        .hsync_len      = 2,
+        .left_margin    = 6,
+        .right_margin   = 16,
+
+        .vsync_len      = 1,
+        .upper_margin   = 8,
+        .lower_margin   = 10,
+        .fixed_screen_cpu = 0,
+
+        .pcr            = 0xFB108BC7,
+        .pwmr           = 0x00A901ff,
+        .lscr1          = 0x00120300,
+        .dmacr          = 0x00020008,
+
+        .init = mx21ads_fb_init,
+        .exit = mx21ads_fb_exit,
+};
+
+static int mx21ads_sdhc_get_ro(struct device *dev)
+{
+        return (__raw_readw(MX21ADS_IO_REG) & MX21ADS_IO_SD_WP) ? 1 : 0;
+}
+
+static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
+        void *data)
+{
+        int ret;
+
+        ret = request_irq(IRQ_GPIOD(25), detect_irq,
+                IRQF_TRIGGER_FALLING, "mmc-detect", data);
+        if (ret)
+                goto out;
+        return 0;
+out:
+        return ret;
+}
+
+static void mx21ads_sdhc_exit(struct device *dev, void *data)
+{
+        free_irq(IRQ_GPIOD(25), data);
+}
+
+static struct imxmmc_platform_data mx21ads_sdhc_pdata = {
+        .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */
+        .get_ro = mx21ads_sdhc_get_ro,
+        .init = mx21ads_sdhc_init,
+        .exit = mx21ads_sdhc_exit,
+};
+
+static struct mxc_nand_platform_data mx21ads_nand_board_info = {
+        .width = 1,
+        .hw_ecc = 1,
+};
+
+static struct map_desc mx21ads_io_desc[] __initdata = {
+        /*
+         * Memory-mapped I/O on MX21ADS Base board:
+         *   - CS8900A Ethernet controller
+         *   - ST16C2552CJ UART
+         *   - CPU and Base board version
+         *   - Base board I/O register
+         */
+        {
+                .virtual = MX21ADS_MMIO_BASE_ADDR,
+                .pfn = __phys_to_pfn(CS1_BASE_ADDR),
+                .length = MX21ADS_MMIO_SIZE,
+                .type = MT_DEVICE,
+        },
+};
+
+static void __init mx21ads_map_io(void)
+{
+        mx21_map_io();
+        iotable_init(mx21ads_io_desc, ARRAY_SIZE(mx21ads_io_desc));
+}
+
+static struct platform_device *platform_devices[] __initdata = {
+        &mx21ads_nor_mtd_device,
+};
+
+static void __init mx21ads_board_init(void)
+{
+        mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins),
+                        "mx21ads");
+
+        mxc_register_device(&mxc_uart_device0, &uart_pdata);
+        mxc_register_device(&mxc_uart_device2, &uart_norts_pdata);
+        mxc_register_device(&mxc_uart_device3, &uart_pdata);
+        mxc_register_device(&mxc_fb_device, &mx21ads_fb_data);
+        mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata);
+        mxc_register_device(&mxc_nand_device, &mx21ads_nand_board_info);
+
+        platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+}
+
+static void __init mx21ads_timer_init(void)
+{
+        mx21_clocks_init(32768, 26000000);
+}
+
+static struct sys_timer mx21ads_timer = {
+        .init   = mx21ads_timer_init,
+};
+
+MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
+        /* maintainer: Freescale Semiconductor, Inc. */
+        .phys_io        = AIPI_BASE_ADDR,
+        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = PHYS_OFFSET + 0x100,
+        .map_io         = mx21ads_map_io,
+        .init_irq       = mxc_init_irq,
+        .init_machine   = mx21ads_board_init,
+        .timer          = &mx21ads_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c
index 4a3b097adc12..02daddac6995 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mx27ads.c
@@ -23,6 +23,8 @@
 #include <linux/mtd/map.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
+#include <linux/i2c.h>
+#include <linux/irq.h>
 #include <mach/common.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -33,9 +35,117 @@
 #include <mach/imx-uart.h>
 #include <mach/iomux.h>
 #include <mach/board-mx27ads.h>
+#include <mach/mxc_nand.h>
+#include <mach/i2c.h>
+#include <mach/imxfb.h>
+#include <mach/mmc.h>
 
 #include "devices.h"
 
+static unsigned int mx27ads_pins[] = {
+        /* UART0 */
+        PE12_PF_UART1_TXD,
+        PE13_PF_UART1_RXD,
+        PE14_PF_UART1_CTS,
+        PE15_PF_UART1_RTS,
+        /* UART1 */
+        PE3_PF_UART2_CTS,
+        PE4_PF_UART2_RTS,
+        PE6_PF_UART2_TXD,
+        PE7_PF_UART2_RXD,
+        /* UART2 */
+        PE8_PF_UART3_TXD,
+        PE9_PF_UART3_RXD,
+        PE10_PF_UART3_CTS,
+        PE11_PF_UART3_RTS,
+        /* UART3 */
+        PB26_AF_UART4_RTS,
+        PB28_AF_UART4_TXD,
+        PB29_AF_UART4_CTS,
+        PB31_AF_UART4_RXD,
+        /* UART4 */
+        PB18_AF_UART5_TXD,
+        PB19_AF_UART5_RXD,
+        PB20_AF_UART5_CTS,
+        PB21_AF_UART5_RTS,
+        /* UART5 */
+        PB10_AF_UART6_TXD,
+        PB12_AF_UART6_CTS,
+        PB11_AF_UART6_RXD,
+        PB13_AF_UART6_RTS,
+        /* FEC */
+        PD0_AIN_FEC_TXD0,
+        PD1_AIN_FEC_TXD1,
+        PD2_AIN_FEC_TXD2,
+        PD3_AIN_FEC_TXD3,
+        PD4_AOUT_FEC_RX_ER,
+        PD5_AOUT_FEC_RXD1,
+        PD6_AOUT_FEC_RXD2,
+        PD7_AOUT_FEC_RXD3,
+        PD8_AF_FEC_MDIO,
+        PD9_AIN_FEC_MDC,
+        PD10_AOUT_FEC_CRS,
+        PD11_AOUT_FEC_TX_CLK,
+        PD12_AOUT_FEC_RXD0,
+        PD13_AOUT_FEC_RX_DV,
+        PD14_AOUT_FEC_RX_CLK,
+        PD15_AOUT_FEC_COL,
+        PD16_AIN_FEC_TX_ER,
+        PF23_AIN_FEC_TX_EN,
+        /* I2C2 */
+        PC5_PF_I2C2_SDA,
+        PC6_PF_I2C2_SCL,
+        /* FB */
+        PA5_PF_LSCLK,
+        PA6_PF_LD0,
+        PA7_PF_LD1,
+        PA8_PF_LD2,
+        PA9_PF_LD3,
+        PA10_PF_LD4,
+        PA11_PF_LD5,
+        PA12_PF_LD6,
+        PA13_PF_LD7,
+        PA14_PF_LD8,
+        PA15_PF_LD9,
+        PA16_PF_LD10,
+        PA17_PF_LD11,
+        PA18_PF_LD12,
+        PA19_PF_LD13,
+        PA20_PF_LD14,
+        PA21_PF_LD15,
+        PA22_PF_LD16,
+        PA23_PF_LD17,
+        PA24_PF_REV,
+        PA25_PF_CLS,
+        PA26_PF_PS,
+        PA27_PF_SPL_SPR,
+        PA28_PF_HSYNC,
+        PA29_PF_VSYNC,
+        PA30_PF_CONTRAST,
+        PA31_PF_OE_ACD,
+        /* OWIRE */
+        PE16_AF_OWIRE,
+        /* SDHC1*/
+        PE18_PF_SD1_D0,
+        PE19_PF_SD1_D1,
+        PE20_PF_SD1_D2,
+        PE21_PF_SD1_D3,
+        PE22_PF_SD1_CMD,
+        PE23_PF_SD1_CLK,
+        /* SDHC2*/
+        PB4_PF_SD2_D0,
+        PB5_PF_SD2_D1,
+        PB6_PF_SD2_D2,
+        PB7_PF_SD2_D3,
+        PB8_PF_SD2_CMD,
+        PB9_PF_SD2_CLK,
+};
+
+static struct mxc_nand_platform_data mx27ads_nand_board_info = {
+        .width = 1,
+        .hw_ecc = 1,
+};
+
 /* ADS's NOR flash */
 static struct physmap_flash_data mx27ads_flash_data = {
         .width = 2,
@@ -58,189 +168,113 @@ static struct platform_device mx27ads_nor_mtd_device = {
         .resource = &mx27ads_flash_resource,
 };
 
-static int mxc_uart0_pins[] = {
-        PE12_PF_UART1_TXD,
-        PE13_PF_UART1_RXD,
-        PE14_PF_UART1_CTS,
-        PE15_PF_UART1_RTS
+static struct imxi2c_platform_data mx27ads_i2c_data = {
+        .bitrate = 100000,
 };
 
-static int uart_mxc_port0_init(struct platform_device *pdev)
-{
-        return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
-                        ARRAY_SIZE(mxc_uart0_pins), "UART0");
-}
-
-static int uart_mxc_port0_exit(struct platform_device *pdev)
-{
-        mxc_gpio_release_multiple_pins(mxc_uart0_pins,
-                        ARRAY_SIZE(mxc_uart0_pins));
-        return 0;
-}
-
-static int mxc_uart1_pins[] = {
-        PE3_PF_UART2_CTS,
-        PE4_PF_UART2_RTS,
-        PE6_PF_UART2_TXD,
-        PE7_PF_UART2_RXD
+static struct i2c_board_info mx27ads_i2c_devices[] = {
 };
 
-static int uart_mxc_port1_init(struct platform_device *pdev)
+void lcd_power(int on)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins), "UART1");
+        if (on)
+                __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_SET_REG);
+        else
+                __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG);
 }
 
-static int uart_mxc_port1_exit(struct platform_device *pdev)
-{
-        mxc_gpio_release_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins));
-        return 0;
-}
-
-static int mxc_uart2_pins[] = {
-        PE8_PF_UART3_TXD,
-        PE9_PF_UART3_RXD,
-        PE10_PF_UART3_CTS,
-        PE11_PF_UART3_RTS
+static struct imx_fb_platform_data mx27ads_fb_data = {
+        .pixclock       = 188679,
+        .xres           = 240,
+        .yres           = 320,
+
+        .bpp            = 16,
+        .hsync_len      = 1,
+        .left_margin    = 9,
+        .right_margin   = 16,
+
+        .vsync_len      = 1,
+        .upper_margin   = 7,
+        .lower_margin   = 9,
+        .fixed_screen_cpu = 0,
+
+        /*
+         * - HSYNC active high
+         * - VSYNC active high
+         * - clk notenabled while idle
+         * - clock inverted
+         * - data not inverted
+         * - data enable low active
+         * - enable sharp mode
+         */
+        .pcr            = 0xFB008BC0,
+        .pwmr           = 0x00A903FF,
+        .lscr1          = 0x00120300,
+        .dmacr          = 0x00020010,
+
+        .lcd_power      = lcd_power,
 };
 
-static int uart_mxc_port2_init(struct platform_device *pdev)
+static int mx27ads_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
+                              void *data)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
-                        ARRAY_SIZE(mxc_uart2_pins), "UART2");
+        return request_irq(IRQ_GPIOE(21), detect_irq, IRQF_TRIGGER_RISING,
+                           "sdhc1-card-detect", data);
 }
 
-static int uart_mxc_port2_exit(struct platform_device *pdev)
+static int mx27ads_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
+                              void *data)
 {
-        mxc_gpio_release_multiple_pins(mxc_uart2_pins,
-                        ARRAY_SIZE(mxc_uart2_pins));
-        return 0;
+        return request_irq(IRQ_GPIOB(7), detect_irq, IRQF_TRIGGER_RISING,
+                           "sdhc2-card-detect", data);
 }
 
-static int mxc_uart3_pins[] = {
-        PB26_AF_UART4_RTS,
-        PB28_AF_UART4_TXD,
-        PB29_AF_UART4_CTS,
-        PB31_AF_UART4_RXD
-};
-
-static int uart_mxc_port3_init(struct platform_device *pdev)
+static void mx27ads_sdhc1_exit(struct device *dev, void *data)
 {
-        return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
-                        ARRAY_SIZE(mxc_uart3_pins), "UART3");
+        free_irq(IRQ_GPIOE(21), data);
 }
 
-static int uart_mxc_port3_exit(struct platform_device *pdev)
+static void mx27ads_sdhc2_exit(struct device *dev, void *data)
 {
-        mxc_gpio_release_multiple_pins(mxc_uart3_pins,
-                        ARRAY_SIZE(mxc_uart3_pins));
-        return 0;
+        free_irq(IRQ_GPIOB(7), data);
 }
 
-static int mxc_uart4_pins[] = {
-        PB18_AF_UART5_TXD,
-        PB19_AF_UART5_RXD,
-        PB20_AF_UART5_CTS,
-        PB21_AF_UART5_RTS
+static struct imxmmc_platform_data sdhc1_pdata = {
+        .init = mx27ads_sdhc1_init,
+        .exit = mx27ads_sdhc1_exit,
 };
 
-static int uart_mxc_port4_init(struct platform_device *pdev)
-{
-        return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
-                        ARRAY_SIZE(mxc_uart4_pins), "UART4");
-}
-
-static int uart_mxc_port4_exit(struct platform_device *pdev)
-{
-        mxc_gpio_release_multiple_pins(mxc_uart4_pins,
-                        ARRAY_SIZE(mxc_uart4_pins));
-        return 0;
-}
-
-static int mxc_uart5_pins[] = {
-        PB10_AF_UART6_TXD,
-        PB12_AF_UART6_CTS,
-        PB11_AF_UART6_RXD,
-        PB13_AF_UART6_RTS
+static struct imxmmc_platform_data sdhc2_pdata = {
+        .init = mx27ads_sdhc2_init,
+        .exit = mx27ads_sdhc2_exit,
 };
 
-static int uart_mxc_port5_init(struct platform_device *pdev)
-{
-        return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
-                        ARRAY_SIZE(mxc_uart5_pins), "UART5");
-}
-
-static int uart_mxc_port5_exit(struct platform_device *pdev)
-{
-        mxc_gpio_release_multiple_pins(mxc_uart5_pins,
-                        ARRAY_SIZE(mxc_uart5_pins));
-        return 0;
-}
-
 static struct platform_device *platform_devices[] __initdata = {
         &mx27ads_nor_mtd_device,
         &mxc_fec_device,
+        &mxc_w1_master_device,
 };
 
-static int mxc_fec_pins[] = {
-        PD0_AIN_FEC_TXD0,
-        PD1_AIN_FEC_TXD1,
-        PD2_AIN_FEC_TXD2,
-        PD3_AIN_FEC_TXD3,
-        PD4_AOUT_FEC_RX_ER,
-        PD5_AOUT_FEC_RXD1,
-        PD6_AOUT_FEC_RXD2,
-        PD7_AOUT_FEC_RXD3,
-        PD8_AF_FEC_MDIO,
-        PD9_AIN_FEC_MDC,
-        PD10_AOUT_FEC_CRS,
-        PD11_AOUT_FEC_TX_CLK,
-        PD12_AOUT_FEC_RXD0,
-        PD13_AOUT_FEC_RX_DV,
-        PD14_AOUT_FEC_RX_CLK,
-        PD15_AOUT_FEC_COL,
-        PD16_AIN_FEC_TX_ER,
-        PF23_AIN_FEC_TX_EN
-};
-
-static void gpio_fec_active(void)
-{
-        mxc_gpio_setup_multiple_pins(mxc_fec_pins,
-                        ARRAY_SIZE(mxc_fec_pins), "FEC");
-}
-
 static struct imxuart_platform_data uart_pdata[] = {
         {
-                .init = uart_mxc_port0_init,
-                .exit = uart_mxc_port0_exit,
                 .flags = IMXUART_HAVE_RTSCTS,
         }, {
-                .init = uart_mxc_port1_init,
-                .exit = uart_mxc_port1_exit,
                 .flags = IMXUART_HAVE_RTSCTS,
         }, {
-                .init = uart_mxc_port2_init,
-                .exit = uart_mxc_port2_exit,
                 .flags = IMXUART_HAVE_RTSCTS,
         }, {
-                .init = uart_mxc_port3_init,
-                .exit = uart_mxc_port3_exit,
                 .flags = IMXUART_HAVE_RTSCTS,
         }, {
-                .init = uart_mxc_port4_init,
-                .exit = uart_mxc_port4_exit,
                 .flags = IMXUART_HAVE_RTSCTS,
         }, {
-                .init = uart_mxc_port5_init,
-                .exit = uart_mxc_port5_exit,
                 .flags = IMXUART_HAVE_RTSCTS,
         },
 };
 
 static void __init mx27ads_board_init(void)
 {
-        gpio_fec_active();
+        mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins),
+                        "mx27ads");
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
         mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
@@ -248,6 +282,15 @@ static void __init mx27ads_board_init(void)
         mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
         mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
         mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
+        mxc_register_device(&mxc_nand_device, &mx27ads_nand_board_info);
+
+        /* only the i2c master 1 is used on this CPU card */
+        i2c_register_board_info(1, mx27ads_i2c_devices,
+                                ARRAY_SIZE(mx27ads_i2c_devices));
+        mxc_register_device(&mxc_i2c_device1, &mx27ads_i2c_data);
+        mxc_register_device(&mxc_fb_device, &mx27ads_fb_data);
+        mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
+        mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata);
 
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 }
@@ -277,7 +320,7 @@ static struct map_desc mx27ads_io_desc[] __initdata = {
 
 static void __init mx27ads_map_io(void)
 {
-        mxc_map_io();
+        mx27_map_io();
         iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
 }
 
diff --git a/arch/arm/mach-mx2/mx27lite.c b/arch/arm/mach-mx2/mx27lite.c
new file mode 100644
index 000000000000..3ae11cb8c04b
--- /dev/null
+++ b/arch/arm/mach-mx2/mx27lite.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
+ * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
+ * Copyright 2009 Daniel Schaeffer (daniel.schaeffer@timesys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <asm/mach/map.h>
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux.h>
+#include <mach/board-mx27lite.h>
+
+#include "devices.h"
+
+static unsigned int mx27lite_pins[] = {
+        /* UART1 */
+        PE12_PF_UART1_TXD,
+        PE13_PF_UART1_RXD,
+        PE14_PF_UART1_CTS,
+        PE15_PF_UART1_RTS,
+        /* FEC */
+        PD0_AIN_FEC_TXD0,
+        PD1_AIN_FEC_TXD1,
+        PD2_AIN_FEC_TXD2,
+        PD3_AIN_FEC_TXD3,
+        PD4_AOUT_FEC_RX_ER,
+        PD5_AOUT_FEC_RXD1,
+        PD6_AOUT_FEC_RXD2,
+        PD7_AOUT_FEC_RXD3,
+        PD8_AF_FEC_MDIO,
+        PD9_AIN_FEC_MDC,
+        PD10_AOUT_FEC_CRS,
+        PD11_AOUT_FEC_TX_CLK,
+        PD12_AOUT_FEC_RXD0,
+        PD13_AOUT_FEC_RX_DV,
+        PD14_AOUT_FEC_RX_CLK,
+        PD15_AOUT_FEC_COL,
+        PD16_AIN_FEC_TX_ER,
+        PF23_AIN_FEC_TX_EN,
+};
+
+static struct imxuart_platform_data uart_pdata = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static struct platform_device *platform_devices[] __initdata = {
+        &mxc_fec_device,
+};
+
+static void __init mx27lite_init(void)
+{
+        mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins),
+                "imx27lite");
+        mxc_register_device(&mxc_uart_device0, &uart_pdata);
+        platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+}
+
+static void __init mx27lite_timer_init(void)
+{
+        mx27_clocks_init(26000000);
+}
+
+static struct sys_timer mx27lite_timer = {
+        .init   = mx27lite_timer_init,
+};
+
+MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
+        .phys_io        = AIPI_BASE_ADDR,
+        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = PHYS_OFFSET + 0x100,
+        .map_io         = mx27_map_io,
+        .init_irq       = mxc_init_irq,
+        .init_machine   = mx27lite_init,
+        .timer          = &mx27lite_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mx2/mx27pdk.c b/arch/arm/mach-mx2/mx27pdk.c
new file mode 100644
index 000000000000..1d9238c7a6c3
--- /dev/null
+++ b/arch/arm/mach-mx2/mx27pdk.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * Author: Fabio Estevam <fabio.estevam@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux.h>
+#include <mach/board-mx27pdk.h>
+
+#include "devices.h"
+
+static unsigned int mx27pdk_pins[] = {
+        /* UART1 */
+        PE12_PF_UART1_TXD,
+        PE13_PF_UART1_RXD,
+        PE14_PF_UART1_CTS,
+        PE15_PF_UART1_RTS,
+        /* FEC */
+        PD0_AIN_FEC_TXD0,
+        PD1_AIN_FEC_TXD1,
+        PD2_AIN_FEC_TXD2,
+        PD3_AIN_FEC_TXD3,
+        PD4_AOUT_FEC_RX_ER,
+        PD5_AOUT_FEC_RXD1,
+        PD6_AOUT_FEC_RXD2,
+        PD7_AOUT_FEC_RXD3,
+        PD8_AF_FEC_MDIO,
+        PD9_AIN_FEC_MDC,
+        PD10_AOUT_FEC_CRS,
+        PD11_AOUT_FEC_TX_CLK,
+        PD12_AOUT_FEC_RXD0,
+        PD13_AOUT_FEC_RX_DV,
+        PD14_AOUT_FEC_RX_CLK,
+        PD15_AOUT_FEC_COL,
+        PD16_AIN_FEC_TX_ER,
+        PF23_AIN_FEC_TX_EN,
+};
+
+static struct imxuart_platform_data uart_pdata = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static struct platform_device *platform_devices[] __initdata = {
+        &mxc_fec_device,
+};
+
+static void __init mx27pdk_init(void)
+{
+        mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
+                "mx27pdk");
+        mxc_register_device(&mxc_uart_device0, &uart_pdata);
+        platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+}
+
+static void __init mx27pdk_timer_init(void)
+{
+        mx27_clocks_init(26000000);
+}
+
+static struct sys_timer mx27pdk_timer = {
+        .init   = mx27pdk_timer_init,
+};
+
+MACHINE_START(MX27_3DS, "Freescale MX27PDK")
+        /* maintainer: Freescale Semiconductor, Inc. */
+        .phys_io        = AIPI_BASE_ADDR,
+        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = PHYS_OFFSET + 0x100,
+        .map_io         = mx27_map_io,
+        .init_irq       = mxc_init_irq,
+        .init_machine   = mx27pdk_init,
+        .timer          = &mx27pdk_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c
index aa4eaa61d1b5..a4628d004343 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/pcm038.c
@@ -17,28 +17,84 @@
  * MA 02110-1301, USA.
  */
 
-#include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mtd/plat-ram.h>
-#include <linux/io.h>
 #include <linux/i2c.h>
 #include <linux/i2c/at24.h>
+#include <linux/io.h>
+#include <linux/mtd/plat-ram.h>
+#include <linux/mtd/physmap.h>
+#include <linux/platform_device.h>
 
-#include <asm/mach/arch.h>
 #include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+#include <mach/board-pcm038.h>
 #include <mach/common.h>
 #include <mach/hardware.h>
-#include <mach/iomux.h>
-#ifdef CONFIG_I2C_IMX
 #include <mach/i2c.h>
-#endif
-#include <asm/mach/time.h>
+#include <mach/iomux.h>
 #include <mach/imx-uart.h>
-#include <mach/board-pcm038.h>
 #include <mach/mxc_nand.h>
 
 #include "devices.h"
 
+static int pcm038_pins[] = {
+        /* UART1 */
+        PE12_PF_UART1_TXD,
+        PE13_PF_UART1_RXD,
+        PE14_PF_UART1_CTS,
+        PE15_PF_UART1_RTS,
+        /* UART2 */
+        PE3_PF_UART2_CTS,
+        PE4_PF_UART2_RTS,
+        PE6_PF_UART2_TXD,
+        PE7_PF_UART2_RXD,
+        /* UART3 */
+        PE8_PF_UART3_TXD,
+        PE9_PF_UART3_RXD,
+        PE10_PF_UART3_CTS,
+        PE11_PF_UART3_RTS,
+        /* FEC */
+        PD0_AIN_FEC_TXD0,
+        PD1_AIN_FEC_TXD1,
+        PD2_AIN_FEC_TXD2,
+        PD3_AIN_FEC_TXD3,
+        PD4_AOUT_FEC_RX_ER,
+        PD5_AOUT_FEC_RXD1,
+        PD6_AOUT_FEC_RXD2,
+        PD7_AOUT_FEC_RXD3,
+        PD8_AF_FEC_MDIO,
+        PD9_AIN_FEC_MDC,
+        PD10_AOUT_FEC_CRS,
+        PD11_AOUT_FEC_TX_CLK,
+        PD12_AOUT_FEC_RXD0,
+        PD13_AOUT_FEC_RX_DV,
+        PD14_AOUT_FEC_RX_CLK,
+        PD15_AOUT_FEC_COL,
+        PD16_AIN_FEC_TX_ER,
+        PF23_AIN_FEC_TX_EN,
+        /* I2C2 */
+        PC5_PF_I2C2_SDA,
+        PC6_PF_I2C2_SCL,
+        /* SPI1 */
+        PD25_PF_CSPI1_RDY,
+        PD27_PF_CSPI1_SS1,
+        PD28_PF_CSPI1_SS0,
+        PD29_PF_CSPI1_SCLK,
+        PD30_PF_CSPI1_MISO,
+        PD31_PF_CSPI1_MOSI,
+        /* SSI1 */
+        PC20_PF_SSI1_FS,
+        PC21_PF_SSI1_RXD,
+        PC22_PF_SSI1_TXD,
+        PC23_PF_SSI1_CLK,
+        /* SSI4 */
+        PC16_PF_SSI4_FS,
+        PC17_PF_SSI4_RXD,
+        PC18_PF_SSI4_TXD,
+        PC19_PF_SSI4_CLK,
+};
+
 /*
  * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
  * 16 bit width
@@ -88,107 +144,16 @@ static struct platform_device pcm038_nor_mtd_device = {
         .resource = &pcm038_flash_resource,
 };
 
-static int mxc_uart0_pins[] = {
-        PE12_PF_UART1_TXD,
-        PE13_PF_UART1_RXD,
-        PE14_PF_UART1_CTS,
-        PE15_PF_UART1_RTS
-};
-
-static int uart_mxc_port0_init(struct platform_device *pdev)
-{
-        return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
-                        ARRAY_SIZE(mxc_uart0_pins), "UART0");
-}
-
-static int uart_mxc_port0_exit(struct platform_device *pdev)
-{
-        mxc_gpio_release_multiple_pins(mxc_uart0_pins,
-                        ARRAY_SIZE(mxc_uart0_pins));
-        return 0;
-}
-
-static int mxc_uart1_pins[] = {
-        PE3_PF_UART2_CTS,
-        PE4_PF_UART2_RTS,
-        PE6_PF_UART2_TXD,
-        PE7_PF_UART2_RXD
-};
-
-static int uart_mxc_port1_init(struct platform_device *pdev)
-{
-        return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins), "UART1");
-}
-
-static int uart_mxc_port1_exit(struct platform_device *pdev)
-{
-        mxc_gpio_release_multiple_pins(mxc_uart1_pins,
-                        ARRAY_SIZE(mxc_uart1_pins));
-        return 0;
-}
-
-static int mxc_uart2_pins[] = { PE8_PF_UART3_TXD,
-                                PE9_PF_UART3_RXD,
-                                PE10_PF_UART3_CTS,
-                                PE11_PF_UART3_RTS };
-
-static int uart_mxc_port2_init(struct platform_device *pdev)
-{
-        return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
-                        ARRAY_SIZE(mxc_uart2_pins), "UART2");
-}
-
-static int uart_mxc_port2_exit(struct platform_device *pdev)
-{
-        mxc_gpio_release_multiple_pins(mxc_uart2_pins,
-                        ARRAY_SIZE(mxc_uart2_pins));
-        return 0;
-}
-
 static struct imxuart_platform_data uart_pdata[] = {
         {
-                .init = uart_mxc_port0_init,
-                .exit = uart_mxc_port0_exit,
                 .flags = IMXUART_HAVE_RTSCTS,
         }, {
-                .init = uart_mxc_port1_init,
-                .exit = uart_mxc_port1_exit,
                 .flags = IMXUART_HAVE_RTSCTS,
         }, {
-                .init = uart_mxc_port2_init,
-                .exit = uart_mxc_port2_exit,
                 .flags = IMXUART_HAVE_RTSCTS,
         },
 };
 
-static int mxc_fec_pins[] = {
-        PD0_AIN_FEC_TXD0,
-        PD1_AIN_FEC_TXD1,
-        PD2_AIN_FEC_TXD2,
-        PD3_AIN_FEC_TXD3,
-        PD4_AOUT_FEC_RX_ER,
-        PD5_AOUT_FEC_RXD1,
-        PD6_AOUT_FEC_RXD2,
-        PD7_AOUT_FEC_RXD3,
-        PD8_AF_FEC_MDIO,
-        PD9_AIN_FEC_MDC,
-        PD10_AOUT_FEC_CRS,
-        PD11_AOUT_FEC_TX_CLK,
-        PD12_AOUT_FEC_RXD0,
-        PD13_AOUT_FEC_RX_DV,
-        PD14_AOUT_FEC_RX_CLK,
-        PD15_AOUT_FEC_COL,
-        PD16_AIN_FEC_TX_ER,
-        PF23_AIN_FEC_TX_EN
-};
-
-static void gpio_fec_active(void)
-{
-        mxc_gpio_setup_multiple_pins(mxc_fec_pins,
-                        ARRAY_SIZE(mxc_fec_pins), "FEC");
-}
-
 static struct mxc_nand_platform_data pcm038_nand_board_info = {
         .width = 1,
         .hw_ecc = 1,
@@ -210,27 +175,8 @@ static void __init pcm038_init_sram(void)
         __raw_writel(0x22220a00, CSCR_A(1));
 }
 
-#ifdef CONFIG_I2C_IMX
-static int mxc_i2c1_pins[] = {
-        PC5_PF_I2C2_SDA,
-        PC6_PF_I2C2_SCL
-};
-
-static int pcm038_i2c_1_init(struct device *dev)
-{
-        return mxc_gpio_setup_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins),
-                        "I2C1");
-}
-
-static void pcm038_i2c_1_exit(struct device *dev)
-{
-        mxc_gpio_release_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins));
-}
-
 static struct imxi2c_platform_data pcm038_i2c_1_data = {
         .bitrate = 100000,
-        .init = pcm038_i2c_1_init,
-        .exit = pcm038_i2c_1_exit,
 };
 
 static struct at24_platform_data board_eeprom = {
@@ -253,11 +199,12 @@ static struct i2c_board_info pcm038_i2c_devices[] = {
                 .type = "lm75"
         }
 };
-#endif
 
 static void __init pcm038_init(void)
 {
-        gpio_fec_active();
+        mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
+                        "PCM038");
+
         pcm038_init_sram();
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
@@ -267,13 +214,11 @@ static void __init pcm038_init(void)
         mxc_gpio_mode(PE16_AF_OWIRE);
         mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info);
 
-#ifdef CONFIG_I2C_IMX
         /* only the i2c master 1 is used on this CPU card */
         i2c_register_board_info(1, pcm038_i2c_devices,
                                 ARRAY_SIZE(pcm038_i2c_devices));
 
         mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);
-#endif
 
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 
@@ -295,7 +240,7 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
         .phys_io        = AIPI_BASE_ADDR,
         .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
         .boot_params    = PHYS_OFFSET + 0x100,
-        .map_io         = mxc_map_io,
+        .map_io         = mx27_map_io,
         .init_irq       = mxc_init_irq,
         .init_machine   = pcm038_init,
         .timer          = &pcm038_timer,
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c
index bf4e520bc1bc..6a3acaf57dd4 100644
--- a/arch/arm/mach-mx2/pcm970-baseboard.c
+++ b/arch/arm/mach-mx2/pcm970-baseboard.c
@@ -16,71 +16,107 @@
  * MA 02110-1301, USA.
  */
 
-#include <linux/platform_device.h>
 #include <linux/gpio.h>
 #include <linux/irq.h>
+#include <linux/platform_device.h>
 
 #include <asm/mach/arch.h>
 
-#include <mach/hardware.h>
 #include <mach/common.h>
-#include <mach/mmc.h>
-#include <mach/imxfb.h>
 #include <mach/iomux.h>
+#include <mach/imxfb.h>
+#include <mach/hardware.h>
+#include <mach/mmc.h>
 
 #include "devices.h"
 
-static int pcm970_sdhc2_get_ro(struct device *dev)
-{
-        return gpio_get_value(GPIO_PORTC + 28);
-}
-
-static int pcm970_sdhc2_pins[] = {
+static int pcm970_pins[] = {
+        /* SDHC */
         PB4_PF_SD2_D0,
         PB5_PF_SD2_D1,
         PB6_PF_SD2_D2,
         PB7_PF_SD2_D3,
         PB8_PF_SD2_CMD,
         PB9_PF_SD2_CLK,
+        GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN, /* card detect */
+        /* display */
+        PA5_PF_LSCLK,
+        PA6_PF_LD0,
+        PA7_PF_LD1,
+        PA8_PF_LD2,
+        PA9_PF_LD3,
+        PA10_PF_LD4,
+        PA11_PF_LD5,
+        PA12_PF_LD6,
+        PA13_PF_LD7,
+        PA14_PF_LD8,
+        PA15_PF_LD9,
+        PA16_PF_LD10,
+        PA17_PF_LD11,
+        PA18_PF_LD12,
+        PA19_PF_LD13,
+        PA20_PF_LD14,
+        PA21_PF_LD15,
+        PA22_PF_LD16,
+        PA23_PF_LD17,
+        PA24_PF_REV,
+        PA25_PF_CLS,
+        PA26_PF_PS,
+        PA27_PF_SPL_SPR,
+        PA28_PF_HSYNC,
+        PA29_PF_VSYNC,
+        PA30_PF_CONTRAST,
+        PA31_PF_OE_ACD,
+        /*
+         * it seems the data line misses a pullup, so we must enable
+         * the internal pullup as a local workaround
+         */
+        PD17_PF_I2C_DATA | GPIO_PUEN,
+        PD18_PF_I2C_CLK,
+        /* Camera */
+        PB10_PF_CSI_D0,
+        PB11_PF_CSI_D1,
+        PB12_PF_CSI_D2,
+        PB13_PF_CSI_D3,
+        PB14_PF_CSI_D4,
+        PB15_PF_CSI_MCLK,
+        PB16_PF_CSI_PIXCLK,
+        PB17_PF_CSI_D5,
+        PB18_PF_CSI_D6,
+        PB19_PF_CSI_D7,
+        PB20_PF_CSI_VSYNC,
+        PB21_PF_CSI_HSYNC,
 };
 
+static int pcm970_sdhc2_get_ro(struct device *dev)
+{
+        return gpio_get_value(GPIO_PORTC + 28);
+}
+
 static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void *data)
 {
         int ret;
 
-        ret = mxc_gpio_setup_multiple_pins(pcm970_sdhc2_pins,
-                ARRAY_SIZE(pcm970_sdhc2_pins), "sdhc2");
-        if(ret)
-                return ret;
-
-        ret = request_irq(IRQ_GPIOC(29), detect_irq, 0,
+        ret = request_irq(IRQ_GPIOC(29), detect_irq, IRQF_TRIGGER_FALLING,
                                 "imx-mmc-detect", data);
         if (ret)
-                goto out_release_gpio;
-
-        set_irq_type(IRQ_GPIOC(29), IRQF_TRIGGER_FALLING);
+                return ret;
 
         ret = gpio_request(GPIO_PORTC + 28, "imx-mmc-ro");
-        if (ret)
-                goto out_release_gpio;
+        if (ret) {
+                free_irq(IRQ_GPIOC(29), data);
+                return ret;
+        }
 
-        mxc_gpio_mode((GPIO_PORTC | 28) | GPIO_GPIO | GPIO_IN);
         gpio_direction_input(GPIO_PORTC + 28);
 
         return 0;
-
-out_release_gpio:
-        mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins,
-                        ARRAY_SIZE(pcm970_sdhc2_pins));
-        return ret;
 }
 
 static void pcm970_sdhc2_exit(struct device *dev, void *data)
 {
         free_irq(IRQ_GPIOC(29), data);
         gpio_free(GPIO_PORTC + 28);
-        mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins,
-                        ARRAY_SIZE(pcm970_sdhc2_pins));
 }
 
 static struct imxmmc_platform_data sdhc_pdata = {
@@ -89,29 +125,6 @@ static struct imxmmc_platform_data sdhc_pdata = {
         .exit = pcm970_sdhc2_exit,
 };
 
-static int mxc_fb_pins[] = {
-        PA5_PF_LSCLK,   PA6_PF_LD0,     PA7_PF_LD1,     PA8_PF_LD2,
-        PA9_PF_LD3,     PA10_PF_LD4,    PA11_PF_LD5,    PA12_PF_LD6,
-        PA13_PF_LD7,    PA14_PF_LD8,    PA15_PF_LD9,    PA16_PF_LD10,
-        PA17_PF_LD11,   PA18_PF_LD12,   PA19_PF_LD13,   PA20_PF_LD14,
-        PA21_PF_LD15,   PA22_PF_LD16,   PA23_PF_LD17,   PA24_PF_REV,
-        PA25_PF_CLS,    PA26_PF_PS,     PA27_PF_SPL_SPR, PA28_PF_HSYNC,
-        PA29_PF_VSYNC,  PA30_PF_CONTRAST, PA31_PF_OE_ACD
-};
-
-static int pcm038_fb_init(struct platform_device *pdev)
-{
-        return mxc_gpio_setup_multiple_pins(mxc_fb_pins,
-                        ARRAY_SIZE(mxc_fb_pins), "FB");
-}
-
-static int pcm038_fb_exit(struct platform_device *pdev)
-{
-        mxc_gpio_release_multiple_pins(mxc_fb_pins, ARRAY_SIZE(mxc_fb_pins));
-
-        return 0;
-}
-
 /*
  * Connected is a portrait Sharp-QVGA display
  * of type: LQ035Q7DH06
@@ -144,9 +157,6 @@ static struct imx_fb_platform_data pcm038_fb_data = {
         .pwmr           = 0x00A903FF,
         .lscr1          = 0x00120300,
         .dmacr          = 0x00020010,
-
-        .init = pcm038_fb_init,
-        .exit = pcm038_fb_exit,
 };
 
 /*
@@ -157,6 +167,9 @@ static struct imx_fb_platform_data pcm038_fb_data = {
  */
 void __init pcm970_baseboard_init(void)
 {
+        mxc_gpio_setup_multiple_pins(pcm970_pins, ARRAY_SIZE(pcm970_pins),
+                        "PCM970");
+
         mxc_register_device(&mxc_fb_device, &pcm038_fb_data);
         mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
 }