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authorSascha Hauer <s.hauer@pengutronix.de>2009-04-16 09:45:45 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2009-05-07 10:19:38 -0400
commitf231ea441a6e4b025d971b023ff010094626fdb0 (patch)
tree1c5e0803598929aaa7fa4066054c111353cebd2a /arch/arm/mach-mx2
parent60c24dc79f01edfaa14290ada39a9074050ffbcc (diff)
pcm038: Setup all iomux pins at once
Also, remove usage of set_irq_type after request_irq. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx2')
-rw-r--r--arch/arm/mach-mx2/pcm038.c167
-rw-r--r--arch/arm/mach-mx2/pcm970-baseboard.c113
2 files changed, 124 insertions, 156 deletions
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c
index 7f3a62e2cfcc..35fb96fe933c 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/pcm038.c
@@ -39,6 +39,63 @@
39 39
40#include "devices.h" 40#include "devices.h"
41 41
42static int pcm038_pins[] = {
43 /* UART1 */
44 PE12_PF_UART1_TXD,
45 PE13_PF_UART1_RXD,
46 PE14_PF_UART1_CTS,
47 PE15_PF_UART1_RTS,
48 /* UART2 */
49 PE3_PF_UART2_CTS,
50 PE4_PF_UART2_RTS,
51 PE6_PF_UART2_TXD,
52 PE7_PF_UART2_RXD,
53 /* UART3 */
54 PE8_PF_UART3_TXD,
55 PE9_PF_UART3_RXD,
56 PE10_PF_UART3_CTS,
57 PE11_PF_UART3_RTS,
58 /* FEC */
59 PD0_AIN_FEC_TXD0,
60 PD1_AIN_FEC_TXD1,
61 PD2_AIN_FEC_TXD2,
62 PD3_AIN_FEC_TXD3,
63 PD4_AOUT_FEC_RX_ER,
64 PD5_AOUT_FEC_RXD1,
65 PD6_AOUT_FEC_RXD2,
66 PD7_AOUT_FEC_RXD3,
67 PD8_AF_FEC_MDIO,
68 PD9_AIN_FEC_MDC,
69 PD10_AOUT_FEC_CRS,
70 PD11_AOUT_FEC_TX_CLK,
71 PD12_AOUT_FEC_RXD0,
72 PD13_AOUT_FEC_RX_DV,
73 PD14_AOUT_FEC_RX_CLK,
74 PD15_AOUT_FEC_COL,
75 PD16_AIN_FEC_TX_ER,
76 PF23_AIN_FEC_TX_EN,
77 /* I2C2 */
78 PC5_PF_I2C2_SDA,
79 PC6_PF_I2C2_SCL,
80 /* SPI1 */
81 PD25_PF_CSPI1_RDY,
82 PD27_PF_CSPI1_SS1,
83 PD28_PF_CSPI1_SS0,
84 PD29_PF_CSPI1_SCLK,
85 PD30_PF_CSPI1_MISO,
86 PD31_PF_CSPI1_MOSI,
87 /* SSI1 */
88 PC20_PF_SSI1_FS,
89 PC21_PF_SSI1_RXD,
90 PC22_PF_SSI1_TXD,
91 PC23_PF_SSI1_CLK,
92 /* SSI4 */
93 PC16_PF_SSI4_FS,
94 PC17_PF_SSI4_RXD,
95 PC18_PF_SSI4_TXD,
96 PC19_PF_SSI4_CLK,
97};
98
42/* 99/*
43 * Phytec's PCM038 comes with 2MiB battery buffered SRAM, 100 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
44 * 16 bit width 101 * 16 bit width
@@ -88,104 +145,16 @@ static struct platform_device pcm038_nor_mtd_device = {
88 .resource = &pcm038_flash_resource, 145 .resource = &pcm038_flash_resource,
89}; 146};
90 147
91static int mxc_uart0_pins[] = {
92 PE12_PF_UART1_TXD,
93 PE13_PF_UART1_RXD,
94 PE14_PF_UART1_CTS,
95 PE15_PF_UART1_RTS
96};
97
98static int uart_mxc_port0_init(struct platform_device *pdev)
99{
100 return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
101 ARRAY_SIZE(mxc_uart0_pins), "UART0");
102}
103
104static void uart_mxc_port0_exit(struct platform_device *pdev)
105{
106 mxc_gpio_release_multiple_pins(mxc_uart0_pins,
107 ARRAY_SIZE(mxc_uart0_pins));
108}
109
110static int mxc_uart1_pins[] = {
111 PE3_PF_UART2_CTS,
112 PE4_PF_UART2_RTS,
113 PE6_PF_UART2_TXD,
114 PE7_PF_UART2_RXD
115};
116
117static int uart_mxc_port1_init(struct platform_device *pdev)
118{
119 return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
120 ARRAY_SIZE(mxc_uart1_pins), "UART1");
121}
122
123static void uart_mxc_port1_exit(struct platform_device *pdev)
124{
125 mxc_gpio_release_multiple_pins(mxc_uart1_pins,
126 ARRAY_SIZE(mxc_uart1_pins));
127}
128
129static int mxc_uart2_pins[] = { PE8_PF_UART3_TXD,
130 PE9_PF_UART3_RXD,
131 PE10_PF_UART3_CTS,
132 PE11_PF_UART3_RTS };
133
134static int uart_mxc_port2_init(struct platform_device *pdev)
135{
136 return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
137 ARRAY_SIZE(mxc_uart2_pins), "UART2");
138}
139
140static void uart_mxc_port2_exit(struct platform_device *pdev)
141{
142 mxc_gpio_release_multiple_pins(mxc_uart2_pins,
143 ARRAY_SIZE(mxc_uart2_pins));
144}
145
146static struct imxuart_platform_data uart_pdata[] = { 148static struct imxuart_platform_data uart_pdata[] = {
147 { 149 {
148 .init = uart_mxc_port0_init,
149 .exit = uart_mxc_port0_exit,
150 .flags = IMXUART_HAVE_RTSCTS, 150 .flags = IMXUART_HAVE_RTSCTS,
151 }, { 151 }, {
152 .init = uart_mxc_port1_init,
153 .exit = uart_mxc_port1_exit,
154 .flags = IMXUART_HAVE_RTSCTS, 152 .flags = IMXUART_HAVE_RTSCTS,
155 }, { 153 }, {
156 .init = uart_mxc_port2_init,
157 .exit = uart_mxc_port2_exit,
158 .flags = IMXUART_HAVE_RTSCTS, 154 .flags = IMXUART_HAVE_RTSCTS,
159 }, 155 },
160}; 156};
161 157
162static int mxc_fec_pins[] = {
163 PD0_AIN_FEC_TXD0,
164 PD1_AIN_FEC_TXD1,
165 PD2_AIN_FEC_TXD2,
166 PD3_AIN_FEC_TXD3,
167 PD4_AOUT_FEC_RX_ER,
168 PD5_AOUT_FEC_RXD1,
169 PD6_AOUT_FEC_RXD2,
170 PD7_AOUT_FEC_RXD3,
171 PD8_AF_FEC_MDIO,
172 PD9_AIN_FEC_MDC,
173 PD10_AOUT_FEC_CRS,
174 PD11_AOUT_FEC_TX_CLK,
175 PD12_AOUT_FEC_RXD0,
176 PD13_AOUT_FEC_RX_DV,
177 PD14_AOUT_FEC_RX_CLK,
178 PD15_AOUT_FEC_COL,
179 PD16_AIN_FEC_TX_ER,
180 PF23_AIN_FEC_TX_EN
181};
182
183static void gpio_fec_active(void)
184{
185 mxc_gpio_setup_multiple_pins(mxc_fec_pins,
186 ARRAY_SIZE(mxc_fec_pins), "FEC");
187}
188
189static struct mxc_nand_platform_data pcm038_nand_board_info = { 158static struct mxc_nand_platform_data pcm038_nand_board_info = {
190 .width = 1, 159 .width = 1,
191 .hw_ecc = 1, 160 .hw_ecc = 1,
@@ -208,26 +177,8 @@ static void __init pcm038_init_sram(void)
208} 177}
209 178
210#ifdef CONFIG_I2C_IMX 179#ifdef CONFIG_I2C_IMX
211static int mxc_i2c1_pins[] = {
212 PC5_PF_I2C2_SDA,
213 PC6_PF_I2C2_SCL
214};
215
216static int pcm038_i2c_1_init(struct device *dev)
217{
218 return mxc_gpio_setup_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins),
219 "I2C1");
220}
221
222static void pcm038_i2c_1_exit(struct device *dev)
223{
224 mxc_gpio_release_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins));
225}
226
227static struct imxi2c_platform_data pcm038_i2c_1_data = { 180static struct imxi2c_platform_data pcm038_i2c_1_data = {
228 .bitrate = 100000, 181 .bitrate = 100000,
229 .init = pcm038_i2c_1_init,
230 .exit = pcm038_i2c_1_exit,
231}; 182};
232 183
233static struct at24_platform_data board_eeprom = { 184static struct at24_platform_data board_eeprom = {
@@ -254,7 +205,9 @@ static struct i2c_board_info pcm038_i2c_devices[] = {
254 205
255static void __init pcm038_init(void) 206static void __init pcm038_init(void)
256{ 207{
257 gpio_fec_active(); 208 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
209 "PCM038");
210
258 pcm038_init_sram(); 211 pcm038_init_sram();
259 212
260 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 213 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c
index 16f33443efc1..6dcd625f3f40 100644
--- a/arch/arm/mach-mx2/pcm970-baseboard.c
+++ b/arch/arm/mach-mx2/pcm970-baseboard.c
@@ -30,57 +30,93 @@
30 30
31#include "devices.h" 31#include "devices.h"
32 32
33static int pcm970_sdhc2_get_ro(struct device *dev) 33static int pcm970_pins[] = {
34{ 34 /* SDHC */
35 return gpio_get_value(GPIO_PORTC + 28);
36}
37
38static int pcm970_sdhc2_pins[] = {
39 PB4_PF_SD2_D0, 35 PB4_PF_SD2_D0,
40 PB5_PF_SD2_D1, 36 PB5_PF_SD2_D1,
41 PB6_PF_SD2_D2, 37 PB6_PF_SD2_D2,
42 PB7_PF_SD2_D3, 38 PB7_PF_SD2_D3,
43 PB8_PF_SD2_CMD, 39 PB8_PF_SD2_CMD,
44 PB9_PF_SD2_CLK, 40 PB9_PF_SD2_CLK,
41 GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN, /* card detect */
42 /* display */
43 PA5_PF_LSCLK,
44 PA6_PF_LD0,
45 PA7_PF_LD1,
46 PA8_PF_LD2,
47 PA9_PF_LD3,
48 PA10_PF_LD4,
49 PA11_PF_LD5,
50 PA12_PF_LD6,
51 PA13_PF_LD7,
52 PA14_PF_LD8,
53 PA15_PF_LD9,
54 PA16_PF_LD10,
55 PA17_PF_LD11,
56 PA18_PF_LD12,
57 PA19_PF_LD13,
58 PA20_PF_LD14,
59 PA21_PF_LD15,
60 PA22_PF_LD16,
61 PA23_PF_LD17,
62 PA24_PF_REV,
63 PA25_PF_CLS,
64 PA26_PF_PS,
65 PA27_PF_SPL_SPR,
66 PA28_PF_HSYNC,
67 PA29_PF_VSYNC,
68 PA30_PF_CONTRAST,
69 PA31_PF_OE_ACD,
70 /*
71 * it seems the data line misses a pullup, so we must enable
72 * the internal pullup as a local workaround
73 */
74 PD17_PF_I2C_DATA | GPIO_PUEN,
75 PD18_PF_I2C_CLK,
76 /* Camera */
77 PB10_PF_CSI_D0,
78 PB11_PF_CSI_D1,
79 PB12_PF_CSI_D2,
80 PB13_PF_CSI_D3,
81 PB14_PF_CSI_D4,
82 PB15_PF_CSI_MCLK,
83 PB16_PF_CSI_PIXCLK,
84 PB17_PF_CSI_D5,
85 PB18_PF_CSI_D6,
86 PB19_PF_CSI_D7,
87 PB20_PF_CSI_VSYNC,
88 PB21_PF_CSI_HSYNC,
45}; 89};
46 90
91static int pcm970_sdhc2_get_ro(struct device *dev)
92{
93 return gpio_get_value(GPIO_PORTC + 28);
94}
95
47static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void *data) 96static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void *data)
48{ 97{
49 int ret; 98 int ret;
50 99
51 ret = mxc_gpio_setup_multiple_pins(pcm970_sdhc2_pins, 100 ret = request_irq(IRQ_GPIOC(29), detect_irq, IRQF_TRIGGER_FALLING,
52 ARRAY_SIZE(pcm970_sdhc2_pins), "sdhc2");
53 if(ret)
54 return ret;
55
56 ret = request_irq(IRQ_GPIOC(29), detect_irq, 0,
57 "imx-mmc-detect", data); 101 "imx-mmc-detect", data);
58 if (ret) 102 if (ret)
59 goto out_release_gpio; 103 return ret;
60
61 set_irq_type(IRQ_GPIOC(29), IRQF_TRIGGER_FALLING);
62 104
63 ret = gpio_request(GPIO_PORTC + 28, "imx-mmc-ro"); 105 ret = gpio_request(GPIO_PORTC + 28, "imx-mmc-ro");
64 if (ret) 106 if (ret) {
65 goto out_release_gpio; 107 free_irq(IRQ_GPIOC(29), data);
108 return ret;
109 }
66 110
67 mxc_gpio_mode((GPIO_PORTC | 28) | GPIO_GPIO | GPIO_IN);
68 gpio_direction_input(GPIO_PORTC + 28); 111 gpio_direction_input(GPIO_PORTC + 28);
69 112
70 return 0; 113 return 0;
71
72out_release_gpio:
73 mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins,
74 ARRAY_SIZE(pcm970_sdhc2_pins));
75 return ret;
76} 114}
77 115
78static void pcm970_sdhc2_exit(struct device *dev, void *data) 116static void pcm970_sdhc2_exit(struct device *dev, void *data)
79{ 117{
80 free_irq(IRQ_GPIOC(29), data); 118 free_irq(IRQ_GPIOC(29), data);
81 gpio_free(GPIO_PORTC + 28); 119 gpio_free(GPIO_PORTC + 28);
82 mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins,
83 ARRAY_SIZE(pcm970_sdhc2_pins));
84} 120}
85 121
86static struct imxmmc_platform_data sdhc_pdata = { 122static struct imxmmc_platform_data sdhc_pdata = {
@@ -89,27 +125,6 @@ static struct imxmmc_platform_data sdhc_pdata = {
89 .exit = pcm970_sdhc2_exit, 125 .exit = pcm970_sdhc2_exit,
90}; 126};
91 127
92static int mxc_fb_pins[] = {
93 PA5_PF_LSCLK, PA6_PF_LD0, PA7_PF_LD1, PA8_PF_LD2,
94 PA9_PF_LD3, PA10_PF_LD4, PA11_PF_LD5, PA12_PF_LD6,
95 PA13_PF_LD7, PA14_PF_LD8, PA15_PF_LD9, PA16_PF_LD10,
96 PA17_PF_LD11, PA18_PF_LD12, PA19_PF_LD13, PA20_PF_LD14,
97 PA21_PF_LD15, PA22_PF_LD16, PA23_PF_LD17, PA24_PF_REV,
98 PA25_PF_CLS, PA26_PF_PS, PA27_PF_SPL_SPR, PA28_PF_HSYNC,
99 PA29_PF_VSYNC, PA30_PF_CONTRAST, PA31_PF_OE_ACD
100};
101
102static int pcm038_fb_init(struct platform_device *pdev)
103{
104 return mxc_gpio_setup_multiple_pins(mxc_fb_pins,
105 ARRAY_SIZE(mxc_fb_pins), "FB");
106}
107
108static void pcm038_fb_exit(struct platform_device *pdev)
109{
110 mxc_gpio_release_multiple_pins(mxc_fb_pins, ARRAY_SIZE(mxc_fb_pins));
111}
112
113/* 128/*
114 * Connected is a portrait Sharp-QVGA display 129 * Connected is a portrait Sharp-QVGA display
115 * of type: LQ035Q7DH06 130 * of type: LQ035Q7DH06
@@ -142,9 +157,6 @@ static struct imx_fb_platform_data pcm038_fb_data = {
142 .pwmr = 0x00A903FF, 157 .pwmr = 0x00A903FF,
143 .lscr1 = 0x00120300, 158 .lscr1 = 0x00120300,
144 .dmacr = 0x00020010, 159 .dmacr = 0x00020010,
145
146 .init = pcm038_fb_init,
147 .exit = pcm038_fb_exit,
148}; 160};
149 161
150/* 162/*
@@ -155,6 +167,9 @@ static struct imx_fb_platform_data pcm038_fb_data = {
155 */ 167 */
156void __init pcm970_baseboard_init(void) 168void __init pcm970_baseboard_init(void)
157{ 169{
170 mxc_gpio_setup_multiple_pins(pcm970_pins, ARRAY_SIZE(pcm970_pins),
171 "PCM970");
172
158 mxc_register_device(&mxc_fb_device, &pcm038_fb_data); 173 mxc_register_device(&mxc_fb_device, &pcm038_fb_data);
159 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); 174 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
160} 175}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 01:43:18 -0500