Merge branch 'mxc-master' of git://git.pengutronix.de/git/imx/linux-2.6 into imx/master

Removed selection of COMMON_CLKDEV by CONFIG_ARCH_MX5.  This is handled
in 03e09cd8902717b66f940357257d8ad76114d9f2.

arch/arm/plat-mxc/iomux-mx1-mx2.c was moved to
arch/arm/plat-mxc/iomux-v1.c in 5e2e95f520538e095d10456acd28d9107317aa32
and got bug fixed in 5c17ef878fa25e04b1e8f1d8f5fa8b267753472c.  The bug
in arch/arm/plat-mxc/iomux-v1.c isn't present any more since
bac3fcfad565c9bbceeed8b607f140c29df97355, so
arch/arm/plat-mxc/iomux-mx1-mx2.c is simply deleted.

Conflicts:
	arch/arm/plat-mxc/Kconfig
	arch/arm/plat-mxc/Makefile
	arch/arm/plat-mxc/iomux-mx1-mx2.c

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

3 files changed, 175 insertions, 0 deletions

diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig
index 7bc797c1c3a2..742fd4e6dcb9 100644
--- a/arch/arm/mach-mx2/Kconfig
+++ b/arch/arm/mach-mx2/Kconfig
@@ -37,6 +37,7 @@ config MACH_MX27ADS
 config MACH_PCM038
         bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
         depends on MACH_MX27
+        select MXC_ULPI if USB_ULPI
         help
           Include support for phyCORE-i.MX27 (aka pcm038) platform. This
           includes specific configurations for the module and its peripherals.
@@ -100,6 +101,7 @@ config MACH_IMX27LITE
 config MACH_PCA100
         bool "Phytec phyCARD-s (pca100)"
         depends on MACH_MX27
+        select MXC_ULPI if USB_ULPI
         help
           Include support for phyCARD-s (aka pca100) platform. This
           includes specific configurations for the module and its peripherals.
diff --git a/arch/arm/mach-mx2/mach-pca100.c b/arch/arm/mach-mx2/mach-pca100.c
index cc1762daff3a..778fff230918 100644
--- a/arch/arm/mach-mx2/mach-pca100.c
+++ b/arch/arm/mach-mx2/mach-pca100.c
@@ -25,7 +25,11 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/eeprom.h>
 #include <linux/irq.h>
+#include <linux/delay.h>
 #include <linux/gpio.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/ulpi.h>
+#include <linux/fsl_devices.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
@@ -38,12 +42,19 @@
 #include <mach/spi.h>
 #endif
 #include <mach/imx-uart.h>
+#include <mach/audmux.h>
+#include <mach/ssi.h>
 #include <mach/mxc_nand.h>
 #include <mach/irqs.h>
 #include <mach/mmc.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
 
 #include "devices.h"
 
+#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
+#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
+
 static int pca100_pins[] = {
         /* UART1 */
         PE12_PF_UART1_TXD,
@@ -92,6 +103,34 @@ static int pca100_pins[] = {
         PD29_PF_CSPI1_SCLK,
         PD30_PF_CSPI1_MISO,
         PD31_PF_CSPI1_MOSI,
+        /* OTG */
+        OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
+        PC7_PF_USBOTG_DATA5,
+        PC8_PF_USBOTG_DATA6,
+        PC9_PF_USBOTG_DATA0,
+        PC10_PF_USBOTG_DATA2,
+        PC11_PF_USBOTG_DATA1,
+        PC12_PF_USBOTG_DATA4,
+        PC13_PF_USBOTG_DATA3,
+        PE0_PF_USBOTG_NXT,
+        PE1_PF_USBOTG_STP,
+        PE2_PF_USBOTG_DIR,
+        PE24_PF_USBOTG_CLK,
+        PE25_PF_USBOTG_DATA7,
+        /* USBH2 */
+        USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
+        PA0_PF_USBH2_CLK,
+        PA1_PF_USBH2_DIR,
+        PA2_PF_USBH2_DATA7,
+        PA3_PF_USBH2_NXT,
+        PA4_PF_USBH2_STP,
+        PD19_AF_USBH2_DATA4,
+        PD20_AF_USBH2_DATA3,
+        PD21_AF_USBH2_DATA6,
+        PD22_AF_USBH2_DATA0,
+        PD23_AF_USBH2_DATA2,
+        PD24_AF_USBH2_DATA1,
+        PD26_AF_USBH2_DATA5,
 };
 
 static struct imxuart_platform_data uart_pdata = {
@@ -157,6 +196,37 @@ static struct spi_imx_master pca100_spi_0_data = {
 };
 #endif
 
+static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
+{
+        mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
+        gpio_set_value(GPIO_PORTC + 20, 1);
+        udelay(2);
+        gpio_set_value(GPIO_PORTC + 20, 0);
+        mxc_gpio_mode(PC20_PF_SSI1_FS);
+        msleep(2);
+}
+
+static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
+{
+        mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);  /* FS */
+        gpio_set_value(GPIO_PORTC + 20, 0);
+        mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT);  /* TX */
+        gpio_set_value(GPIO_PORTC + 22, 0);
+        mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT);  /* reset */
+        gpio_set_value(GPIO_PORTC + 28, 0);
+        udelay(10);
+        gpio_set_value(GPIO_PORTC + 28, 1);
+        mxc_gpio_mode(PC20_PF_SSI1_FS);
+        mxc_gpio_mode(PC22_PF_SSI1_TXD);
+        msleep(2);
+}
+
+static struct imx_ssi_platform_data pca100_ssi_pdata = {
+        .ac97_reset             = pca100_ac97_cold_reset,
+        .ac97_warm_reset        = pca100_ac97_warm_reset,
+        .flags                  = IMX_SSI_USE_AC97,
+};
+
 static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
                 void *data)
 {
@@ -182,15 +252,73 @@ static struct imxmmc_platform_data sdhc_pdata = {
         .exit = pca100_sdhc2_exit,
 };
 
+static int otg_phy_init(struct platform_device *pdev)
+{
+        gpio_set_value(OTG_PHY_CS_GPIO, 0);
+        return 0;
+}
+
+static struct mxc_usbh_platform_data otg_pdata = {
+        .init   = otg_phy_init,
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static int usbh2_phy_init(struct platform_device *pdev)
+{
+        gpio_set_value(USBH2_PHY_CS_GPIO, 0);
+        return 0;
+}
+
+static struct mxc_usbh_platform_data usbh2_pdata = {
+        .init   = usbh2_phy_init,
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct fsl_usb2_platform_data otg_device_pdata = {
+        .operating_mode = FSL_USB2_DR_DEVICE,
+        .phy_mode       = FSL_USB2_PHY_ULPI,
+};
+
+static int otg_mode_host;
+
+static int __init pca100_otg_mode(char *options)
+{
+        if (!strcmp(options, "host"))
+                otg_mode_host = 1;
+        else if (!strcmp(options, "device"))
+                otg_mode_host = 0;
+        else
+                pr_info("otg_mode neither \"host\" nor \"device\". "
+                        "Defaulting to device\n");
+        return 0;
+}
+__setup("otg_mode=", pca100_otg_mode);
+
 static void __init pca100_init(void)
 {
         int ret;
 
+        /* SSI unit */
+        mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
+                                  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
+                                  MXC_AUDMUX_V1_PCR_TFCSEL(3) |
+                                  MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
+                                  MXC_AUDMUX_V1_PCR_RXDSEL(3));
+        mxc_audmux_v1_configure_port(3,
+                                  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
+                                  MXC_AUDMUX_V1_PCR_TFCSEL(0) |
+                                  MXC_AUDMUX_V1_PCR_TFSDIR |
+                                  MXC_AUDMUX_V1_PCR_RXDSEL(0));
+
         ret = mxc_gpio_setup_multiple_pins(pca100_pins,
                         ARRAY_SIZE(pca100_pins), "PCA100");
         if (ret)
                 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
 
+        mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata);
+
         mxc_register_device(&mxc_uart_device0, &uart_pdata);
 
         mxc_gpio_mode(GPIO_PORTC | 29 | GPIO_GPIO | GPIO_IN);
@@ -220,6 +348,29 @@ static void __init pca100_init(void)
         mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data);
 #endif
 
+        gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
+        gpio_direction_output(OTG_PHY_CS_GPIO, 1);
+        gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
+        gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
+
+#if defined(CONFIG_USB_ULPI)
+        if (otg_mode_host) {
+                otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+                mxc_register_device(&mxc_otg_host, &otg_pdata);
+        }
+
+        usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+        mxc_register_device(&mxc_usbh2, &usbh2_pdata);
+#endif
+        if (!otg_mode_host) {
+                gpio_set_value(OTG_PHY_CS_GPIO, 0);
+                mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
+        }
+
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 }
 
diff --git a/arch/arm/mach-mx2/mach-pcm038.c b/arch/arm/mach-mx2/mach-pcm038.c
index 809392b62ded..035fbe046ec0 100644
--- a/arch/arm/mach-mx2/mach-pcm038.c
+++ b/arch/arm/mach-mx2/mach-pcm038.c
@@ -40,6 +40,8 @@
 #include <mach/imx-uart.h>
 #include <mach/mxc_nand.h>
 #include <mach/spi.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
 
 #include "devices.h"
 
@@ -96,6 +98,19 @@ static int pcm038_pins[] = {
         PC17_PF_SSI4_RXD,
         PC18_PF_SSI4_TXD,
         PC19_PF_SSI4_CLK,
+        /* USB host */
+        PA0_PF_USBH2_CLK,
+        PA1_PF_USBH2_DIR,
+        PA2_PF_USBH2_DATA7,
+        PA3_PF_USBH2_NXT,
+        PA4_PF_USBH2_STP,
+        PD19_AF_USBH2_DATA4,
+        PD20_AF_USBH2_DATA3,
+        PD21_AF_USBH2_DATA6,
+        PD22_AF_USBH2_DATA0,
+        PD23_AF_USBH2_DATA2,
+        PD24_AF_USBH2_DATA1,
+        PD26_AF_USBH2_DATA5,
 };
 
 /*
@@ -277,6 +292,11 @@ static struct spi_board_info pcm038_spi_board_info[] __initdata = {
         }
 };
 
+static struct mxc_usbh_platform_data usbh2_pdata = {
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
 static void __init pcm038_init(void)
 {
         mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
@@ -309,6 +329,8 @@ static void __init pcm038_init(void)
         spi_register_board_info(pcm038_spi_board_info,
                                 ARRAY_SIZE(pcm038_spi_board_info));
 
+        mxc_register_device(&mxc_usbh2, &usbh2_pdata);
+
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 
 #ifdef CONFIG_MACH_PCM970_BASEBOARD