diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2009-06-04 05:32:12 -0400 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-08-14 06:40:42 -0400 |
commit | 8c25c36f33157a2e2a1fcd60b6dc00feace80631 (patch) | |
tree | 8647a0a59c6ed009a90618cd16ac524e2038fcaf /arch/arm/mach-mx25 | |
parent | a058cbc17901108de9179dccdb29dff0e00c79fe (diff) |
Add i.MX25 support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx25')
-rw-r--r-- | arch/arm/mach-mx25/Kconfig | 5 | ||||
-rw-r--r-- | arch/arm/mach-mx25/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx25/Makefile.boot | 3 | ||||
-rw-r--r-- | arch/arm/mach-mx25/clock.c | 219 | ||||
-rw-r--r-- | arch/arm/mach-mx25/devices.c | 402 | ||||
-rw-r--r-- | arch/arm/mach-mx25/devices.h | 19 | ||||
-rw-r--r-- | arch/arm/mach-mx25/mm.c | 76 |
7 files changed, 726 insertions, 0 deletions
diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig new file mode 100644 index 000000000000..14c918bad52a --- /dev/null +++ b/arch/arm/mach-mx25/Kconfig | |||
@@ -0,0 +1,5 @@ | |||
1 | if ARCH_MX25 | ||
2 | |||
3 | comment "MX25 platforms:" | ||
4 | |||
5 | endif | ||
diff --git a/arch/arm/mach-mx25/Makefile b/arch/arm/mach-mx25/Makefile new file mode 100644 index 000000000000..5471086d5e13 --- /dev/null +++ b/arch/arm/mach-mx25/Makefile | |||
@@ -0,0 +1,2 @@ | |||
1 | obj-y := mm.o devices.o | ||
2 | obj-$(CONFIG_ARCH_MX25) += clock.o | ||
diff --git a/arch/arm/mach-mx25/Makefile.boot b/arch/arm/mach-mx25/Makefile.boot new file mode 100644 index 000000000000..e1dd366f836b --- /dev/null +++ b/arch/arm/mach-mx25/Makefile.boot | |||
@@ -0,0 +1,3 @@ | |||
1 | zreladdr-y := 0x80008000 | ||
2 | params_phys-y := 0x80000100 | ||
3 | initrd_phys-y := 0x80800000 | ||
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c new file mode 100644 index 000000000000..ef26951a5275 --- /dev/null +++ b/arch/arm/mach-mx25/clock.c | |||
@@ -0,0 +1,219 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 by Sascha Hauer, Pengutronix | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version 2 | ||
7 | * of the License, or (at your option) any later version. | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program; if not, write to the Free Software | ||
15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
16 | * MA 02110-1301, USA. | ||
17 | */ | ||
18 | |||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/list.h> | ||
22 | #include <linux/clk.h> | ||
23 | #include <linux/io.h> | ||
24 | |||
25 | #include <asm/clkdev.h> | ||
26 | |||
27 | #include <mach/clock.h> | ||
28 | #include <mach/hardware.h> | ||
29 | #include <mach/common.h> | ||
30 | #include <mach/mx25.h> | ||
31 | |||
32 | #define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR) | ||
33 | |||
34 | #define CCM_MPCTL 0x00 | ||
35 | #define CCM_UPCTL 0x04 | ||
36 | #define CCM_CCTL 0x08 | ||
37 | #define CCM_CGCR0 0x0C | ||
38 | #define CCM_CGCR1 0x10 | ||
39 | #define CCM_CGCR2 0x14 | ||
40 | #define CCM_PCDR0 0x18 | ||
41 | #define CCM_PCDR1 0x1C | ||
42 | #define CCM_PCDR2 0x20 | ||
43 | #define CCM_PCDR3 0x24 | ||
44 | #define CCM_RCSR 0x28 | ||
45 | #define CCM_CRDR 0x2C | ||
46 | #define CCM_DCVR0 0x30 | ||
47 | #define CCM_DCVR1 0x34 | ||
48 | #define CCM_DCVR2 0x38 | ||
49 | #define CCM_DCVR3 0x3c | ||
50 | #define CCM_LTR0 0x40 | ||
51 | #define CCM_LTR1 0x44 | ||
52 | #define CCM_LTR2 0x48 | ||
53 | #define CCM_LTR3 0x4c | ||
54 | |||
55 | static unsigned long get_rate_mpll(void) | ||
56 | { | ||
57 | ulong mpctl = __raw_readl(CRM_BASE + CCM_MPCTL); | ||
58 | |||
59 | return mxc_decode_pll(mpctl, 24000000); | ||
60 | } | ||
61 | |||
62 | static unsigned long get_rate_upll(void) | ||
63 | { | ||
64 | ulong mpctl = __raw_readl(CRM_BASE + CCM_UPCTL); | ||
65 | |||
66 | return mxc_decode_pll(mpctl, 24000000); | ||
67 | } | ||
68 | |||
69 | unsigned long get_rate_arm(struct clk *clk) | ||
70 | { | ||
71 | unsigned long cctl = readl(CRM_BASE + CCM_CCTL); | ||
72 | unsigned long rate = get_rate_mpll(); | ||
73 | |||
74 | if (cctl & (1 << 14)) | ||
75 | rate = (rate * 3) >> 1; | ||
76 | |||
77 | return rate / ((cctl >> 30) + 1); | ||
78 | } | ||
79 | |||
80 | static unsigned long get_rate_ahb(struct clk *clk) | ||
81 | { | ||
82 | unsigned long cctl = readl(CRM_BASE + CCM_CCTL); | ||
83 | |||
84 | return get_rate_arm(NULL) / (((cctl >> 28) & 0x3) + 1); | ||
85 | } | ||
86 | |||
87 | static unsigned long get_rate_ipg(struct clk *clk) | ||
88 | { | ||
89 | return get_rate_ahb(NULL) >> 1; | ||
90 | } | ||
91 | |||
92 | static unsigned long get_rate_per(int per) | ||
93 | { | ||
94 | unsigned long ofs = (per & 0x3) * 8; | ||
95 | unsigned long reg = per & ~0x3; | ||
96 | unsigned long val = (readl(CRM_BASE + CCM_PCDR0 + reg) >> ofs) & 0x3f; | ||
97 | unsigned long fref; | ||
98 | |||
99 | if (readl(CRM_BASE + 0x64) & (1 << per)) | ||
100 | fref = get_rate_upll(); | ||
101 | else | ||
102 | fref = get_rate_ipg(NULL); | ||
103 | |||
104 | return fref / (val + 1); | ||
105 | } | ||
106 | |||
107 | static unsigned long get_rate_uart(struct clk *clk) | ||
108 | { | ||
109 | return get_rate_per(15); | ||
110 | } | ||
111 | |||
112 | static unsigned long get_rate_i2c(struct clk *clk) | ||
113 | { | ||
114 | return get_rate_per(6); | ||
115 | } | ||
116 | |||
117 | static unsigned long get_rate_nfc(struct clk *clk) | ||
118 | { | ||
119 | return get_rate_per(8); | ||
120 | } | ||
121 | |||
122 | static unsigned long get_rate_otg(struct clk *clk) | ||
123 | { | ||
124 | return 48000000; /* FIXME */ | ||
125 | } | ||
126 | |||
127 | static int clk_cgcr_enable(struct clk *clk) | ||
128 | { | ||
129 | u32 reg; | ||
130 | |||
131 | reg = __raw_readl(clk->enable_reg); | ||
132 | reg |= 1 << clk->enable_shift; | ||
133 | __raw_writel(reg, clk->enable_reg); | ||
134 | |||
135 | return 0; | ||
136 | } | ||
137 | |||
138 | static void clk_cgcr_disable(struct clk *clk) | ||
139 | { | ||
140 | u32 reg; | ||
141 | |||
142 | reg = __raw_readl(clk->enable_reg); | ||
143 | reg &= ~(1 << clk->enable_shift); | ||
144 | __raw_writel(reg, clk->enable_reg); | ||
145 | } | ||
146 | |||
147 | #define DEFINE_CLOCK(name, i, er, es, gr, sr) \ | ||
148 | static struct clk name = { \ | ||
149 | .id = i, \ | ||
150 | .enable_reg = CRM_BASE + er, \ | ||
151 | .enable_shift = es, \ | ||
152 | .get_rate = gr, \ | ||
153 | .set_rate = sr, \ | ||
154 | .enable = clk_cgcr_enable, \ | ||
155 | .disable = clk_cgcr_disable, \ | ||
156 | } | ||
157 | |||
158 | DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_ipg, NULL); | ||
159 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL); | ||
160 | DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL); | ||
161 | DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL); | ||
162 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL); | ||
163 | DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL); | ||
164 | DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL); | ||
165 | DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL); | ||
166 | DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL); | ||
167 | DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL); | ||
168 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL); | ||
169 | DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL); | ||
170 | DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL); | ||
171 | DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL); | ||
172 | DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL); | ||
173 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL); | ||
174 | DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL); | ||
175 | DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL); | ||
176 | |||
177 | #define _REGISTER_CLOCK(d, n, c) \ | ||
178 | { \ | ||
179 | .dev_id = d, \ | ||
180 | .con_id = n, \ | ||
181 | .clk = &c, \ | ||
182 | }, | ||
183 | |||
184 | static struct clk_lookup lookups[] = { | ||
185 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) | ||
186 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) | ||
187 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | ||
188 | _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk) | ||
189 | _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk) | ||
190 | _REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk) | ||
191 | _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk) | ||
192 | _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk) | ||
193 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk) | ||
194 | _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) | ||
195 | _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) | ||
196 | _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) | ||
197 | _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk) | ||
198 | _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk) | ||
199 | _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk) | ||
200 | _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk) | ||
201 | _REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk) | ||
202 | _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk) | ||
203 | _REGISTER_CLOCK("mx25-adc", NULL, tsc_clk) | ||
204 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) | ||
205 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk) | ||
206 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk) | ||
207 | }; | ||
208 | |||
209 | int __init mx25_clocks_init(unsigned long fref) | ||
210 | { | ||
211 | int i; | ||
212 | |||
213 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | ||
214 | clkdev_add(&lookups[i]); | ||
215 | |||
216 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); | ||
217 | |||
218 | return 0; | ||
219 | } | ||
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c new file mode 100644 index 000000000000..eb12de1da42d --- /dev/null +++ b/arch/arm/mach-mx25/devices.c | |||
@@ -0,0 +1,402 @@ | |||
1 | #include <linux/platform_device.h> | ||
2 | #include <linux/gpio.h> | ||
3 | #include <mach/mx25.h> | ||
4 | #include <mach/irqs.h> | ||
5 | |||
6 | static struct resource uart0[] = { | ||
7 | { | ||
8 | .start = 0x43f90000, | ||
9 | .end = 0x43f93fff, | ||
10 | .flags = IORESOURCE_MEM, | ||
11 | }, { | ||
12 | .start = 45, | ||
13 | .end = 45, | ||
14 | .flags = IORESOURCE_IRQ, | ||
15 | }, | ||
16 | }; | ||
17 | |||
18 | struct platform_device mxc_uart_device0 = { | ||
19 | .name = "imx-uart", | ||
20 | .id = 0, | ||
21 | .resource = uart0, | ||
22 | .num_resources = ARRAY_SIZE(uart0), | ||
23 | }; | ||
24 | |||
25 | static struct resource uart1[] = { | ||
26 | { | ||
27 | .start = 0x43f94000, | ||
28 | .end = 0x43f97fff, | ||
29 | .flags = IORESOURCE_MEM, | ||
30 | }, { | ||
31 | .start = 32, | ||
32 | .end = 32, | ||
33 | .flags = IORESOURCE_IRQ, | ||
34 | }, | ||
35 | }; | ||
36 | |||
37 | struct platform_device mxc_uart_device1 = { | ||
38 | .name = "imx-uart", | ||
39 | .id = 1, | ||
40 | .resource = uart1, | ||
41 | .num_resources = ARRAY_SIZE(uart1), | ||
42 | }; | ||
43 | |||
44 | static struct resource uart2[] = { | ||
45 | { | ||
46 | .start = 0x5000c000, | ||
47 | .end = 0x5000ffff, | ||
48 | .flags = IORESOURCE_MEM, | ||
49 | }, { | ||
50 | .start = 18, | ||
51 | .end = 18, | ||
52 | .flags = IORESOURCE_IRQ, | ||
53 | }, | ||
54 | }; | ||
55 | |||
56 | struct platform_device mxc_uart_device2 = { | ||
57 | .name = "imx-uart", | ||
58 | .id = 2, | ||
59 | .resource = uart2, | ||
60 | .num_resources = ARRAY_SIZE(uart2), | ||
61 | }; | ||
62 | |||
63 | static struct resource uart3[] = { | ||
64 | { | ||
65 | .start = 0x50008000, | ||
66 | .end = 0x5000bfff, | ||
67 | .flags = IORESOURCE_MEM, | ||
68 | }, { | ||
69 | .start = 5, | ||
70 | .end = 5, | ||
71 | .flags = IORESOURCE_IRQ, | ||
72 | }, | ||
73 | }; | ||
74 | |||
75 | struct platform_device mxc_uart_device3 = { | ||
76 | .name = "imx-uart", | ||
77 | .id = 3, | ||
78 | .resource = uart3, | ||
79 | .num_resources = ARRAY_SIZE(uart3), | ||
80 | }; | ||
81 | |||
82 | static struct resource uart4[] = { | ||
83 | { | ||
84 | .start = 0x5002c000, | ||
85 | .end = 0x5002ffff, | ||
86 | .flags = IORESOURCE_MEM, | ||
87 | }, { | ||
88 | .start = 40, | ||
89 | .end = 40, | ||
90 | .flags = IORESOURCE_IRQ, | ||
91 | }, | ||
92 | }; | ||
93 | |||
94 | struct platform_device mxc_uart_device4 = { | ||
95 | .name = "imx-uart", | ||
96 | .id = 4, | ||
97 | .resource = uart4, | ||
98 | .num_resources = ARRAY_SIZE(uart4), | ||
99 | }; | ||
100 | |||
101 | #define MX25_OTG_BASE_ADDR 0x53FF4000 | ||
102 | |||
103 | static u64 otg_dmamask = DMA_BIT_MASK(32); | ||
104 | |||
105 | static struct resource mxc_otg_resources[] = { | ||
106 | { | ||
107 | .start = MX25_OTG_BASE_ADDR, | ||
108 | .end = MX25_OTG_BASE_ADDR + 0x1ff, | ||
109 | .flags = IORESOURCE_MEM, | ||
110 | }, { | ||
111 | .start = 37, | ||
112 | .end = 37, | ||
113 | .flags = IORESOURCE_IRQ, | ||
114 | }, | ||
115 | }; | ||
116 | |||
117 | struct platform_device mxc_otg = { | ||
118 | .name = "mxc-ehci", | ||
119 | .id = 0, | ||
120 | .dev = { | ||
121 | .coherent_dma_mask = 0xffffffff, | ||
122 | .dma_mask = &otg_dmamask, | ||
123 | }, | ||
124 | .resource = mxc_otg_resources, | ||
125 | .num_resources = ARRAY_SIZE(mxc_otg_resources), | ||
126 | }; | ||
127 | |||
128 | /* OTG gadget device */ | ||
129 | struct platform_device otg_udc_device = { | ||
130 | .name = "fsl-usb2-udc", | ||
131 | .id = -1, | ||
132 | .dev = { | ||
133 | .dma_mask = &otg_dmamask, | ||
134 | .coherent_dma_mask = 0xffffffff, | ||
135 | }, | ||
136 | .resource = mxc_otg_resources, | ||
137 | .num_resources = ARRAY_SIZE(mxc_otg_resources), | ||
138 | }; | ||
139 | |||
140 | static u64 usbh2_dmamask = DMA_BIT_MASK(32); | ||
141 | |||
142 | static struct resource mxc_usbh2_resources[] = { | ||
143 | { | ||
144 | .start = MX25_OTG_BASE_ADDR + 0x400, | ||
145 | .end = MX25_OTG_BASE_ADDR + 0x5ff, | ||
146 | .flags = IORESOURCE_MEM, | ||
147 | }, { | ||
148 | .start = 35, | ||
149 | .end = 35, | ||
150 | .flags = IORESOURCE_IRQ, | ||
151 | }, | ||
152 | }; | ||
153 | |||
154 | struct platform_device mxc_usbh2 = { | ||
155 | .name = "mxc-ehci", | ||
156 | .id = 1, | ||
157 | .dev = { | ||
158 | .coherent_dma_mask = 0xffffffff, | ||
159 | .dma_mask = &usbh2_dmamask, | ||
160 | }, | ||
161 | .resource = mxc_usbh2_resources, | ||
162 | .num_resources = ARRAY_SIZE(mxc_usbh2_resources), | ||
163 | }; | ||
164 | |||
165 | static struct resource mxc_spi_resources0[] = { | ||
166 | { | ||
167 | .start = 0x43fa4000, | ||
168 | .end = 0x43fa7fff, | ||
169 | .flags = IORESOURCE_MEM, | ||
170 | }, { | ||
171 | .start = 14, | ||
172 | .end = 14, | ||
173 | .flags = IORESOURCE_IRQ, | ||
174 | }, | ||
175 | }; | ||
176 | |||
177 | struct platform_device mxc_spi_device0 = { | ||
178 | .name = "spi_imx", | ||
179 | .id = 0, | ||
180 | .num_resources = ARRAY_SIZE(mxc_spi_resources0), | ||
181 | .resource = mxc_spi_resources0, | ||
182 | }; | ||
183 | |||
184 | static struct resource mxc_spi_resources1[] = { | ||
185 | { | ||
186 | .start = 0x50010000, | ||
187 | .end = 0x50013fff, | ||
188 | .flags = IORESOURCE_MEM, | ||
189 | }, { | ||
190 | .start = 13, | ||
191 | .end = 13, | ||
192 | .flags = IORESOURCE_IRQ, | ||
193 | }, | ||
194 | }; | ||
195 | |||
196 | struct platform_device mxc_spi_device1 = { | ||
197 | .name = "spi_imx", | ||
198 | .id = 1, | ||
199 | .num_resources = ARRAY_SIZE(mxc_spi_resources1), | ||
200 | .resource = mxc_spi_resources1, | ||
201 | }; | ||
202 | |||
203 | static struct resource mxc_spi_resources2[] = { | ||
204 | { | ||
205 | .start = 0x50004000, | ||
206 | .end = 0x50007fff, | ||
207 | .flags = IORESOURCE_MEM, | ||
208 | }, { | ||
209 | .start = 0, | ||
210 | .end = 0, | ||
211 | .flags = IORESOURCE_IRQ, | ||
212 | }, | ||
213 | }; | ||
214 | |||
215 | struct platform_device mxc_spi_device2 = { | ||
216 | .name = "spi_imx", | ||
217 | .id = 2, | ||
218 | .num_resources = ARRAY_SIZE(mxc_spi_resources2), | ||
219 | .resource = mxc_spi_resources2, | ||
220 | }; | ||
221 | |||
222 | static struct resource mxc_pwm_resources0[] = { | ||
223 | { | ||
224 | .start = 0x53fe0000, | ||
225 | .end = 0x53fe3fff, | ||
226 | .flags = IORESOURCE_MEM, | ||
227 | }, { | ||
228 | .start = 26, | ||
229 | .end = 26, | ||
230 | .flags = IORESOURCE_IRQ, | ||
231 | } | ||
232 | }; | ||
233 | |||
234 | struct platform_device mxc_pwm_device0 = { | ||
235 | .name = "mxc_pwm", | ||
236 | .id = 0, | ||
237 | .num_resources = ARRAY_SIZE(mxc_pwm_resources0), | ||
238 | .resource = mxc_pwm_resources0, | ||
239 | }; | ||
240 | |||
241 | static struct resource mxc_pwm_resources1[] = { | ||
242 | { | ||
243 | .start = 0x53fa0000, | ||
244 | .end = 0x53fa3fff, | ||
245 | .flags = IORESOURCE_MEM, | ||
246 | }, { | ||
247 | .start = 36, | ||
248 | .end = 36, | ||
249 | .flags = IORESOURCE_IRQ, | ||
250 | } | ||
251 | }; | ||
252 | |||
253 | struct platform_device mxc_pwm_device1 = { | ||
254 | .name = "mxc_pwm", | ||
255 | .id = 1, | ||
256 | .num_resources = ARRAY_SIZE(mxc_pwm_resources1), | ||
257 | .resource = mxc_pwm_resources1, | ||
258 | }; | ||
259 | |||
260 | static struct resource mxc_pwm_resources2[] = { | ||
261 | { | ||
262 | .start = 0x53fa8000, | ||
263 | .end = 0x53fabfff, | ||
264 | .flags = IORESOURCE_MEM, | ||
265 | }, { | ||
266 | .start = 41, | ||
267 | .end = 41, | ||
268 | .flags = IORESOURCE_IRQ, | ||
269 | } | ||
270 | }; | ||
271 | |||
272 | struct platform_device mxc_pwm_device2 = { | ||
273 | .name = "mxc_pwm", | ||
274 | .id = 2, | ||
275 | .num_resources = ARRAY_SIZE(mxc_pwm_resources2), | ||
276 | .resource = mxc_pwm_resources2, | ||
277 | }; | ||
278 | |||
279 | static struct resource mxc_keypad_resources[] = { | ||
280 | { | ||
281 | .start = 0x43fa8000, | ||
282 | .end = 0x43fabfff, | ||
283 | .flags = IORESOURCE_MEM, | ||
284 | }, { | ||
285 | .start = 24, | ||
286 | .end = 24, | ||
287 | .flags = IORESOURCE_IRQ, | ||
288 | } | ||
289 | }; | ||
290 | |||
291 | struct platform_device mxc_keypad_device = { | ||
292 | .name = "mxc-keypad", | ||
293 | .id = -1, | ||
294 | .num_resources = ARRAY_SIZE(mxc_keypad_resources), | ||
295 | .resource = mxc_keypad_resources, | ||
296 | }; | ||
297 | |||
298 | static struct resource mxc_pwm_resources3[] = { | ||
299 | { | ||
300 | .start = 0x53fc8000, | ||
301 | .end = 0x53fcbfff, | ||
302 | .flags = IORESOURCE_MEM, | ||
303 | }, { | ||
304 | .start = 42, | ||
305 | .end = 42, | ||
306 | .flags = IORESOURCE_IRQ, | ||
307 | } | ||
308 | }; | ||
309 | |||
310 | struct platform_device mxc_pwm_device3 = { | ||
311 | .name = "mxc_pwm", | ||
312 | .id = 3, | ||
313 | .num_resources = ARRAY_SIZE(mxc_pwm_resources3), | ||
314 | .resource = mxc_pwm_resources3, | ||
315 | }; | ||
316 | |||
317 | static struct resource mxc_i2c_1_resources[] = { | ||
318 | { | ||
319 | .start = 0x43f80000, | ||
320 | .end = 0x43f83fff, | ||
321 | .flags = IORESOURCE_MEM, | ||
322 | }, { | ||
323 | .start = 3, | ||
324 | .end = 3, | ||
325 | .flags = IORESOURCE_IRQ, | ||
326 | } | ||
327 | }; | ||
328 | |||
329 | struct platform_device mxc_i2c_device0 = { | ||
330 | .name = "imx-i2c", | ||
331 | .id = 0, | ||
332 | .num_resources = ARRAY_SIZE(mxc_i2c_1_resources), | ||
333 | .resource = mxc_i2c_1_resources, | ||
334 | }; | ||
335 | |||
336 | static struct resource mxc_i2c_2_resources[] = { | ||
337 | { | ||
338 | .start = 0x43f98000, | ||
339 | .end = 0x43f9bfff, | ||
340 | .flags = IORESOURCE_MEM, | ||
341 | }, { | ||
342 | .start = 4, | ||
343 | .end = 4, | ||
344 | .flags = IORESOURCE_IRQ, | ||
345 | } | ||
346 | }; | ||
347 | |||
348 | struct platform_device mxc_i2c_device1 = { | ||
349 | .name = "imx-i2c", | ||
350 | .id = 1, | ||
351 | .num_resources = ARRAY_SIZE(mxc_i2c_2_resources), | ||
352 | .resource = mxc_i2c_2_resources, | ||
353 | }; | ||
354 | |||
355 | static struct resource mxc_i2c_3_resources[] = { | ||
356 | { | ||
357 | .start = 0x43f84000, | ||
358 | .end = 0x43f87fff, | ||
359 | .flags = IORESOURCE_MEM, | ||
360 | }, { | ||
361 | .start = 10, | ||
362 | .end = 10, | ||
363 | .flags = IORESOURCE_IRQ, | ||
364 | } | ||
365 | }; | ||
366 | |||
367 | struct platform_device mxc_i2c_device2 = { | ||
368 | .name = "imx-i2c", | ||
369 | .id = 2, | ||
370 | .num_resources = ARRAY_SIZE(mxc_i2c_3_resources), | ||
371 | .resource = mxc_i2c_3_resources, | ||
372 | }; | ||
373 | |||
374 | static struct mxc_gpio_port imx_gpio_ports[] = { | ||
375 | { | ||
376 | .chip.label = "gpio-0", | ||
377 | .base = (void __iomem *)MX25_GPIO1_BASE_ADDR_VIRT, | ||
378 | .irq = 52, | ||
379 | .virtual_irq_start = MXC_GPIO_IRQ_START, | ||
380 | }, { | ||
381 | .chip.label = "gpio-1", | ||
382 | .base = (void __iomem *)MX25_GPIO2_BASE_ADDR_VIRT, | ||
383 | .irq = 51, | ||
384 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32, | ||
385 | }, { | ||
386 | .chip.label = "gpio-2", | ||
387 | .base = (void __iomem *)MX25_GPIO3_BASE_ADDR_VIRT, | ||
388 | .irq = 16, | ||
389 | .virtual_irq_start = MXC_GPIO_IRQ_START + 64, | ||
390 | }, { | ||
391 | .chip.label = "gpio-3", | ||
392 | .base = (void __iomem *)MX25_GPIO4_BASE_ADDR_VIRT, | ||
393 | .irq = 23, | ||
394 | .virtual_irq_start = MXC_GPIO_IRQ_START + 96, | ||
395 | } | ||
396 | }; | ||
397 | |||
398 | int __init mxc_register_gpios(void) | ||
399 | { | ||
400 | return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); | ||
401 | } | ||
402 | |||
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h new file mode 100644 index 000000000000..fe6bf88ad1dd --- /dev/null +++ b/arch/arm/mach-mx25/devices.h | |||
@@ -0,0 +1,19 @@ | |||
1 | extern struct platform_device mxc_uart_device0; | ||
2 | extern struct platform_device mxc_uart_device1; | ||
3 | extern struct platform_device mxc_uart_device2; | ||
4 | extern struct platform_device mxc_uart_device3; | ||
5 | extern struct platform_device mxc_uart_device4; | ||
6 | extern struct platform_device mxc_otg; | ||
7 | extern struct platform_device otg_udc_device; | ||
8 | extern struct platform_device mxc_usbh2; | ||
9 | extern struct platform_device mxc_spi_device0; | ||
10 | extern struct platform_device mxc_spi_device1; | ||
11 | extern struct platform_device mxc_spi_device2; | ||
12 | extern struct platform_device mxc_pwm_device0; | ||
13 | extern struct platform_device mxc_pwm_device1; | ||
14 | extern struct platform_device mxc_pwm_device2; | ||
15 | extern struct platform_device mxc_pwm_device3; | ||
16 | extern struct platform_device mxc_keypad_device; | ||
17 | extern struct platform_device mxc_i2c_device0; | ||
18 | extern struct platform_device mxc_i2c_device1; | ||
19 | extern struct platform_device mxc_i2c_device2; | ||
diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-mx25/mm.c new file mode 100644 index 000000000000..a7e587ff3e9e --- /dev/null +++ b/arch/arm/mach-mx25/mm.c | |||
@@ -0,0 +1,76 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999,2000 Arm Limited | ||
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
4 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
5 | * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
6 | * - add MX31 specific definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/mm.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/err.h> | ||
26 | |||
27 | #include <asm/pgtable.h> | ||
28 | #include <asm/mach/map.h> | ||
29 | |||
30 | #include <mach/common.h> | ||
31 | #include <mach/hardware.h> | ||
32 | #include <mach/mx25.h> | ||
33 | #include <mach/iomux-v3.h> | ||
34 | |||
35 | /* | ||
36 | * This table defines static virtual address mappings for I/O regions. | ||
37 | * These are the mappings common across all MX3 boards. | ||
38 | */ | ||
39 | static struct map_desc mxc_io_desc[] __initdata = { | ||
40 | { | ||
41 | .virtual = MX25_AVIC_BASE_ADDR_VIRT, | ||
42 | .pfn = __phys_to_pfn(MX25_AVIC_BASE_ADDR), | ||
43 | .length = MX25_AVIC_SIZE, | ||
44 | .type = MT_DEVICE_NONSHARED | ||
45 | }, { | ||
46 | .virtual = MX25_AIPS1_BASE_ADDR_VIRT, | ||
47 | .pfn = __phys_to_pfn(MX25_AIPS1_BASE_ADDR), | ||
48 | .length = MX25_AIPS1_SIZE, | ||
49 | .type = MT_DEVICE_NONSHARED | ||
50 | }, { | ||
51 | .virtual = MX25_AIPS2_BASE_ADDR_VIRT, | ||
52 | .pfn = __phys_to_pfn(MX25_AIPS2_BASE_ADDR), | ||
53 | .length = MX25_AIPS2_SIZE, | ||
54 | .type = MT_DEVICE_NONSHARED | ||
55 | }, | ||
56 | }; | ||
57 | |||
58 | /* | ||
59 | * This function initializes the memory map. It is called during the | ||
60 | * system startup to create static physical to virtual memory mappings | ||
61 | * for the IO modules. | ||
62 | */ | ||
63 | void __init mx25_map_io(void) | ||
64 | { | ||
65 | mxc_set_cpu_type(MXC_CPU_MX25); | ||
66 | mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR)); | ||
67 | mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); | ||
68 | |||
69 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | ||
70 | } | ||
71 | |||
72 | void __init mx25_init_irq(void) | ||
73 | { | ||
74 | mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT); | ||
75 | } | ||
76 | |||